target/ppc: Merge various fpu helpers
This patch merges the definitions of the following set of fpu helper methods,
which are similar, using macros :
1. f{add, sub, mul, div}(s)
2. fre(s)
3. frsqrte(s)
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Chinmay Rath
Nicholas Piggin
parent
b3cfa2dd2b
commit
5747926fec
@ -490,54 +490,12 @@ static void float_invalid_op_addsub(CPUPPCState *env, int flags,
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}
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}
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/* fadd - fadd. */
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float64 helper_fadd(CPUPPCState *env, float64 arg1, float64 arg2)
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static inline void addsub_flags_handler(CPUPPCState *env, int flags,
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uintptr_t ra)
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{
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float64 ret = float64_add(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_addsub(env, flags, 1, GETPC());
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float_invalid_op_addsub(env, flags, 1, ra);
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}
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return ret;
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}
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/* fadds - fadds. */
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float64 helper_fadds(CPUPPCState *env, float64 arg1, float64 arg2)
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{
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float64 ret = float64r32_add(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_addsub(env, flags, 1, GETPC());
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}
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return ret;
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}
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/* fsub - fsub. */
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float64 helper_fsub(CPUPPCState *env, float64 arg1, float64 arg2)
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{
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float64 ret = float64_sub(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_addsub(env, flags, 1, GETPC());
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}
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return ret;
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}
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/* fsubs - fsubs. */
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float64 helper_fsubs(CPUPPCState *env, float64 arg1, float64 arg2)
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{
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float64 ret = float64r32_sub(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_addsub(env, flags, 1, GETPC());
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}
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return ret;
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}
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static void float_invalid_op_mul(CPUPPCState *env, int flags,
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@ -550,29 +508,11 @@ static void float_invalid_op_mul(CPUPPCState *env, int flags,
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}
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}
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/* fmul - fmul. */
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float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2)
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static inline void mul_flags_handler(CPUPPCState *env, int flags, uintptr_t ra)
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{
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float64 ret = float64_mul(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_mul(env, flags, 1, GETPC());
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float_invalid_op_mul(env, flags, 1, ra);
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}
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return ret;
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}
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/* fmuls - fmuls. */
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float64 helper_fmuls(CPUPPCState *env, float64 arg1, float64 arg2)
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{
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float64 ret = float64r32_mul(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_mul(env, flags, 1, GETPC());
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}
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return ret;
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}
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static void float_invalid_op_div(CPUPPCState *env, int flags,
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@ -587,36 +527,14 @@ static void float_invalid_op_div(CPUPPCState *env, int flags,
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}
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}
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/* fdiv - fdiv. */
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float64 helper_fdiv(CPUPPCState *env, float64 arg1, float64 arg2)
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static inline void div_flags_handler(CPUPPCState *env, int flags, uintptr_t ra)
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{
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float64 ret = float64_div(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_div(env, flags, 1, GETPC());
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float_invalid_op_div(env, flags, 1, ra);
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}
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if (unlikely(flags & float_flag_divbyzero)) {
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float_zero_divide_excp(env, GETPC());
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float_zero_divide_excp(env, ra);
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}
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return ret;
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}
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/* fdivs - fdivs. */
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float64 helper_fdivs(CPUPPCState *env, float64 arg1, float64 arg2)
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{
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float64 ret = float64r32_div(arg1, arg2, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_div(env, flags, 1, GETPC());
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}
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if (unlikely(flags & float_flag_divbyzero)) {
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float_zero_divide_excp(env, GETPC());
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}
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return ret;
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}
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static uint64_t float_invalid_cvt(CPUPPCState *env, int flags,
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@ -812,81 +730,66 @@ float64 helper_##name(CPUPPCState *env, float64 arg) \
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FPU_FSQRT(FSQRT, float64_sqrt)
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FPU_FSQRT(FSQRTS, float64r32_sqrt)
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/* fre - fre. */
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float64 helper_fre(CPUPPCState *env, float64 arg)
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{
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/* "Estimate" the reciprocal with actual division. */
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float64 ret = float64_div(float64_one, arg, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid_snan)) {
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float_invalid_op_vxsnan(env, GETPC());
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}
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if (unlikely(flags & float_flag_divbyzero)) {
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float_zero_divide_excp(env, GETPC());
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/* For FPSCR.ZE == 0, the result is 1/2. */
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ret = float64_set_sign(float64_half, float64_is_neg(arg));
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}
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return ret;
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#define FPU_FRE(name, op) \
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float64 helper_##name(CPUPPCState *env, float64 arg) \
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{ \
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/* "Estimate" the reciprocal with actual division. */ \
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float64 ret = op(float64_one, arg, &env->fp_status); \
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int flags = get_float_exception_flags(&env->fp_status); \
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\
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if (unlikely(flags & float_flag_invalid_snan)) { \
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float_invalid_op_vxsnan(env, GETPC()); \
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} \
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if (unlikely(flags & float_flag_divbyzero)) { \
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float_zero_divide_excp(env, GETPC()); \
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/* For FPSCR.ZE == 0, the result is 1/2. */ \
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ret = float64_set_sign(float64_half, float64_is_neg(arg)); \
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} \
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\
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return ret; \
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}
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/* fres - fres. */
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uint64_t helper_fres(CPUPPCState *env, uint64_t arg)
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{
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/* "Estimate" the reciprocal with actual division. */
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float64 ret = float64r32_div(float64_one, arg, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid_snan)) {
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float_invalid_op_vxsnan(env, GETPC());
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}
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if (unlikely(flags & float_flag_divbyzero)) {
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float_zero_divide_excp(env, GETPC());
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/* For FPSCR.ZE == 0, the result is 1/2. */
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ret = float64_set_sign(float64_half, float64_is_neg(arg));
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}
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return ret;
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#define FPU_FRSQRTE(name, op) \
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float64 helper_##name(CPUPPCState *env, float64 arg) \
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{ \
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/* "Estimate" the reciprocal with actual division. */ \
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float64 rets = float64_sqrt(arg, &env->fp_status); \
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float64 retd = op(float64_one, rets, &env->fp_status); \
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int flags = get_float_exception_flags(&env->fp_status); \
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\
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if (unlikely(flags & float_flag_invalid)) { \
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float_invalid_op_sqrt(env, flags, 1, GETPC()); \
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} \
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if (unlikely(flags & float_flag_divbyzero)) { \
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/* Reciprocal of (square root of) zero. */ \
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float_zero_divide_excp(env, GETPC()); \
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} \
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\
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return retd; \
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}
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/* frsqrte - frsqrte. */
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float64 helper_frsqrte(CPUPPCState *env, float64 arg)
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{
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/* "Estimate" the reciprocal with actual division. */
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float64 rets = float64_sqrt(arg, &env->fp_status);
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float64 retd = float64_div(float64_one, rets, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_sqrt(env, flags, 1, GETPC());
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}
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if (unlikely(flags & float_flag_divbyzero)) {
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/* Reciprocal of (square root of) zero. */
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float_zero_divide_excp(env, GETPC());
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}
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return retd;
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#define FPU_HELPER(name, op, flags_handler) \
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float64 helper_##name(CPUPPCState *env, float64 arg1, float64 arg2) \
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{ \
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float64 ret = op(arg1, arg2, &env->fp_status); \
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int flags = get_float_exception_flags(&env->fp_status); \
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uintptr_t ra = GETPC(); \
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flags_handler(env, flags, ra); \
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return ret; \
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}
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/* frsqrtes - frsqrtes. */
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float64 helper_frsqrtes(CPUPPCState *env, float64 arg)
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{
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/* "Estimate" the reciprocal with actual division. */
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float64 rets = float64_sqrt(arg, &env->fp_status);
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float64 retd = float64r32_div(float64_one, rets, &env->fp_status);
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int flags = get_float_exception_flags(&env->fp_status);
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if (unlikely(flags & float_flag_invalid)) {
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float_invalid_op_sqrt(env, flags, 1, GETPC());
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}
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if (unlikely(flags & float_flag_divbyzero)) {
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/* Reciprocal of (square root of) zero. */
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float_zero_divide_excp(env, GETPC());
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}
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return retd;
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}
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FPU_FRE(fre, float64_div)
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FPU_FRE(fres, float64r32_div)
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FPU_FRSQRTE(frsqrte, float64_div)
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FPU_FRSQRTE(frsqrtes, float64r32_div)
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FPU_HELPER(fadd, float64_add, addsub_flags_handler)
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FPU_HELPER(fadds, float64r32_add, addsub_flags_handler)
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FPU_HELPER(fsub, float64_sub, addsub_flags_handler)
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FPU_HELPER(fsubs, float64r32_sub, addsub_flags_handler)
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FPU_HELPER(fmul, float64_mul, mul_flags_handler)
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FPU_HELPER(fmuls, float64r32_mul, mul_flags_handler)
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FPU_HELPER(fdiv, float64_div, div_flags_handler)
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FPU_HELPER(fdivs, float64r32_div, div_flags_handler)
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/* fsel - fsel. */
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uint64_t helper_FSEL(uint64_t a, uint64_t b, uint64_t c)
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