target/nios2: Convert to 3-phase reset
Convert the nios2 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-id: 20221124115023.2437291-12-peter.maydell@linaro.org
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@ -57,14 +57,16 @@ static bool nios2_cpu_has_work(CPUState *cs)
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void nios2_cpu_reset(DeviceState *dev)
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static void nios2_cpu_reset_hold(Object *obj)
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{
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CPUState *cs = CPU(dev);
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CPUState *cs = CPU(obj);
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Nios2CPU *cpu = NIOS2_CPU(cs);
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Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(cpu);
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CPUNios2State *env = &cpu->env;
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ncc->parent_reset(dev);
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if (ncc->parent_phases.hold) {
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ncc->parent_phases.hold(obj);
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}
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memset(env->ctrl, 0, sizeof(env->ctrl));
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env->pc = cpu->reset_addr;
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@ -371,11 +373,13 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
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DeviceClass *dc = DEVICE_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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Nios2CPUClass *ncc = NIOS2_CPU_CLASS(oc);
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ResettableClass *rc = RESETTABLE_CLASS(oc);
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device_class_set_parent_realize(dc, nios2_cpu_realizefn,
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&ncc->parent_realize);
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device_class_set_props(dc, nios2_properties);
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device_class_set_parent_reset(dc, nios2_cpu_reset, &ncc->parent_reset);
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resettable_class_set_parent_phases(rc, NULL, nios2_cpu_reset_hold, NULL,
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&ncc->parent_phases);
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cc->class_by_name = nios2_cpu_class_by_name;
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cc->has_work = nios2_cpu_has_work;
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@ -37,7 +37,7 @@ OBJECT_DECLARE_CPU_TYPE(Nios2CPU, Nios2CPUClass, NIOS2_CPU)
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/**
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* Nios2CPUClass:
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* @parent_reset: The parent class' reset handler.
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* @parent_phases: The parent class' reset phase handlers.
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*
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* A Nios2 CPU model.
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*/
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@ -47,7 +47,7 @@ struct Nios2CPUClass {
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/*< public >*/
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DeviceRealize parent_realize;
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DeviceReset parent_reset;
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ResettablePhases parent_phases;
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};
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#define TARGET_HAS_ICE 1
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