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target/nios2: Convert to 3-phase reset

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Convert the nios2 CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20221124115023.2437291-12-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-11-24 11:50:14 +00:00
parent c08dfb7ae2
commit 4245a71662
2 changed files with 10 additions and 6 deletions
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12
target/nios2/cpu.c
View File

@ -57,14 +57,16 @@ static bool nios2_cpu_has_work(CPUState *cs)
return cs->interrupt_request & CPU_INTERRUPT_HARD; return cs->interrupt_request & CPU_INTERRUPT_HARD;
} }
static void nios2_cpu_reset(DeviceState *dev) static void nios2_cpu_reset_hold(Object *obj)
{ {
CPUState *cs = CPU(dev); CPUState *cs = CPU(obj);
Nios2CPU *cpu = NIOS2_CPU(cs); Nios2CPU *cpu = NIOS2_CPU(cs);
Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(cpu); Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(cpu);
CPUNios2State *env = &cpu->env; CPUNios2State *env = &cpu->env;
ncc->parent_reset(dev); if (ncc->parent_phases.hold) {
ncc->parent_phases.hold(obj);
}
memset(env->ctrl, 0, sizeof(env->ctrl)); memset(env->ctrl, 0, sizeof(env->ctrl));
env->pc = cpu->reset_addr; env->pc = cpu->reset_addr;
@ -371,11 +373,13 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc);
CPUClass *cc = CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(oc);
Nios2CPUClass *ncc = NIOS2_CPU_CLASS(oc); Nios2CPUClass *ncc = NIOS2_CPU_CLASS(oc);
ResettableClass *rc = RESETTABLE_CLASS(oc);
device_class_set_parent_realize(dc, nios2_cpu_realizefn, device_class_set_parent_realize(dc, nios2_cpu_realizefn,
&ncc->parent_realize); &ncc->parent_realize);
device_class_set_props(dc, nios2_properties); device_class_set_props(dc, nios2_properties);
device_class_set_parent_reset(dc, nios2_cpu_reset, &ncc->parent_reset); resettable_class_set_parent_phases(rc, NULL, nios2_cpu_reset_hold, NULL,
&ncc->parent_phases);
cc->class_by_name = nios2_cpu_class_by_name; cc->class_by_name = nios2_cpu_class_by_name;
cc->has_work = nios2_cpu_has_work; cc->has_work = nios2_cpu_has_work;

4
target/nios2/cpu.h
View File

@ -37,7 +37,7 @@ OBJECT_DECLARE_CPU_TYPE(Nios2CPU, Nios2CPUClass, NIOS2_CPU)
/** /**
* Nios2CPUClass: * Nios2CPUClass:
* @parent_reset: The parent class' reset handler. * @parent_phases: The parent class' reset phase handlers.
* *
* A Nios2 CPU model. * A Nios2 CPU model.
*/ */
@ -47,7 +47,7 @@ struct Nios2CPUClass {
/*< public >*/ /*< public >*/
DeviceRealize parent_realize; DeviceRealize parent_realize;
DeviceReset parent_reset; ResettablePhases parent_phases;
}; };
#define TARGET_HAS_ICE 1 #define TARGET_HAS_ICE 1