linux-user/riscv: Adjust vdso signal frame cfa offsets
A typo in sizeof_reg put the registers at the wrong offset. Simplify the expressions to use positive addresses from the start of uc_mcontext instead of negative addresses from the end of uc_mcontext. Reported-by: Vineet Gupta <vineetg@rivosinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -101,12 +101,12 @@ endf __vdso_flush_icache
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.cfi_startproc simple
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.cfi_signal_frame
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#define sizeof_reg (__riscv_xlen / 4)
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#define sizeof_reg (__riscv_xlen / 8)
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#define sizeof_freg 8
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#define B_GR (offsetof_uc_mcontext - sizeof_rt_sigframe)
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#define B_FR (offsetof_uc_mcontext - sizeof_rt_sigframe + offsetof_freg0)
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#define B_GR 0
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#define B_FR offsetof_freg0
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.cfi_def_cfa 2, sizeof_rt_sigframe
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.cfi_def_cfa 2, offsetof_uc_mcontext
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/* Return address */
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.cfi_return_column 64
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