From 1b21fe27e75a59bfe2513f5abcc6a18cfc35cfc8 Mon Sep 17 00:00:00 2001
From: Richard Henderson <richard.henderson@linaro.org>
Date: Sat, 13 Jan 2024 09:02:38 +1100
Subject: [PATCH] linux-user/riscv: Adjust vdso signal frame cfa offsets
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
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A typo in sizeof_reg put the registers at the wrong offset.

Simplify the expressions to use positive addresses from the
start of uc_mcontext instead of negative addresses from the
end of uc_mcontext.

Reported-by: Vineet Gupta <vineetg@rivosinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 linux-user/riscv/vdso-32.so | Bin 2900 -> 2980 bytes
 linux-user/riscv/vdso-64.so | Bin 3856 -> 3944 bytes
 linux-user/riscv/vdso.S     |   8 ++++----
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/linux-user/riscv/vdso-32.so b/linux-user/riscv/vdso-32.so
index 1ad1e5cbbbb8b1fe36b0fe4bcb6c06fab8219ecd..c2ce2a4757900a16b891bb98f7a027ac30c47a5f 100755
GIT binary patch
delta 643
zcmYjPOH5Ni6ur|gwzc+9XhF0TMNp`GR6Zh~mKGzXLQ}<nX)IXKDriMfutkSuO^l&=
z8%#8QLeLmPh&6@~q8pbkjmE?!?quJE3vZFdn`GwPbMD;S+&S~jvFMz4i@%wQ7Lm>j
z)#}rFqIBkAs)(L%{#f{&3ii(}e_yh8Pgey7+LRKpj+~BYkcbM&LN$yL<+mtroa4HJ
zZMB#&#N4vYgN#$Ed?)jGwn>u^j$uL6%5;@6#JIs26v~>`CEXn6`%uX09<>tLIBejZ
zFY)AcUK{^`w8`*U60=@WX3@OR=)D9Xp?Lu9eduPPPr;Cc@g53huwxpgyD;B@WePiQ
z!+Hz5CSkh?Bv5z*_UkB`K=C*n*Cd=*Q4&Y#73{u@vN7x##oicPmry<e_b@6hVqXON
zFQ9S|2hOAF9IC@O7{Z}G)C5s`8lF=)d=hm5)OVx7i^fk9N7f~du1OqQm1z1X(fmQ8
z<-J7fip23{iMDqVC*Df5zmc$aEJ<`ON_4%FJY|0RKiMa`*FxkJpP`=5Nj~S5mxeB>
ze%vHqR9p0zd0b`2Q|4;3R+vXr`7g}X=20v*GSM6w@2yKv<qSmwLw&w8y?%;@!u|f9
zz(BYsnvEJuwVHOJBuy@TzIRS}W~$!$N`A#>wky9(Ht|*2WbKiW=;xN^G26tL(qVS~
E1D4W)y8r+H

delta 565
zcmZ1?eno780^^#Aisp<K6C<@*Em#>CEGBkVi#XS5FJ{d(y6ALK`0fjZ#F<&4uOCj9
zVB90Pf`x%0f`NfSh=GSe3rO=!e#$6sXaLm50TmSm(hNX850vi%q*ajQ?SOoV&8AHG
zjA8<eK<j|q3?Ll<q^AJsKMa$1G0W9o0CGY0Fa+=^r0_8?2mqM|Kn&8N0}=;<DG-W*
zxhg1_fw9JcQJRNo11qaTN@G$}LUUY8OlwqIM0;3ANM}%2K(}9yPp?;>N59(ymx)f3
z946aMv6*T$&0@OQ43n8gvkYeI&C!{wHBV!{+5(q_PELy)7TYbcS!%V+V!7E0la)rR
z3|8x{(OIjtPGh~=29=FUn-n(7ZIRh3wM}BX*bb4MLc0WZ^X=i;%e9YVKO5Mwb2h(Z
zS<c9~V)8^beIR)dNIFdZ$Yx)U92QkTA0UTlACNDB6n1lfeB`j*0Oa!^$sYmok;9rH
zIXR%X(kC%nFP}lBf+5}|($CS?)0rVYAjsd@)g?5@HGcDYc1dQ&H<K4~2~WPm#ls4+
se#PXsT<YM+cb+_vTX?b#w*X_!WLs`^RvUH(hMQoq8lafy<X&!Z0L@r})Bpeg

diff --git a/linux-user/riscv/vdso-64.so b/linux-user/riscv/vdso-64.so
index 83992bebe6d0182f24edfffc531015fd2f4e1cfb..ae49f5b043b5941b9d304a056c2b50c185f413b0 100755
GIT binary patch
delta 646
zcmZWmUr1A79KGMY?$6b`wWF>%t*xcjTq|2?Y1y{IoJiPMVG&Z%B2pwIB5I9(EFvNz
z?)pL^MhuHse{pSyL_`lkFFpi~An2jTdJL*3ANrQJmv!LB`8el0AAG-~d%k&ezwB?w
z2F6$=o7t~c%+g;}vY+2KKi``ijg36bKRDF->-VRR@qD&8Un;XH#&qseT&%$Rm2UT<
z5wR{OC8yv<Nt1Fsqqy8}YuvEmmP<wD5_3*7Ng5DRT5w!&LGU==ZEB~WIB7zu!XYLo
zrbB2|uHxr1NlGelKw{}AYt!U8*%Xz)E<;X3NullnOy^-f2g_Mlr=gxf{S+D|p`C{9
z6znIl;shMWfum>~N7E5BABJ-bD-Xhz0JX&79!2Xuw2ffZFjf!2GYIb<tck++hOqWE
zq5T!1V}Z~)Pgqwbtba-H&k?#_5CYE#8=eq?1;WNhgiQ|#-Lr(vc|zzuVM~s%^&X+;
zE}?gZu<Z_E`)xv>PUycy@b0)t*m;96aGkL08X<g@5V=C)*VSz-@lJE8^u?@+F0z>>
zzGUeUrG%_8_LX0>9{X?YDUqp`qVpeCm%D6~@^8O6!(HS))fFn#xbF-%SEEbG<V5e#
zU|*s%p~mXuVa5Zphkvj+RNc6#^Y69@tMD#+L~gP0Nqd+r@W=LunynXa3e51L=KTW|
Cbc<&I

delta 523
zcmaDMH$iTK2Ga$uiCSTd6%!l%IV;#0z@TE{&Eq0-y=7zemwaL`Tf>?2`}67j2EFQ>
zo3}9LFfy7<R%8}u^qFkQtS?yr)xrVM$sh`(g&24k940q1i%X`U$=X3>BQ|eju4WV!
zVPs&i0SYMq=>Q<@1Ed)yJF+U*UjQ<AfEWY>fLI5JPe5rP#V`Xz00DDVP%r~yjRT`J
z57PlQR)-eG#s<cwn&yg@lGcK@oc4^4l+J{%nC^(4kluhkpMH-CE)yLl*-W;WVlvfW
zn$C2M87easX35N!m?JV*U>?tWjs-3YofbJbEw)=?v(##t#d5P1CM%6r8LZY@qqA0P
zoyK~#4JsRzHYseD+aj}7YMaD%u^l2ig?0(-=G()wmunx#evpSj4qh<1k!|y419kyW
za5-|gGn!0n6rMbX!-TP6@<on##+1p1oZ^xu(C~qIwGXHh6nYVp6M?emVY>k;>oa*G
zP}TuWFGF&2M1Z-gk@Mz*obD`4Zx|+X@#%5GYydif&z`YjawDHTFrX$M;<IB+n9Rs;
L&uBT>kzXAEcnEna

diff --git a/linux-user/riscv/vdso.S b/linux-user/riscv/vdso.S
index a86d8fc488..c37275233a 100644
--- a/linux-user/riscv/vdso.S
+++ b/linux-user/riscv/vdso.S
@@ -101,12 +101,12 @@ endf __vdso_flush_icache
 	.cfi_startproc simple
 	.cfi_signal_frame
 
-#define sizeof_reg	(__riscv_xlen / 4)
+#define sizeof_reg	(__riscv_xlen / 8)
 #define sizeof_freg	8
-#define B_GR	(offsetof_uc_mcontext - sizeof_rt_sigframe)
-#define B_FR	(offsetof_uc_mcontext - sizeof_rt_sigframe + offsetof_freg0)
+#define B_GR	0
+#define B_FR	offsetof_freg0
 
-	.cfi_def_cfa	2, sizeof_rt_sigframe
+	.cfi_def_cfa	2, offsetof_uc_mcontext
 
 	/* Return address */
 	.cfi_return_column 64