tcg/tci: Support bswap flags
The existing interpreter zero-extends, ignoring high bits. Simply add a separate sign-extension opcode if required. Ensure that the interpreter supports ext16s when bswap16 is enabled. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -808,7 +808,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
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regs[r0] = (int8_t)regs[r1];
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break;
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#endif
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#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
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#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 || \
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TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64
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CASE_32_64(ext16s)
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tci_args_rr(insn, &r0, &r1);
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regs[r0] = (int16_t)regs[r1];
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@ -597,6 +597,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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const TCGArg args[TCG_MAX_OP_ARGS],
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const int const_args[TCG_MAX_OP_ARGS])
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{
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TCGOpcode exts;
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switch (opc) {
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case INDEX_op_exit_tb:
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tcg_out_op_p(s, opc, (void *)args[0]);
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@ -710,13 +712,28 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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CASE_64(ext32u) /* Optional (TCG_TARGET_HAS_ext32u_i64). */
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CASE_64(ext_i32)
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CASE_64(extu_i32)
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CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */
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CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */
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CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */
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CASE_32_64(ctpop) /* Optional (TCG_TARGET_HAS_ctpop_*). */
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case INDEX_op_bswap32_i32: /* Optional (TCG_TARGET_HAS_bswap32_i32). */
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case INDEX_op_bswap64_i64: /* Optional (TCG_TARGET_HAS_bswap64_i64). */
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tcg_out_op_rr(s, opc, args[0], args[1]);
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break;
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case INDEX_op_bswap16_i32: /* Optional (TCG_TARGET_HAS_bswap16_i32). */
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exts = INDEX_op_ext16s_i32;
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goto do_bswap;
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case INDEX_op_bswap16_i64: /* Optional (TCG_TARGET_HAS_bswap16_i64). */
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exts = INDEX_op_ext16s_i64;
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goto do_bswap;
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case INDEX_op_bswap32_i64: /* Optional (TCG_TARGET_HAS_bswap32_i64). */
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exts = INDEX_op_ext32s_i64;
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do_bswap:
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/* The base tci bswaps zero-extend, and ignore high bits. */
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tcg_out_op_rr(s, opc, args[0], args[1]);
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if (args[2] & TCG_BSWAP_OS) {
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tcg_out_op_rr(s, exts, args[0], args[0]);
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}
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break;
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CASE_32_64(add2)
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CASE_32_64(sub2)
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tcg_out_op_rrrrrr(s, opc, args[0], args[1], args[2],
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