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riscv: virt: Remove target macro conditionals

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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Message-id: aed1174c2efd2f050fa5bd8f524d68795b12c0e4.1608142916.git.alistair.francis@wdc.com
This commit is contained in:
Alistair Francis 2020-12-16 10:22:34 -08:00
parent dc4d4aaee3
commit 09fe17125e
2 changed files with 1 additions and 7 deletions
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2
hw/riscv/virt.c
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@ -704,7 +704,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
mc->desc = "RISC-V VirtIO board"; mc->desc = "RISC-V VirtIO board";
mc->init = virt_machine_init; mc->init = virt_machine_init;
mc->max_cpus = VIRT_CPUS_MAX; mc->max_cpus = VIRT_CPUS_MAX;
mc->default_cpu_type = VIRT_CPU; mc->default_cpu_type = TYPE_RISCV_CPU_BASE;
mc->pci_allow_0_address = true; mc->pci_allow_0_address = true;
mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids; mc->possible_cpu_arch_ids = riscv_numa_possible_cpu_arch_ids;
mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props; mc->cpu_index_to_instance_props = riscv_numa_cpu_index_to_props;

6
include/hw/riscv/virt.h
View File

@ -89,10 +89,4 @@ enum {
#define FDT_INT_MAP_WIDTH (FDT_PCI_ADDR_CELLS + FDT_PCI_INT_CELLS + 1 + \ #define FDT_INT_MAP_WIDTH (FDT_PCI_ADDR_CELLS + FDT_PCI_INT_CELLS + 1 + \
FDT_PLIC_ADDR_CELLS + FDT_PLIC_INT_CELLS) FDT_PLIC_ADDR_CELLS + FDT_PLIC_INT_CELLS)
#if defined(TARGET_RISCV32)
#define VIRT_CPU TYPE_RISCV_CPU_BASE32
#elif defined(TARGET_RISCV64)
#define VIRT_CPU TYPE_RISCV_CPU_BASE64
#endif
#endif #endif