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openpic: fix timer address decoding

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The timer memory range begins at 0x10f0, so that address 0x1120 shows
up as 0x30, 0x1130 shows up as 0x40, etc.  However, the address
decoding (other than TFRR) is not adjusted for this, causing the
wrong registers to be accessed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Scott Wood 2013-01-21 15:53:52 +00:00 committed by Alexander Graf
parent f40c360c0d
commit 03274d44f6
1 changed files with 7 additions and 3 deletions
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10
hw/openpic.c
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@ -792,19 +792,23 @@ static void openpic_tmr_write(void *opaque, hwaddr addr, uint64_t val,
OpenPICState *opp = opaque;
int idx;
addr += 0x10f0;
DPRINTF("%s: addr %#" HWADDR_PRIx " <= %08" PRIx64 "\n",
__func__, addr, val);
if (addr & 0xF) {
return;
}
idx = (addr >> 6) & 0x3;
addr = addr & 0x30;
if (addr == 0x0) {
if (addr == 0x10f0) {
/* TFRR */
opp->tfrr = val;
return;
}
idx = (addr >> 6) & 0x3;
addr = addr & 0x30;
switch (addr & 0x30) {
case 0x00: /* TCCR */
break;