tcg/arm: Implement TCG_TARGET_HAS_rotv_vec
Implement via expansion, so don't actually set TCG_TARGET_HAS_rotv_vec. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -2970,6 +2970,8 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
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case INDEX_op_shrv_vec:
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case INDEX_op_sarv_vec:
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case INDEX_op_rotli_vec:
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case INDEX_op_rotlv_vec:
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case INDEX_op_rotrv_vec:
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return -1;
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default:
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return 0;
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@ -2980,7 +2982,7 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
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TCGArg a0, ...)
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{
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va_list va;
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TCGv_vec v0, v1, v2, t1;
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TCGv_vec v0, v1, v2, t1, t2, c1;
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TCGArg a2;
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va_start(va, a0);
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@ -3025,6 +3027,37 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
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tcg_temp_free_vec(t1);
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break;
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case INDEX_op_rotlv_vec:
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v2 = temp_tcgv_vec(arg_temp(a2));
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t1 = tcg_temp_new_vec(type);
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c1 = tcg_constant_vec(type, vece, 8 << vece);
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tcg_gen_sub_vec(vece, t1, v2, c1);
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/* Right shifts are negative left shifts for NEON. */
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vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(t1),
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tcgv_vec_arg(v1), tcgv_vec_arg(t1));
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vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(v0),
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tcgv_vec_arg(v1), tcgv_vec_arg(v2));
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tcg_gen_or_vec(vece, v0, v0, t1);
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tcg_temp_free_vec(t1);
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break;
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case INDEX_op_rotrv_vec:
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v2 = temp_tcgv_vec(arg_temp(a2));
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t1 = tcg_temp_new_vec(type);
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t2 = tcg_temp_new_vec(type);
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c1 = tcg_constant_vec(type, vece, 8 << vece);
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tcg_gen_neg_vec(vece, t1, v2);
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tcg_gen_sub_vec(vece, t2, c1, v2);
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/* Right shifts are negative left shifts for NEON. */
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vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(t1),
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tcgv_vec_arg(v1), tcgv_vec_arg(t1));
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vec_gen_3(INDEX_op_arm_ushl_vec, type, vece, tcgv_vec_arg(t2),
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tcgv_vec_arg(v1), tcgv_vec_arg(t2));
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tcg_gen_or_vec(vece, v0, t1, t2);
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tcg_temp_free_vec(t1);
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tcg_temp_free_vec(t2);
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break;
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default:
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g_assert_not_reached();
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}
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