2006-04-28 01:32:09 +04:00
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/*
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* SHIX 2.0 board description
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2007-09-17 01:08:06 +04:00
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*
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2006-04-28 01:32:09 +04:00
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* Copyright (c) 2005 Samuel Tardieu
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2007-09-17 01:08:06 +04:00
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*
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2006-04-28 01:32:09 +04:00
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2007-09-17 01:08:06 +04:00
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/*
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2006-04-28 01:32:09 +04:00
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Shix 2.0 board by Alexis Polti, described at
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http://perso.enst.fr/~polti/realisations/shix20/
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More information in target-sh4/README.sh4
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*/
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2013-02-04 18:40:22 +04:00
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#include "hw/hw.h"
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2013-02-05 20:06:20 +04:00
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#include "hw/sh4/sh.h"
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2012-12-17 21:20:04 +04:00
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#include "sysemu/sysemu.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/boards.h"
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#include "hw/loader.h"
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2012-12-17 21:19:49 +04:00
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#include "exec/address-spaces.h"
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2006-04-28 01:32:09 +04:00
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#define BIOS_FILENAME "shix_bios.bin"
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#define BIOS_ADDRESS 0xA0000000
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2012-10-16 00:22:02 +04:00
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static void shix_init(QEMUMachineInitArgs *args)
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2006-04-28 01:32:09 +04:00
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{
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2012-10-16 00:22:02 +04:00
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const char *cpu_model = args->cpu_model;
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2006-04-28 01:32:09 +04:00
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int ret;
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2013-04-09 18:51:24 +04:00
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SuperHCPU *cpu;
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2006-04-28 01:32:09 +04:00
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struct SH7750State *s;
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2011-10-06 14:52:27 +04:00
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *rom = g_new(MemoryRegion, 1);
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MemoryRegion *sdram = g_new(MemoryRegion, 2);
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2007-11-10 18:15:54 +03:00
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if (!cpu_model)
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cpu_model = "any";
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2006-04-28 01:32:09 +04:00
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printf("Initializing CPU\n");
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2013-04-09 18:51:24 +04:00
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cpu = cpu_sh4_init(cpu_model);
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if (cpu == NULL) {
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2013-04-09 18:51:23 +04:00
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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2006-04-28 01:32:09 +04:00
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/* Allocate memory space */
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printf("Allocating ROM\n");
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2013-06-06 13:41:28 +04:00
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memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
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2011-12-20 17:59:12 +04:00
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vmstate_register_ram_global(rom);
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2011-10-06 14:52:27 +04:00
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memory_region_set_readonly(rom, true);
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memory_region_add_subregion(sysmem, 0x00000000, rom);
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2006-04-28 01:32:09 +04:00
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printf("Allocating SDRAM 1\n");
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2013-06-06 13:41:28 +04:00
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memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
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2011-12-20 17:59:12 +04:00
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vmstate_register_ram_global(&sdram[0]);
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2011-10-06 14:52:27 +04:00
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memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
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2006-04-28 01:32:09 +04:00
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printf("Allocating SDRAM 2\n");
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2013-06-06 13:41:28 +04:00
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memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
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2011-12-20 17:59:12 +04:00
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vmstate_register_ram_global(&sdram[1]);
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2011-10-06 14:52:27 +04:00
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memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
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2006-04-28 01:32:09 +04:00
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/* Load BIOS in 0 (and access it through P2, 0xA0000000) */
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2007-10-05 17:08:35 +04:00
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if (bios_name == NULL)
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bios_name = BIOS_FILENAME;
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printf("%s: load BIOS '%s'\n", __func__, bios_name);
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2009-04-10 00:05:49 +04:00
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ret = load_image_targphys(bios_name, 0, 0x4000);
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2006-04-28 01:32:09 +04:00
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if (ret < 0) { /* Check bios size */
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fprintf(stderr, "ret=%d\n", ret);
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fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
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2007-10-05 17:08:35 +04:00
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bios_name);
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2006-04-28 01:32:09 +04:00
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exit(1);
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}
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/* Register peripherals */
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2013-04-09 18:51:24 +04:00
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s = sh7750_init(cpu, sysmem);
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2006-04-28 01:32:09 +04:00
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/* XXXXX Check success */
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tc58128_init(s, "shix_linux_nand.bin", NULL);
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fprintf(stderr, "initialization terminated\n");
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}
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2009-05-21 03:38:09 +04:00
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static QEMUMachine shix_machine = {
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2008-10-08 00:34:35 +04:00
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.name = "shix",
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.desc = "shix card",
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.init = shix_init,
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2009-05-22 05:41:01 +04:00
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.is_default = 1,
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2006-04-28 01:32:09 +04:00
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};
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2009-05-21 03:38:09 +04:00
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static void shix_machine_init(void)
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{
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qemu_register_machine(&shix_machine);
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}
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machine_init(shix_machine_init);
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