qemu/target/mips/Makefile.objs

obj-y += translate.o cpu.o gdbstub.o helper.o
obj-y += op_helper.o cp0_helper.o fpu_helper.o
obj-y += dsp_helper.o lmmi_helper.o msa_helper.o
obj-$(CONFIG_SOFTMMU) += mips-semi.o
obj-$(CONFIG_SOFTMMU) += machine.o cp0_timer.o
obj-$(CONFIG_KVM) += kvm.o
target/mips: Separate CP0-related helpers into their own file For clarity and easier maintenence, create target/mips/cp0_helper.c, and move all CP0-related content form target/mips/op_helper.c to that file. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Message-Id: <1580745443-24650-2-git-send-email-aleksandar.markovic@rt-rk.com> 2020-02-03 18:57:22 +03:00			`obj-y += translate.o cpu.o gdbstub.o helper.o`
target/mips: Separate FPU-related helpers into their own file For clarity and easier maintenence, create target/mips/fpu_helper.c, and move all FPU-related content form target/mips/op_helper.c to that file. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Message-Id: <1580745443-24650-3-git-send-email-aleksandar.markovic@rt-rk.com> 2020-02-03 18:57:23 +03:00			`obj-y += op_helper.o cp0_helper.o fpu_helper.o`
target/mips: Add Loongson-3 CPU definition Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while Loongson-3A R4 is the newest and its ISA is almost the superset of all others. To reduce complexity, we just define two CPU types: 1) "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is suitable for TCG because Loongson-3A R1 has fewest ASE. 2) "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is suitable for KVM because Loongson-3A R4 has the VZ ASE. Loongson-3A has CONFIG6 and CONFIG7, so add their bit-fields as well. [AM: Rearranged insn_flags, added comments, renamed lmi_helper.c, improved commit message, fixed checkpatch warnings] Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1591065557-9174-3-git-send-email-chenhc@lemote.com> 2020-06-02 05:39:15 +03:00			`obj-y += dsp_helper.o lmmi_helper.o msa_helper.o`
target/mips: only build mips-semi for softmmu The is_uhi gates all semihosting calls and always returns false for CONFIG_USER_ONLY builds. There is no reason to build and link mips-semi for these builds so lets fix that. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> 2019-05-14 15:50:45 +03:00			`obj-$(CONFIG_SOFTMMU) += mips-semi.o`
mips: move hw/mips/cputimer.c to target/mips/ This timer is a required part of the MIPS32/MIPS64 System Control coprocessor (CP0). Moving it with the other architecture related files will allow an opaque use of CPUMIPSState* in the next commit (introduce "internal.h"). also remove it from 'user' targets, remove an unnecessary include. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Igor Mammedov <imammedo@redhat.com> Tested-by: James Hogan <james.hogan@imgtec.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> 2017-09-20 22:49:29 +03:00			`obj-$(CONFIG_SOFTMMU) += machine.o cp0_timer.o`
target-mips: Enable KVM support in build system Enable KVM support for MIPS in the build system. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> 2014-06-18 02:10:36 +04:00			`obj-$(CONFIG_KVM) += kvm.o`