2018-02-28 23:32:37 +03:00
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/*
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* PowerMac MacIO device emulation
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*
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* Copyright (c) 2005-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MACIO_H
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#define MACIO_H
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2018-06-12 19:43:58 +03:00
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#include "hw/char/escc.h"
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2022-12-22 13:03:28 +03:00
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#include "hw/pci/pci_device.h"
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2024-02-23 17:26:33 +03:00
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#include "hw/ide/ide-bus.h"
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2018-02-28 23:32:38 +03:00
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#include "hw/intc/heathrow_pic.h"
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2018-02-28 23:32:37 +03:00
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#include "hw/misc/macio/cuda.h"
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2018-06-12 19:43:58 +03:00
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#include "hw/misc/macio/gpio.h"
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2018-06-12 19:44:02 +03:00
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#include "hw/misc/macio/pmu.h"
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2022-10-28 14:56:27 +03:00
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#include "hw/nvram/mac_nvram.h"
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2018-02-28 23:32:37 +03:00
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#include "hw/ppc/mac_dbdma.h"
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2018-02-28 23:32:41 +03:00
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#include "hw/ppc/openpic.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2018-02-28 23:32:37 +03:00
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2022-10-28 14:56:24 +03:00
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/* Old World IRQs */
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#define OLDWORLD_CUDA_IRQ 0x12
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#define OLDWORLD_ESCCB_IRQ 0x10
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#define OLDWORLD_ESCCA_IRQ 0xf
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#define OLDWORLD_IDE0_IRQ 0xd
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#define OLDWORLD_IDE0_DMA_IRQ 0x2
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#define OLDWORLD_IDE1_IRQ 0xe
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#define OLDWORLD_IDE1_DMA_IRQ 0x3
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/* New World IRQs */
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#define NEWWORLD_CUDA_IRQ 0x19
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#define NEWWORLD_PMU_IRQ 0x19
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#define NEWWORLD_ESCCB_IRQ 0x24
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#define NEWWORLD_ESCCA_IRQ 0x25
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#define NEWWORLD_IDE0_IRQ 0xd
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#define NEWWORLD_IDE0_DMA_IRQ 0x2
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#define NEWWORLD_IDE1_IRQ 0xe
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#define NEWWORLD_IDE1_DMA_IRQ 0x3
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#define NEWWORLD_EXTING_GPIO1 0x2f
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#define NEWWORLD_EXTING_GPIO9 0x37
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2018-08-29 19:59:06 +03:00
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/* MacIO virtual bus */
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#define TYPE_MACIO_BUS "macio-bus"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(MacIOBusState, MACIO_BUS)
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2018-08-29 19:59:06 +03:00
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2020-09-03 23:43:22 +03:00
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struct MacIOBusState {
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2018-08-29 19:59:06 +03:00
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/*< private >*/
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BusState parent_obj;
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2020-09-03 23:43:22 +03:00
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};
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2018-08-29 19:59:06 +03:00
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2018-08-29 19:59:05 +03:00
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/* MacIO IDE */
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#define TYPE_MACIO_IDE "macio-ide"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(MACIOIDEState, MACIO_IDE)
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2018-08-29 19:59:05 +03:00
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2020-09-03 23:43:22 +03:00
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struct MACIOIDEState {
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2018-08-29 19:59:05 +03:00
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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2018-08-29 19:59:07 +03:00
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uint32_t addr;
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2018-08-29 19:59:05 +03:00
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uint32_t channel;
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qemu_irq real_ide_irq;
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qemu_irq real_dma_irq;
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MemoryRegion mem;
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IDEBus bus;
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IDEDMA dma;
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void *dbdma;
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bool dma_active;
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uint32_t timing_reg;
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uint32_t irq_reg;
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2020-09-03 23:43:22 +03:00
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};
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2018-08-29 19:59:05 +03:00
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2024-06-28 19:03:34 +03:00
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#define MACIO_IDE_PMAC_NIRQS 2
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#define MACIO_IDE_PMAC_DMA_IRQ 0
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#define MACIO_IDE_PMAC_IDE_IRQ 1
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2018-08-29 19:59:05 +03:00
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void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
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void macio_ide_register_dma(MACIOIDEState *ide);
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2018-02-28 23:32:37 +03:00
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#define TYPE_MACIO "macio"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(MacIOState, MACIO)
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2018-02-28 23:32:37 +03:00
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2020-09-03 23:43:22 +03:00
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struct MacIOState {
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2018-02-28 23:32:37 +03:00
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/*< private >*/
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PCIDevice parent;
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/*< public >*/
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2018-08-29 19:59:06 +03:00
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MacIOBusState macio_bus;
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2018-02-28 23:32:37 +03:00
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MemoryRegion bar;
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CUDAState cuda;
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2018-06-12 19:44:02 +03:00
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PMUState pmu;
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2018-02-28 23:32:37 +03:00
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DBDMAState dbdma;
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ESCCState escc;
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uint64_t frequency;
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2020-09-03 23:43:22 +03:00
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};
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2018-02-28 23:32:37 +03:00
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#define TYPE_OLDWORLD_MACIO "macio-oldworld"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(OldWorldMacIOState, OLDWORLD_MACIO)
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2018-02-28 23:32:37 +03:00
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2020-09-03 23:43:22 +03:00
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struct OldWorldMacIOState {
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2018-02-28 23:32:37 +03:00
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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2020-12-29 20:56:15 +03:00
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HeathrowState pic;
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2018-02-28 23:32:37 +03:00
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MacIONVRAMState nvram;
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MACIOIDEState ide[2];
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2020-09-03 23:43:22 +03:00
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};
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2018-02-28 23:32:37 +03:00
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#define TYPE_NEWWORLD_MACIO "macio-newworld"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(NewWorldMacIOState, NEWWORLD_MACIO)
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2018-02-28 23:32:37 +03:00
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2020-09-03 23:43:22 +03:00
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struct NewWorldMacIOState {
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2018-02-28 23:32:37 +03:00
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/*< private >*/
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MacIOState parent_obj;
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/*< public >*/
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2018-02-28 23:32:41 +03:00
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2018-06-12 19:43:57 +03:00
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bool has_pmu;
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bool has_adb;
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2020-12-29 20:56:17 +03:00
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OpenPICState pic;
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2018-02-28 23:32:37 +03:00
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MACIOIDEState ide[2];
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2018-06-12 19:43:58 +03:00
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MacIOGPIOState gpio;
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2020-09-03 23:43:22 +03:00
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};
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2018-02-28 23:32:37 +03:00
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#endif /* MACIO_H */
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