2010-05-22 20:52:39 +04:00
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# Trace events for debugging and performance instrumentation
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#
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# This file is processed by the tracetool script during the build.
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#
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# To add a new trace event:
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#
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# 1. Choose a name for the trace event. Declare its arguments and format
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# string.
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#
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# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
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# trace_multiwrite_cb(). The source file must #include "trace.h".
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#
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# Format of a trace event:
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#
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2010-05-24 14:32:09 +04:00
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# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
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2010-05-22 20:52:39 +04:00
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#
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2011-08-31 11:25:35 +04:00
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# Example: g_malloc(size_t size) "size %zu"
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2010-05-22 20:52:39 +04:00
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#
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2010-05-24 14:32:09 +04:00
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# The "disable" keyword will build without the trace event.
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#
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2010-05-22 20:52:39 +04:00
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# The <name> must be a valid as a C function name.
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#
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# Types should be standard C types. Use void * for pointers because the trace
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# system may not have the necessary headers included.
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#
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# The <format-string> should be a sprintf()-compatible format string.
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2010-05-22 21:09:25 +04:00
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2012-02-23 16:23:34 +04:00
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# thread-pool.c
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2013-03-07 16:41:45 +04:00
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thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
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thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
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2012-02-23 16:23:34 +04:00
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thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
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2010-08-11 15:45:11 +04:00
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# ioport.c
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2015-10-16 16:08:34 +03:00
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cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
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cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
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2010-08-11 15:46:03 +04:00
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# balloon.c
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# Since requests are raised via monitor, not many tracepoints are needed.
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2011-08-31 22:31:58 +04:00
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balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
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2016-01-11 20:30:36 +03:00
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virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64
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2016-03-23 17:38:20 +03:00
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virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d"
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virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d"
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2014-11-17 08:11:10 +03:00
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virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d"
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2010-10-20 20:41:28 +04:00
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2015-06-03 23:45:40 +03:00
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# hw/dma/rc4030.c
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jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
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jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
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rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
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rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
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2013-06-07 14:59:21 +04:00
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# hw/dma/sparc32_dma.c
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2011-09-13 16:34:36 +04:00
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ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
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ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
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2011-08-31 22:31:58 +04:00
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sparc32_dma_set_irq_raise(void) "Raise IRQ"
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sparc32_dma_set_irq_lower(void) "Lower IRQ"
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espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
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espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
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sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
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sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
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sparc32_dma_enable_raise(void) "Raise DMA enable"
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sparc32_dma_enable_lower(void) "Lower DMA enable"
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2010-10-31 12:24:14 +03:00
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2013-06-07 14:59:21 +04:00
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# hw/sparc/sun4m.c
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2011-08-31 22:31:58 +04:00
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sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
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sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
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sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
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sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
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2010-10-31 12:24:14 +03:00
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2013-06-07 14:59:21 +04:00
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# hw/dma/sun4m_iommu.c
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2011-08-31 22:31:58 +04:00
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sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
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sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
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2011-09-13 16:34:36 +04:00
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sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
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2011-08-31 22:31:58 +04:00
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sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
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sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
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sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
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sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
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2011-09-13 16:34:36 +04:00
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sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
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2010-11-16 15:20:25 +03:00
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# vl.c
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2011-08-31 22:31:58 +04:00
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vm_state_notify(int running, int reason) "running %d reason %d"
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2013-03-08 14:42:24 +04:00
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load_file(const char *name, const char *path) "name %s location %s"
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2013-03-22 12:26:59 +04:00
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runstate_set(int new_state) "new state %d"
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2014-03-07 00:03:36 +04:00
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system_wakeup_request(int reason) "reason=%d"
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2014-06-21 22:43:03 +04:00
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qemu_system_shutdown_request(void) ""
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qemu_system_powerdown_request(void) ""
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2010-12-06 19:08:01 +03:00
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2013-06-07 14:59:21 +04:00
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# hw/sparc/leon3.c
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2011-08-31 22:31:58 +04:00
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leon3_set_irq(int intno) "Set CPU IRQ %d"
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leon3_reset_irq(int intno) "Reset CPU IRQ %d"
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2011-02-02 00:22:48 +03:00
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2011-01-19 11:49:50 +03:00
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# spice-qemu-char.c
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2011-08-31 22:31:58 +04:00
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spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
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spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
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spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
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spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
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2012-12-05 19:15:34 +04:00
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spice_vmc_event(int event) "spice vmc event %d"
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2011-02-18 01:45:07 +03:00
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2013-06-07 14:59:21 +04:00
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# hw/sd/milkymist-memcard.c
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2011-08-31 22:31:58 +04:00
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milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
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milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
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2011-03-08 01:32:35 +03:00
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2013-06-07 14:59:21 +04:00
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# hw/isa/pc87312.c
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2012-04-15 00:48:35 +04:00
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pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
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pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
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pc87312_info_floppy(uint32_t base) "base 0x%x"
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pc87312_info_ide(uint32_t base) "base 0x%x"
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pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
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pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
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2014-09-23 16:53:31 +04:00
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# xen-hvm.c
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2011-08-31 22:31:58 +04:00
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xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
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2011-12-19 14:07:50 +04:00
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xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
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2015-01-20 14:06:19 +03:00
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xen_ioreq_server_create(uint32_t id) "id: %u"
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xen_ioreq_server_destroy(uint32_t id) "id: %u"
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xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i"
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xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
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xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
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xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
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xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
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xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
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xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
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2015-04-30 21:27:09 +03:00
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handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
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handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
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handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
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cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
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cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
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cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
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cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
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2010-08-31 19:41:25 +04:00
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# xen-mapcache.c
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2011-09-13 16:34:36 +04:00
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xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
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xen_remap_bucket(uint64_t index) "index %#"PRIx64
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2011-08-31 22:31:58 +04:00
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xen_map_cache_return(void* ptr) "%p"
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2010-09-16 16:57:49 +04:00
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2014-09-23 16:53:31 +04:00
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# hw/i386/xen/xen_platform.c
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2011-08-31 22:31:58 +04:00
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xen_platform_log(char *s) "xen platform: %s"
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2011-01-17 19:08:14 +03:00
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# qemu-coroutine.c
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2011-08-31 22:31:58 +04:00
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qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
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qemu_coroutine_yield(void *from, void *to) "from %p to %p"
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qemu_coroutine_terminate(void *co) "self %p"
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2011-06-30 19:56:46 +04:00
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# qemu-coroutine-lock.c
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2013-05-17 17:51:26 +04:00
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qemu_co_queue_run_restart(void *co) "co %p"
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2012-03-12 13:28:34 +04:00
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qemu_co_queue_next(void *nxt) "next %p"
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2011-08-31 22:31:58 +04:00
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qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
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qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
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qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
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qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
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2011-08-07 15:01:05 +04:00
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2011-09-23 11:23:06 +04:00
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# monitor.c
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handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
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monitor_protocol_emitter(void *mon) "mon %p"
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monitor: Simplify event throttling
The event throttling state machine is hard to understand. I'm not
sure it's entirely correct. Rewrite it in a more straightforward
manner:
State 1: No event sent recently (less than evconf->rate ns ago)
Invariant: evstate->timer is not pending, evstate->qdict is null
On event: send event, arm timer, goto state 2
State 2: Event sent recently, no additional event being delayed
Invariant: evstate->timer is pending, evstate->qdict is null
On event: store it in evstate->qdict, goto state 3
On timer: goto state 1
State 3: Event sent recently, additional event being delayed
Invariant: evstate->timer is pending, evstate->qdict is non-null
On event: store it in evstate->qdict, goto state 3
On timer: send evstate->qdict, clear evstate->qdict,
arm timer, goto state 2
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <1444921716-9511-3-git-send-email-armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2015-10-15 18:08:31 +03:00
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monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p"
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2012-06-14 21:12:57 +04:00
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monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
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monitor: Simplify event throttling
The event throttling state machine is hard to understand. I'm not
sure it's entirely correct. Rewrite it in a more straightforward
manner:
State 1: No event sent recently (less than evconf->rate ns ago)
Invariant: evstate->timer is not pending, evstate->qdict is null
On event: send event, arm timer, goto state 2
State 2: Event sent recently, no additional event being delayed
Invariant: evstate->timer is pending, evstate->qdict is null
On event: store it in evstate->qdict, goto state 3
On timer: goto state 1
State 3: Event sent recently, additional event being delayed
Invariant: evstate->timer is pending, evstate->qdict is non-null
On event: store it in evstate->qdict, goto state 3
On timer: send evstate->qdict, clear evstate->qdict,
arm timer, goto state 2
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <1444921716-9511-3-git-send-email-armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2015-10-15 18:08:31 +03:00
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monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64
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2012-06-14 21:12:57 +04:00
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monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
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2011-10-16 02:56:45 +04:00
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2011-10-12 17:41:25 +04:00
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# hw/9pfs/virtio-9p.c
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2011-10-24 13:39:49 +04:00
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v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
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2011-10-12 17:41:25 +04:00
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v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
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v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
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2011-10-20 23:55:58 +04:00
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v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
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2016-01-11 20:30:36 +03:00
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v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64
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2011-10-12 17:41:25 +04:00
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v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
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|
|
v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
|
2016-01-11 20:30:36 +03:00
|
|
|
v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
|
|
|
|
v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
|
|
|
|
v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
|
|
|
|
v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
|
|
|
|
v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
|
|
v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
|
|
|
|
v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
|
|
v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
|
|
|
|
v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
2011-12-21 11:07:23 +04:00
|
|
|
v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
|
2011-12-21 11:07:23 +04:00
|
|
|
v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
|
|
|
|
v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
|
|
|
|
v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
|
|
|
|
v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
|
|
|
|
v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
|
|
v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
|
|
|
|
v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
|
|
|
|
v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
|
|
|
|
v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
|
|
|
|
v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
2011-10-20 23:55:58 +04:00
|
|
|
v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
|
|
|
|
v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
|
2016-01-11 20:30:36 +03:00
|
|
|
v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
|
2016-01-11 20:30:36 +03:00
|
|
|
v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
|
2011-10-20 23:55:58 +04:00
|
|
|
v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
|
|
|
|
v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
|
2016-01-11 20:30:36 +03:00
|
|
|
v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64
|
2011-10-12 17:41:25 +04:00
|
|
|
v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
|
|
|
|
v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
|
|
v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
|
2011-09-11 18:51:24 +04:00
|
|
|
|
|
|
|
# target-sparc/mmu_helper.c
|
|
|
|
mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
|
|
|
|
mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
|
2016-01-11 20:30:36 +03:00
|
|
|
mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
|
|
|
|
mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
|
|
|
|
mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
|
|
|
|
mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
|
|
|
|
mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
|
|
|
|
mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
|
2011-09-11 19:05:41 +04:00
|
|
|
|
2013-06-07 14:59:21 +04:00
|
|
|
# target-sparc/int64_helper.c
|
2011-09-11 19:05:41 +04:00
|
|
|
int_helper_set_softint(uint32_t softint) "new %08x"
|
|
|
|
int_helper_clear_softint(uint32_t softint) "new %08x"
|
|
|
|
int_helper_write_softint(uint32_t softint) "new %08x"
|
2013-06-07 14:59:21 +04:00
|
|
|
|
|
|
|
# target-sparc/int32_helper.c
|
2011-09-11 19:05:41 +04:00
|
|
|
int_helper_icache_freeze(void) "Instruction cache: freeze"
|
|
|
|
int_helper_dcache_freeze(void) "Data cache: freeze"
|
2011-09-11 19:53:35 +04:00
|
|
|
|
|
|
|
# target-sparc/win_helper.c
|
|
|
|
win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
|
|
|
|
win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
|
|
|
|
win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
|
|
|
|
win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
|
|
|
|
win_helper_done(uint32_t tl) "tl=%d"
|
|
|
|
win_helper_retry(uint32_t tl) "tl=%d"
|
2011-11-24 15:15:28 +04:00
|
|
|
|
|
|
|
# dma-helpers.c
|
2016-05-23 15:54:05 +03:00
|
|
|
dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d"
|
2011-11-24 15:15:28 +04:00
|
|
|
dma_aio_cancel(void *dbs) "dbs=%p"
|
|
|
|
dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
|
2014-10-07 15:59:18 +04:00
|
|
|
dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
|
2011-11-24 15:15:28 +04:00
|
|
|
dma_map_wait(void *dbs) "dbs=%p"
|
2012-03-11 20:11:26 +04:00
|
|
|
|
2013-06-07 14:59:21 +04:00
|
|
|
# ui/console.c
|
2013-03-07 19:04:52 +04:00
|
|
|
console_gfx_new(void) ""
|
2013-11-10 19:04:16 +04:00
|
|
|
console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters"
|
|
|
|
console_putchar_unhandled(int ch) "unhandled escape character '%c'"
|
2013-03-07 19:04:52 +04:00
|
|
|
console_txt_new(int w, int h) "%dx%d"
|
|
|
|
console_select(int nr) "%d"
|
2013-03-14 14:56:16 +04:00
|
|
|
console_refresh(int interval) "interval %d ms"
|
2013-02-28 13:48:02 +04:00
|
|
|
displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
|
2014-06-18 13:03:15 +04:00
|
|
|
displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x"
|
2016-04-01 11:27:20 +03:00
|
|
|
displaysurface_create_pixman(void *display_surface) "surface=%p"
|
2013-02-28 13:48:02 +04:00
|
|
|
displaysurface_free(void *display_surface) "surface=%p"
|
2012-11-13 17:51:41 +04:00
|
|
|
displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
|
|
|
|
displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
|
2012-03-11 20:11:27 +04:00
|
|
|
ppm_save(const char *filename, void *display_surface) "%s surface=%p"
|
2013-06-07 14:59:21 +04:00
|
|
|
|
2013-11-10 19:24:02 +04:00
|
|
|
# ui/gtk.c
|
2014-05-06 12:27:54 +04:00
|
|
|
gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d"
|
|
|
|
gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
|
|
|
|
gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)"
|
2015-09-09 11:12:20 +03:00
|
|
|
gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s"
|
|
|
|
gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s"
|
2013-11-10 19:24:02 +04:00
|
|
|
|
2014-05-21 15:18:20 +04:00
|
|
|
# ui/vnc.c
|
|
|
|
vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
|
|
|
|
vnc_key_map_init(const char *layout) "%s"
|
|
|
|
vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]"
|
|
|
|
vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]"
|
|
|
|
vnc_key_sync_numlock(bool on) "%d"
|
|
|
|
vnc_key_sync_capslock(bool on) "%d"
|
|
|
|
|
2013-12-04 18:20:05 +04:00
|
|
|
# ui/input.c
|
2014-05-21 15:49:59 +04:00
|
|
|
input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d"
|
2013-12-04 18:20:05 +04:00
|
|
|
input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d"
|
|
|
|
input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d"
|
|
|
|
input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d"
|
|
|
|
input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x"
|
|
|
|
input_event_sync(void) ""
|
2013-12-05 14:24:14 +04:00
|
|
|
input_mouse_mode(int absolute) "absolute %d"
|
2013-12-04 18:20:05 +04:00
|
|
|
|
2013-06-07 14:59:21 +04:00
|
|
|
# ui/spice-display.c
|
|
|
|
qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
|
|
|
|
qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
|
|
|
|
qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
|
|
|
|
qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
|
|
|
|
qemu_spice_wakeup(uint32_t qid) "%d"
|
|
|
|
qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
|
|
|
|
|
|
|
|
# hw/ppc/spapr_pci.c
|
2014-05-30 13:34:20 +04:00
|
|
|
spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
|
2012-08-07 20:10:37 +04:00
|
|
|
spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
|
2014-05-30 13:34:20 +04:00
|
|
|
spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
|
2012-08-07 20:10:37 +04:00
|
|
|
spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
|
|
|
|
spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
|
2012-08-07 20:10:36 +04:00
|
|
|
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
|
2014-05-30 13:34:20 +04:00
|
|
|
spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
|
2012-11-12 20:46:54 +04:00
|
|
|
|
2015-01-16 22:20:51 +03:00
|
|
|
# hw/pci/pci.c
|
2015-09-02 00:33:23 +03:00
|
|
|
pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
|
|
|
|
pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
|
2015-01-16 22:20:51 +03:00
|
|
|
|
2014-05-23 06:26:54 +04:00
|
|
|
# hw/ppc/spapr.c
|
|
|
|
spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
|
|
|
|
spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
|
|
|
|
|
spapr: Implement processor compatibility in ibm, client-architecture-support
Modern Linux kernels support last POWERPC CPUs so when a kernel boots,
in most cases it can find a matching cpu_spec in the kernel's cpu_specs
list. However if the kernel is quite old, it may be missing a definition
of the actual CPU. To provide an ability for old kernels to work on modern
hardware, a Processor Compatibility Mode has been introduced
by the PowerISA specification.
>From the hardware prospective, it is supported by the Processor
Compatibility Register (PCR) which is defined in PowerISA. The register
enables one of the compatibility modes (2.05/2.06/2.07).
Since PCR is a hypervisor privileged register and cannot be
directly accessed from the guest, the mode selection is done via
ibm,client-architecture-support (CAS) RTAS call using which the guest
specifies what "raw" and "architected" CPU versions it supports.
QEMU works out the best match, changes a "cpu-version" property of
every CPU and notifies the guest about the change by setting these
properties in the buffer passed as a response on a custom H_CAS hypercall.
This implements ibm,client-architecture-support parameters parsing
(now only for PVRs) and cooks the device tree diff with new values for
"cpu-version", "ibm,ppc-interrupt-server#s" and
"ibm,ppc-interrupt-server#s" properties.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-05-23 06:26:57 +04:00
|
|
|
# hw/ppc/spapr_hcall.c
|
|
|
|
spapr_cas_pvr_try(uint32_t pvr) "%x"
|
|
|
|
spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64
|
|
|
|
|
2013-08-29 12:05:00 +04:00
|
|
|
# hw/ppc/spapr_iommu.c
|
|
|
|
spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
|
2014-02-21 13:29:06 +04:00
|
|
|
spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
|
2014-05-27 09:36:30 +04:00
|
|
|
spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
|
|
|
|
spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
|
2015-05-07 08:33:33 +03:00
|
|
|
spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
|
|
|
|
spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
|
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|
spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
|
|
|
|
spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
|
2013-08-29 12:05:00 +04:00
|
|
|
spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
|
2016-05-04 09:52:19 +03:00
|
|
|
spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d"
|
2016-06-01 11:57:34 +03:00
|
|
|
spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
|
|
|
|
spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
|
2013-08-29 12:05:00 +04:00
|
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|
|
2014-05-01 14:37:09 +04:00
|
|
|
# hw/ppc/ppc.c
|
|
|
|
ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
|
|
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|
|
2015-10-16 16:16:11 +03:00
|
|
|
# hw/ppc/prep.c
|
|
|
|
prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
|
|
|
|
prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
|
|
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|
|
2015-06-26 21:01:00 +03:00
|
|
|
# target-s390x/mmu_helper.c
|
|
|
|
get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d"
|
|
|
|
set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d"
|
|
|
|
|
2013-01-24 06:28:05 +04:00
|
|
|
# target-s390x/ioinst.c
|
|
|
|
ioinst(const char *insn) "IOINST: %s"
|
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|
|
ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
|
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|
|
ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
|
|
|
|
ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
|
2013-01-24 06:28:06 +04:00
|
|
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|
|
|
|
# hw/s390x/css.c
|
|
|
|
css_enable_facility(const char *facility) "CSS: enable %s"
|
|
|
|
css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
|
|
|
|
css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
|
|
|
|
css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
|
|
|
|
css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
|
|
|
|
css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
|
2013-02-06 13:31:37 +04:00
|
|
|
css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)"
|
2013-01-24 10:08:55 +04:00
|
|
|
|
|
|
|
# hw/s390x/virtio-ccw.c
|
|
|
|
virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
|
|
|
|
virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
|
2016-06-02 11:57:37 +03:00
|
|
|
virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": %x->%x"
|
2013-02-22 20:36:19 +04:00
|
|
|
|
2013-03-29 08:27:05 +04:00
|
|
|
# kvm-all.c
|
2013-09-04 14:26:25 +04:00
|
|
|
kvm_ioctl(int type, void *arg) "type 0x%x, arg %p"
|
|
|
|
kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p"
|
|
|
|
kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p"
|
2013-03-29 08:27:52 +04:00
|
|
|
kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
|
2014-02-26 21:20:00 +04:00
|
|
|
kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p"
|
2014-05-09 12:06:46 +04:00
|
|
|
kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s"
|
|
|
|
kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s"
|
2013-03-29 08:27:52 +04:00
|
|
|
|
2014-09-23 16:53:31 +04:00
|
|
|
# target-ppc/kvm.c
|
|
|
|
kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
|
|
|
|
kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
|
|
|
|
|
2014-08-01 20:08:57 +04:00
|
|
|
# TCG related tracing (mostly disabled by default)
|
|
|
|
# cpu-exec.c
|
|
|
|
disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
|
|
|
|
disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
|
2016-04-21 15:58:23 +03:00
|
|
|
disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x"
|
2014-08-01 20:08:57 +04:00
|
|
|
|
|
|
|
# translate-all.c
|
|
|
|
translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"
|
|
|
|
|
2013-07-28 16:57:22 +04:00
|
|
|
# memory.c
|
2016-03-02 23:12:54 +03:00
|
|
|
memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
|
|
memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
|
|
memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
|
|
|
|
memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
|
2016-03-02 23:12:55 +03:00
|
|
|
memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
|
|
memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
|
2013-07-28 16:57:22 +04:00
|
|
|
|
2013-05-10 16:16:39 +04:00
|
|
|
# qom/object.c
|
|
|
|
object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
|
|
|
|
object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
|
2013-07-29 14:58:01 +04:00
|
|
|
|
2014-09-23 16:53:31 +04:00
|
|
|
# hw/i386/xen/xen_pvdevice.c
|
2013-07-29 14:58:01 +04:00
|
|
|
xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")"
|
|
|
|
xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")"
|
2013-08-21 08:42:06 +04:00
|
|
|
|
|
|
|
# hw/pci/pci_host.c
|
|
|
|
pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x"
|
|
|
|
pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x"
|
2014-04-11 15:47:40 +04:00
|
|
|
|
2015-09-23 22:04:43 +03:00
|
|
|
# hw/vfio/pci.c
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c"
|
2015-09-23 22:04:43 +03:00
|
|
|
vfio_intx_eoi(const char *name) " (%s) EOI"
|
|
|
|
vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled"
|
|
|
|
vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled"
|
|
|
|
vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d"
|
|
|
|
vfio_intx_enable(const char *name) " (%s)"
|
|
|
|
vfio_intx_disable(const char *name) " (%s)"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
|
|
|
|
vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used"
|
|
|
|
vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released"
|
2015-09-23 22:04:43 +03:00
|
|
|
vfio_msix_enable(const char *name) " (%s)"
|
2016-01-19 21:33:42 +03:00
|
|
|
vfio_msix_pba_disable(const char *name) " (%s)"
|
|
|
|
vfio_msix_pba_enable(const char *name) " (%s)"
|
2015-09-23 22:04:43 +03:00
|
|
|
vfio_msix_disable(const char *name) " (%s)"
|
2016-03-10 19:39:07 +03:00
|
|
|
vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]"
|
2015-09-23 22:04:43 +03:00
|
|
|
vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors"
|
|
|
|
vfio_msi_disable(const char *name) " (%s)"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
|
|
|
|
vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
|
|
|
|
vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
|
|
|
|
vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)"
|
|
|
|
vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64
|
|
|
|
vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x"
|
|
|
|
vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
|
2015-09-23 22:04:43 +03:00
|
|
|
vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x"
|
|
|
|
vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap"
|
|
|
|
vfio_check_pm_reset(const char *name) "%s Supports PM reset"
|
|
|
|
vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"
|
|
|
|
vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s"
|
|
|
|
vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:"
|
2014-12-20 00:40:06 +03:00
|
|
|
vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s"
|
2014-12-22 19:54:38 +03:00
|
|
|
vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
|
|
|
|
vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_initfn(const char *name, int group_id) " (%s) group %d"
|
|
|
|
vfio_pci_reset(const char *name) " (%s)"
|
|
|
|
vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET"
|
|
|
|
vfio_pci_reset_pm(const char *name) "%s PCI PM Reset"
|
2015-09-23 22:04:49 +03:00
|
|
|
vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x"
|
|
|
|
vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x"
|
|
|
|
vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x"
|
|
|
|
vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x"
|
2014-12-20 00:40:06 +03:00
|
|
|
|
2015-09-23 22:04:45 +03:00
|
|
|
# hw/vfio/pci-quirks.
|
|
|
|
vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x"
|
2015-09-23 22:04:48 +03:00
|
|
|
vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
|
|
vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
|
|
vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
2015-09-23 22:04:48 +03:00
|
|
|
vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
|
|
|
|
vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
|
2015-09-23 22:04:47 +03:00
|
|
|
vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64
|
|
|
|
vfio_quirk_ati_3c3_probe(const char *name) "%s"
|
2015-09-23 22:04:48 +03:00
|
|
|
vfio_quirk_ati_bar4_probe(const char *name) "%s"
|
2015-09-23 22:04:48 +03:00
|
|
|
vfio_quirk_ati_bar2_probe(const char *name) "%s"
|
2015-09-23 22:04:47 +03:00
|
|
|
vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s"
|
|
|
|
vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64
|
|
|
|
vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
|
|
|
|
vfio_quirk_nvidia_3d0_probe(const char *name) "%s"
|
2015-09-23 22:04:48 +03:00
|
|
|
vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s"
|
|
|
|
vfio_quirk_nvidia_bar5_probe(const char *name) "%s"
|
2015-09-23 22:04:48 +03:00
|
|
|
vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s"
|
|
|
|
vfio_quirk_nvidia_bar0_probe(const char *name) "%s"
|
2015-09-23 22:04:47 +03:00
|
|
|
vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64
|
|
|
|
vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
|
|
|
|
vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64
|
|
|
|
vfio_quirk_rtl8168_probe(const char *name) "%s"
|
2015-09-23 22:04:45 +03:00
|
|
|
|
2015-09-23 22:04:49 +03:00
|
|
|
vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s"
|
|
|
|
vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s"
|
|
|
|
vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s"
|
|
|
|
vfio_quirk_ati_bonaire_reset_done(const char *name) "%s"
|
|
|
|
vfio_quirk_ati_bonaire_reset(const char *name) "%s"
|
vfio/pci: Intel graphics legacy mode assignment
Enable quirks to support SandyBridge and newer IGD devices as primary
VM graphics. This requires new vfio-pci device specific regions added
in kernel v4.6 to expose the IGD OpRegion, the shadow ROM, and config
space access to the PCI host bridge and LPC/ISA bridge. VM firmware
support, SeaBIOS only so far, is also required for reserving memory
regions for IGD specific use. In order to enable this mode, IGD must
be assigned to the VM at PCI bus address 00:02.0, it must have a ROM,
it must be able to enable VGA, it must have or be able to create on
its own an LPC/ISA bridge of the proper type at PCI bus address
00:1f.0 (sorry, not compatible with Q35 yet), and it must have the
above noted vfio-pci kernel features and BIOS. The intention is that
to enable this mode, a user simply needs to assign 00:02.0 from the
host to 00:02.0 in the VM:
-device vfio-pci,host=0000:00:02.0,bus=pci.0,addr=02.0
and everything either happens automatically or it doesn't. In the
case that it doesn't, we leave error reports, but assume the device
will operate in universal passthrough mode (UPT), which doesn't
require any of this, but has a much more narrow window of supported
devices, supported use cases, and supported guest drivers.
When using IGD in this mode, the VM firmware is required to reserve
some VM RAM for the OpRegion (on the order or several 4k pages) and
stolen memory for the GTT (up to 8MB for the latest GPUs). An
additional option, x-igd-gms allows the user to specify some amount
of additional memory (value is number of 32MB chunks up to 512MB) that
is pre-allocated for graphics use. TBH, I don't know of anything that
requires this or makes use of this memory, which is why we don't
allocate any by default, but the specification suggests this is not
actually a valid combination, so the option exists as a workaround.
Please report if it's actually necessary in some environment.
See code comments for further discussion about the actual operation
of the quirks necessary to assign these devices.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
2016-05-26 18:43:21 +03:00
|
|
|
vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [%03x] %08x -> %08x"
|
|
|
|
vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB"
|
|
|
|
vfio_pci_igd_opregion_enabled(const char *name) "%s"
|
|
|
|
vfio_pci_igd_host_bridge_enabled(const char *name) "%s"
|
|
|
|
vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s"
|
2015-09-23 22:04:49 +03:00
|
|
|
|
2016-05-26 18:43:20 +03:00
|
|
|
# hw/vfio/common.c
|
2014-12-22 19:54:37 +03:00
|
|
|
vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64
|
2014-12-20 00:40:06 +03:00
|
|
|
vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64
|
|
|
|
vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64
|
|
|
|
vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64
|
|
|
|
vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]"
|
|
|
|
vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64
|
|
|
|
vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64
|
|
|
|
vfio_disconnect_container(int fd) "close container->fd=%d"
|
|
|
|
vfio_put_group(int fd) "close group->fd=%d"
|
2014-12-22 19:54:49 +03:00
|
|
|
vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u"
|
2014-12-22 19:54:38 +03:00
|
|
|
vfio_put_base_device(int fd) "close vdev->fd=%d"
|
2016-03-10 19:39:07 +03:00
|
|
|
vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx"
|
|
|
|
vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d"
|
|
|
|
vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]"
|
|
|
|
vfio_region_exit(const char *name, int index) "Device %s, region %d"
|
|
|
|
vfio_region_finalize(const char *name, int index) "Device %s, region %d"
|
|
|
|
vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d"
|
2016-05-26 18:43:20 +03:00
|
|
|
vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries"
|
|
|
|
vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]"
|
2016-05-26 18:43:20 +03:00
|
|
|
vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8"
|
2014-12-20 00:40:06 +03:00
|
|
|
|
2015-06-08 18:25:25 +03:00
|
|
|
# hw/vfio/platform.c
|
|
|
|
vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d"
|
|
|
|
vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s"
|
2015-06-08 18:25:26 +03:00
|
|
|
vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)"
|
|
|
|
vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path"
|
|
|
|
vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)"
|
|
|
|
vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)"
|
|
|
|
vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x"
|
|
|
|
vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING"
|
2015-10-05 21:30:12 +03:00
|
|
|
vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d"
|
|
|
|
vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d"
|
|
|
|
|
2015-06-08 18:25:25 +03:00
|
|
|
|
2014-12-20 00:40:06 +03:00
|
|
|
#hw/acpi/memory_hotplug.c
|
2014-06-02 17:25:17 +04:00
|
|
|
mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
|
2015-04-27 11:47:21 +03:00
|
|
|
mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
|
2014-06-02 17:25:17 +04:00
|
|
|
mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
|
|
|
|
mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
|
|
|
|
mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
|
|
|
|
mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
|
|
|
|
mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
|
|
|
|
mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
|
|
|
|
mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
|
|
|
|
mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
|
|
|
|
mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
|
|
|
|
mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
|
2015-04-27 11:47:21 +03:00
|
|
|
mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
|
|
|
|
mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
|
2015-04-27 11:47:22 +03:00
|
|
|
mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
|
2014-06-02 17:25:17 +04:00
|
|
|
|
2014-09-23 16:53:31 +04:00
|
|
|
# hw/i386/pc.c
|
2014-06-02 17:25:18 +04:00
|
|
|
mhp_pc_dimm_assigned_slot(int slot) "0x%d"
|
|
|
|
mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
|
|
|
|
|
2014-04-11 15:47:40 +04:00
|
|
|
# target-s390x/kvm.c
|
|
|
|
kvm_enable_cmma(int rc) "CMMA: enabling with result code %d"
|
|
|
|
kvm_clear_cmma(int rc) "CMMA: clearing with result code %d"
|
2014-09-30 12:57:30 +04:00
|
|
|
kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s"
|
2015-02-24 16:15:26 +03:00
|
|
|
kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d"
|
2014-09-10 15:47:15 +04:00
|
|
|
|
|
|
|
# hw/dma/i8257.c
|
|
|
|
i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"
|
2014-09-30 12:57:29 +04:00
|
|
|
|
|
|
|
# target-s390x/cpu.c
|
|
|
|
cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8
|
|
|
|
cpu_halt(int cpu_index) "halting cpu %d"
|
|
|
|
cpu_unhalt(int cpu_index) "unhalting cpu %d"
|
2015-05-29 13:28:54 +03:00
|
|
|
|
|
|
|
# hw/arm/virt-acpi-build.c
|
|
|
|
virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
|
2015-06-12 15:33:06 +03:00
|
|
|
|
2015-11-13 15:23:45 +03:00
|
|
|
# hw/alpha/pci.c
|
|
|
|
alpha_pci_iack_write(void) ""
|
|
|
|
|
2015-06-12 15:33:06 +03:00
|
|
|
# audio/alsaaudio.c
|
|
|
|
alsa_revents(int revents) "revents = %d"
|
|
|
|
alsa_pollout(int i, int fd) "i = %d fd = %d"
|
|
|
|
alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d"
|
|
|
|
alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)"
|
|
|
|
alsa_read_zero(long len) "Failed to read %ld frames (read zero)"
|
|
|
|
alsa_xrun_out(void) "Recovering from playback xrun"
|
|
|
|
alsa_xrun_in(void) "Recovering from capture xrun"
|
|
|
|
alsa_resume_out(void) "Resuming suspended output stream"
|
|
|
|
alsa_resume_in(void) "Resuming suspended input stream"
|
|
|
|
alsa_no_frames(int state) "No frames available and ALSA state is %d"
|
2015-06-12 15:33:07 +03:00
|
|
|
|
|
|
|
# audio/ossaudio.c
|
|
|
|
oss_version(int version) "OSS version = %#x"
|
|
|
|
oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d"
|
2015-03-13 20:39:26 +03:00
|
|
|
|
2015-10-09 18:17:30 +03:00
|
|
|
# net/vhost-user.c
|
|
|
|
vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
|
2015-11-13 15:52:21 +03:00
|
|
|
|
|
|
|
# linux-user/signal.c
|
2016-01-11 20:30:36 +03:00
|
|
|
user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
|
|
user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
|
|
user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
|
|
user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
2015-11-13 15:52:21 +03:00
|
|
|
user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)"
|
|
|
|
user_handle_signal(void *env, int target_sig) "env=%p signal %d"
|
|
|
|
user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d("
|
|
|
|
user_queue_signal(void *env, int target_sig) "env=%p signal %d"
|
2016-01-11 20:30:36 +03:00
|
|
|
user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64
|
2015-03-18 20:25:45 +03:00
|
|
|
|
2016-06-09 20:31:47 +03:00
|
|
|
### Guest events, keep at bottom
|
|
|
|
|
|
|
|
# @vaddr: Access' virtual address.
|
|
|
|
# @info : Access' information (see below).
|
|
|
|
#
|
|
|
|
# Start virtual memory access (before any potential access violation).
|
|
|
|
#
|
|
|
|
# Does not include memory accesses performed by devices.
|
|
|
|
#
|
|
|
|
# Access information can be parsed as:
|
|
|
|
#
|
|
|
|
# struct mem_info {
|
|
|
|
# uint8_t size_shift : 2; /* interpreted as "1 << size_shift" bytes */
|
|
|
|
# bool sign_extend: 1; /* sign-extended */
|
|
|
|
# uint8_t endianness : 1; /* 0: little, 1: big */
|
|
|
|
# bool store : 1; /* wheter it's a store operation */
|
|
|
|
# };
|
|
|
|
#
|
|
|
|
# Targets: TCG(all)
|
|
|
|
disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"
|