2009-07-02 14:32:06 +04:00
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/*
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* QEMU System Emulator
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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* splitted out ioport related stuffs from vl.c.
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*/
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#include "ioport.h"
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2010-08-11 15:45:11 +04:00
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#include "trace.h"
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2011-09-26 15:52:26 +04:00
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#include "memory.h"
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2009-07-02 14:32:06 +04:00
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/***********************************************************/
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/* IO Port */
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//#define DEBUG_UNUSED_IOPORT
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//#define DEBUG_IOPORT
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2009-07-14 14:10:42 +04:00
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#ifdef DEBUG_UNUSED_IOPORT
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# define LOG_UNUSED_IOPORT(fmt, ...) fprintf(stderr, fmt, ## __VA_ARGS__)
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#else
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# define LOG_UNUSED_IOPORT(fmt, ...) do{ } while (0)
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#endif
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2009-07-02 14:32:06 +04:00
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#ifdef DEBUG_IOPORT
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# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
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#else
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# define LOG_IOPORT(...) do { } while (0)
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#endif
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/* XXX: use a two level table to limit memory usage */
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static void *ioport_opaque[MAX_IOPORTS];
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static IOPortReadFunc *ioport_read_table[3][MAX_IOPORTS];
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static IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];
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static IOPortReadFunc default_ioport_readb, default_ioport_readw, default_ioport_readl;
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static IOPortWriteFunc default_ioport_writeb, default_ioport_writew, default_ioport_writel;
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static uint32_t ioport_read(int index, uint32_t address)
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{
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2009-09-06 20:32:13 +04:00
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static IOPortReadFunc * const default_func[3] = {
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2009-07-02 14:32:06 +04:00
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default_ioport_readb,
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default_ioport_readw,
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default_ioport_readl
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};
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IOPortReadFunc *func = ioport_read_table[index][address];
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if (!func)
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func = default_func[index];
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return func(ioport_opaque[address], address);
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}
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static void ioport_write(int index, uint32_t address, uint32_t data)
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{
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2009-09-06 20:32:13 +04:00
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static IOPortWriteFunc * const default_func[3] = {
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2009-07-02 14:32:06 +04:00
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default_ioport_writeb,
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default_ioport_writew,
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default_ioport_writel
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};
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IOPortWriteFunc *func = ioport_write_table[index][address];
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if (!func)
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func = default_func[index];
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func(ioport_opaque[address], address, data);
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}
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static uint32_t default_ioport_readb(void *opaque, uint32_t address)
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{
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2009-07-14 14:10:42 +04:00
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LOG_UNUSED_IOPORT("unused inb: port=0x%04"PRIx32"\n", address);
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2009-07-02 14:32:06 +04:00
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return 0xff;
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}
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static void default_ioport_writeb(void *opaque, uint32_t address, uint32_t data)
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{
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2009-07-14 14:10:42 +04:00
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LOG_UNUSED_IOPORT("unused outb: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
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address, data);
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2009-07-02 14:32:06 +04:00
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}
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/* default is to make two byte accesses */
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static uint32_t default_ioport_readw(void *opaque, uint32_t address)
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{
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uint32_t data;
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data = ioport_read(0, address);
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2009-07-02 14:32:07 +04:00
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address = (address + 1) & IOPORTS_MASK;
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2009-07-02 14:32:06 +04:00
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data |= ioport_read(0, address) << 8;
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return data;
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}
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static void default_ioport_writew(void *opaque, uint32_t address, uint32_t data)
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{
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ioport_write(0, address, data & 0xff);
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2009-07-02 14:32:07 +04:00
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address = (address + 1) & IOPORTS_MASK;
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2009-07-02 14:32:06 +04:00
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ioport_write(0, address, (data >> 8) & 0xff);
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}
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static uint32_t default_ioport_readl(void *opaque, uint32_t address)
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{
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2009-07-14 14:10:42 +04:00
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LOG_UNUSED_IOPORT("unused inl: port=0x%04"PRIx32"\n", address);
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2009-07-02 14:32:06 +04:00
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return 0xffffffff;
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}
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static void default_ioport_writel(void *opaque, uint32_t address, uint32_t data)
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{
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2009-07-14 14:10:42 +04:00
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LOG_UNUSED_IOPORT("unused outl: port=0x%04"PRIx32" data=0x%02"PRIx32"\n",
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address, data);
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2009-07-02 14:32:06 +04:00
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}
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2009-07-02 14:32:08 +04:00
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static int ioport_bsize(int size, int *bsize)
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{
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if (size == 1) {
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*bsize = 0;
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} else if (size == 2) {
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*bsize = 1;
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} else if (size == 4) {
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*bsize = 2;
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} else {
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return -1;
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}
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return 0;
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}
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2009-07-02 14:32:06 +04:00
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/* size is the word size in byte */
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2009-10-02 01:12:16 +04:00
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int register_ioport_read(pio_addr_t start, int length, int size,
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2009-07-02 14:32:06 +04:00
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IOPortReadFunc *func, void *opaque)
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{
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int i, bsize;
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2009-07-02 14:32:08 +04:00
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if (ioport_bsize(size, &bsize)) {
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2009-07-02 14:32:06 +04:00
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hw_error("register_ioport_read: invalid size");
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return -1;
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}
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2011-07-26 15:26:15 +04:00
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for(i = start; i < start + length; ++i) {
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2009-07-02 14:32:06 +04:00
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ioport_read_table[bsize][i] = func;
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if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
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2011-03-06 17:48:13 +03:00
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hw_error("register_ioport_read: invalid opaque for address 0x%x",
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i);
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2009-07-02 14:32:06 +04:00
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ioport_opaque[i] = opaque;
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}
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return 0;
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}
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/* size is the word size in byte */
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2009-10-02 01:12:16 +04:00
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int register_ioport_write(pio_addr_t start, int length, int size,
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2009-07-02 14:32:06 +04:00
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IOPortWriteFunc *func, void *opaque)
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{
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int i, bsize;
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2009-07-02 14:32:08 +04:00
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if (ioport_bsize(size, &bsize)) {
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2009-07-02 14:32:06 +04:00
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hw_error("register_ioport_write: invalid size");
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return -1;
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}
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2011-07-26 15:26:15 +04:00
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for(i = start; i < start + length; ++i) {
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2009-07-02 14:32:06 +04:00
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ioport_write_table[bsize][i] = func;
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if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque)
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2011-03-06 17:48:13 +03:00
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hw_error("register_ioport_write: invalid opaque for address 0x%x",
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i);
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2009-07-02 14:32:06 +04:00
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ioport_opaque[i] = opaque;
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}
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return 0;
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}
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2010-11-17 12:50:09 +03:00
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static uint32_t ioport_readb_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 1, &data);
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return data;
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}
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static uint32_t ioport_readw_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 2, &data);
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return data;
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}
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static uint32_t ioport_readl_thunk(void *opaque, uint32_t addr)
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{
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IORange *ioport = opaque;
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uint64_t data;
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ioport->ops->read(ioport, addr - ioport->base, 4, &data);
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return data;
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}
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static void ioport_writeb_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 1, data);
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}
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static void ioport_writew_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 2, data);
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}
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static void ioport_writel_thunk(void *opaque, uint32_t addr, uint32_t data)
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{
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IORange *ioport = opaque;
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ioport->ops->write(ioport, addr - ioport->base, 4, data);
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}
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void ioport_register(IORange *ioport)
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{
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register_ioport_read(ioport->base, ioport->len, 1,
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ioport_readb_thunk, ioport);
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register_ioport_read(ioport->base, ioport->len, 2,
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ioport_readw_thunk, ioport);
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register_ioport_read(ioport->base, ioport->len, 4,
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ioport_readl_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 1,
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ioport_writeb_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 2,
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ioport_writew_thunk, ioport);
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register_ioport_write(ioport->base, ioport->len, 4,
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ioport_writel_thunk, ioport);
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}
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2009-10-02 01:12:16 +04:00
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void isa_unassign_ioport(pio_addr_t start, int length)
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2009-07-02 14:32:06 +04:00
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{
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int i;
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for(i = start; i < start + length; i++) {
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2011-07-15 19:10:15 +04:00
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ioport_read_table[0][i] = NULL;
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ioport_read_table[1][i] = NULL;
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ioport_read_table[2][i] = NULL;
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2009-07-02 14:32:06 +04:00
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2011-07-15 19:10:15 +04:00
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ioport_write_table[0][i] = NULL;
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ioport_write_table[1][i] = NULL;
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ioport_write_table[2][i] = NULL;
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2009-07-02 14:32:06 +04:00
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ioport_opaque[i] = NULL;
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}
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}
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2011-07-15 19:10:15 +04:00
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bool isa_is_ioport_assigned(pio_addr_t start)
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{
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return (ioport_read_table[0][start] || ioport_write_table[0][start] ||
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ioport_read_table[1][start] || ioport_write_table[1][start] ||
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ioport_read_table[2][start] || ioport_write_table[2][start]);
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}
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2009-07-02 14:32:06 +04:00
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/***********************************************************/
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2009-10-02 01:12:16 +04:00
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void cpu_outb(pio_addr_t addr, uint8_t val)
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2009-07-02 14:32:06 +04:00
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{
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
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2010-08-11 15:45:11 +04:00
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trace_cpu_out(addr, val);
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2009-07-02 14:32:06 +04:00
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ioport_write(0, addr, val);
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}
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2009-10-02 01:12:16 +04:00
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void cpu_outw(pio_addr_t addr, uint16_t val)
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2009-07-02 14:32:06 +04:00
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{
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
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2010-08-11 15:45:11 +04:00
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trace_cpu_out(addr, val);
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2009-07-02 14:32:06 +04:00
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ioport_write(1, addr, val);
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}
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2009-10-02 01:12:16 +04:00
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void cpu_outl(pio_addr_t addr, uint32_t val)
|
2009-07-02 14:32:06 +04:00
|
|
|
{
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
|
2010-08-11 15:45:11 +04:00
|
|
|
trace_cpu_out(addr, val);
|
2009-07-02 14:32:06 +04:00
|
|
|
ioport_write(2, addr, val);
|
|
|
|
}
|
|
|
|
|
2009-10-02 01:12:16 +04:00
|
|
|
uint8_t cpu_inb(pio_addr_t addr)
|
2009-07-02 14:32:06 +04:00
|
|
|
{
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
uint8_t val;
|
2009-07-02 14:32:06 +04:00
|
|
|
val = ioport_read(0, addr);
|
2010-08-11 15:45:11 +04:00
|
|
|
trace_cpu_in(addr, val);
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
|
2009-07-02 14:32:06 +04:00
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2009-10-02 01:12:16 +04:00
|
|
|
uint16_t cpu_inw(pio_addr_t addr)
|
2009-07-02 14:32:06 +04:00
|
|
|
{
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
uint16_t val;
|
2009-07-02 14:32:06 +04:00
|
|
|
val = ioport_read(1, addr);
|
2010-08-11 15:45:11 +04:00
|
|
|
trace_cpu_in(addr, val);
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
|
2009-07-02 14:32:06 +04:00
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2009-10-02 01:12:16 +04:00
|
|
|
uint32_t cpu_inl(pio_addr_t addr)
|
2009-07-02 14:32:06 +04:00
|
|
|
{
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
uint32_t val;
|
2009-07-02 14:32:06 +04:00
|
|
|
val = ioport_read(2, addr);
|
2010-08-11 15:45:11 +04:00
|
|
|
trace_cpu_in(addr, val);
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
|
|
|
LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
|
2009-07-02 14:32:06 +04:00
|
|
|
return val;
|
|
|
|
}
|
2011-09-26 15:52:26 +04:00
|
|
|
|
|
|
|
void portio_list_init(PortioList *piolist,
|
|
|
|
const MemoryRegionPortio *callbacks,
|
|
|
|
void *opaque, const char *name)
|
|
|
|
{
|
|
|
|
unsigned n = 0;
|
|
|
|
|
|
|
|
while (callbacks[n].size) {
|
|
|
|
++n;
|
|
|
|
}
|
|
|
|
|
|
|
|
piolist->ports = callbacks;
|
|
|
|
piolist->nr = 0;
|
|
|
|
piolist->regions = g_new0(MemoryRegion *, n);
|
2012-01-08 21:46:17 +04:00
|
|
|
piolist->aliases = g_new0(MemoryRegion *, n);
|
2011-09-26 15:52:26 +04:00
|
|
|
piolist->address_space = NULL;
|
|
|
|
piolist->opaque = opaque;
|
|
|
|
piolist->name = name;
|
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_destroy(PortioList *piolist)
|
|
|
|
{
|
|
|
|
g_free(piolist->regions);
|
2012-01-08 21:46:17 +04:00
|
|
|
g_free(piolist->aliases);
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void portio_list_add_1(PortioList *piolist,
|
|
|
|
const MemoryRegionPortio *pio_init,
|
|
|
|
unsigned count, unsigned start,
|
|
|
|
unsigned off_low, unsigned off_high)
|
|
|
|
{
|
|
|
|
MemoryRegionPortio *pio;
|
|
|
|
MemoryRegionOps *ops;
|
2012-01-08 21:46:17 +04:00
|
|
|
MemoryRegion *region, *alias;
|
2011-09-26 15:52:26 +04:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
/* Copy the sub-list and null-terminate it. */
|
|
|
|
pio = g_new(MemoryRegionPortio, count + 1);
|
|
|
|
memcpy(pio, pio_init, sizeof(MemoryRegionPortio) * count);
|
|
|
|
memset(pio + count, 0, sizeof(MemoryRegionPortio));
|
|
|
|
|
|
|
|
/* Adjust the offsets to all be zero-based for the region. */
|
|
|
|
for (i = 0; i < count; ++i) {
|
|
|
|
pio[i].offset -= off_low;
|
|
|
|
}
|
|
|
|
|
|
|
|
ops = g_new0(MemoryRegionOps, 1);
|
|
|
|
ops->old_portio = pio;
|
|
|
|
|
|
|
|
region = g_new(MemoryRegion, 1);
|
2012-01-08 21:46:17 +04:00
|
|
|
alias = g_new(MemoryRegion, 1);
|
|
|
|
/*
|
|
|
|
* Use an alias so that the callback is called with an absolute address,
|
|
|
|
* rather than an offset relative to to start + off_low.
|
|
|
|
*/
|
2011-09-26 15:52:26 +04:00
|
|
|
memory_region_init_io(region, ops, piolist->opaque, piolist->name,
|
2012-01-08 21:46:17 +04:00
|
|
|
UINT64_MAX);
|
|
|
|
memory_region_init_alias(alias, piolist->name,
|
|
|
|
region, start + off_low, off_high - off_low);
|
2011-09-26 15:52:26 +04:00
|
|
|
memory_region_add_subregion(piolist->address_space,
|
2012-01-08 21:46:17 +04:00
|
|
|
start + off_low, alias);
|
|
|
|
piolist->regions[piolist->nr] = region;
|
|
|
|
piolist->aliases[piolist->nr] = alias;
|
|
|
|
++piolist->nr;
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_add(PortioList *piolist,
|
|
|
|
MemoryRegion *address_space,
|
|
|
|
uint32_t start)
|
|
|
|
{
|
|
|
|
const MemoryRegionPortio *pio, *pio_start = piolist->ports;
|
|
|
|
unsigned int off_low, off_high, off_last, count;
|
|
|
|
|
|
|
|
piolist->address_space = address_space;
|
|
|
|
|
|
|
|
/* Handle the first entry specially. */
|
|
|
|
off_last = off_low = pio_start->offset;
|
|
|
|
off_high = off_low + pio_start->len;
|
|
|
|
count = 1;
|
|
|
|
|
|
|
|
for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
|
|
|
|
/* All entries must be sorted by offset. */
|
|
|
|
assert(pio->offset >= off_last);
|
|
|
|
off_last = pio->offset;
|
|
|
|
|
|
|
|
/* If we see a hole, break the region. */
|
|
|
|
if (off_last > off_high) {
|
|
|
|
portio_list_add_1(piolist, pio_start, count, start, off_low,
|
|
|
|
off_high);
|
|
|
|
/* ... and start collecting anew. */
|
|
|
|
pio_start = pio;
|
|
|
|
off_low = off_last;
|
|
|
|
off_high = off_low + pio->len;
|
|
|
|
count = 0;
|
|
|
|
} else if (off_last + pio->len > off_high) {
|
|
|
|
off_high = off_last + pio->len;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* There will always be an open sub-list. */
|
|
|
|
portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
|
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_del(PortioList *piolist)
|
|
|
|
{
|
2012-01-08 21:46:17 +04:00
|
|
|
MemoryRegion *mr, *alias;
|
2011-09-26 15:52:26 +04:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < piolist->nr; ++i) {
|
|
|
|
mr = piolist->regions[i];
|
2012-01-08 21:46:17 +04:00
|
|
|
alias = piolist->aliases[i];
|
|
|
|
memory_region_del_subregion(piolist->address_space, alias);
|
|
|
|
memory_region_destroy(alias);
|
2011-09-26 15:52:26 +04:00
|
|
|
memory_region_destroy(mr);
|
|
|
|
g_free((MemoryRegionOps *)mr->ops);
|
|
|
|
g_free(mr);
|
2012-01-08 21:46:17 +04:00
|
|
|
g_free(alias);
|
2011-09-26 15:52:26 +04:00
|
|
|
piolist->regions[i] = NULL;
|
2012-01-08 21:46:17 +04:00
|
|
|
piolist->aliases[i] = NULL;
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
}
|