2007-09-17 01:08:06 +04:00
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/*
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2007-05-23 04:03:59 +04:00
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* QEMU I2C bus interface.
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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2011-06-26 06:21:35 +04:00
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* This code is licensed under the LGPL.
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2007-05-23 04:03:59 +04:00
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*/
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2016-01-26 21:17:30 +03:00
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#include "qemu/osdep.h"
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2013-02-05 20:06:20 +04:00
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#include "hw/i2c/i2c.h"
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2018-06-08 15:15:33 +03:00
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#include "trace.h"
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2007-05-23 04:03:59 +04:00
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2016-07-27 15:39:58 +03:00
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#define I2C_BROADCAST 0x00
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2012-03-28 20:01:36 +04:00
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static Property i2c_props[] = {
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DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
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DEFINE_PROP_END_OF_LIST(),
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};
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2012-05-02 11:00:20 +04:00
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static const TypeInfo i2c_bus_info = {
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.name = TYPE_I2C_BUS,
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.parent = TYPE_BUS,
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2013-08-03 02:18:51 +04:00
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.instance_size = sizeof(I2CBus),
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2009-06-30 16:12:08 +04:00
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};
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2017-09-25 14:29:12 +03:00
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static int i2c_bus_pre_save(void *opaque)
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2008-07-02 03:16:53 +04:00
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{
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2013-08-03 02:18:51 +04:00
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I2CBus *bus = opaque;
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2008-07-02 03:16:53 +04:00
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2016-06-14 17:59:14 +03:00
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bus->saved_address = -1;
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if (!QLIST_EMPTY(&bus->current_devs)) {
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if (!bus->broadcast) {
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bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address;
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2016-07-27 15:39:58 +03:00
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} else {
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bus->saved_address = I2C_BROADCAST;
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2016-06-14 17:59:14 +03:00
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}
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}
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2017-09-25 14:29:12 +03:00
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return 0;
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2008-07-02 03:16:53 +04:00
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}
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2009-09-30 00:48:27 +04:00
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static const VMStateDescription vmstate_i2c_bus = {
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.name = "i2c_bus",
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.version_id = 1,
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.minimum_version_id = 1,
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.pre_save = i2c_bus_pre_save,
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2014-04-16 18:01:33 +04:00
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.fields = (VMStateField[]) {
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2013-08-03 02:18:51 +04:00
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VMSTATE_UINT8(saved_address, I2CBus),
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2009-09-30 00:48:27 +04:00
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VMSTATE_END_OF_LIST()
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}
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};
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2007-05-23 04:03:59 +04:00
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/* Create a new I2C bus. */
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2013-08-03 02:18:51 +04:00
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I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
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2007-05-23 04:03:59 +04:00
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{
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2013-08-03 02:18:51 +04:00
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I2CBus *bus;
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2007-05-23 04:03:59 +04:00
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2013-06-07 16:45:17 +04:00
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bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name));
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2016-06-14 17:59:14 +03:00
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QLIST_INIT(&bus->current_devs);
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2010-06-25 21:09:07 +04:00
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vmstate_register(NULL, -1, &vmstate_i2c_bus, bus);
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2007-05-23 04:03:59 +04:00
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return bus;
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}
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2011-12-05 06:28:27 +04:00
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void i2c_set_slave_address(I2CSlave *dev, uint8_t address)
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2007-05-23 04:03:59 +04:00
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{
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dev->address = address;
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}
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/* Return nonzero if bus is busy. */
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2013-08-03 02:18:51 +04:00
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int i2c_bus_busy(I2CBus *bus)
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2007-05-23 04:03:59 +04:00
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{
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2016-06-14 17:59:14 +03:00
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return !QLIST_EMPTY(&bus->current_devs);
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2007-05-23 04:03:59 +04:00
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}
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2017-01-09 14:40:20 +03:00
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/* TODO: Make this handle multiple masters. */
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2016-10-24 18:42:33 +03:00
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/*
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2017-01-09 14:40:20 +03:00
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* Start or continue an i2c transaction. When this is called for the
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* first time or after an i2c_end_transfer(), if it returns an error
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* the bus transaction is terminated (or really never started). If
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* this is called after another i2c_start_transfer() without an
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* intervening i2c_end_transfer(), and it returns an error, the
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* transaction will not be terminated. The caller must do it.
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*
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* This corresponds with the way real hardware works. The SMBus
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* protocol uses a start transfer to switch from write to read mode
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* without releasing the bus. If that fails, the bus is still
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* in a transaction.
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2016-10-24 18:42:33 +03:00
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*/
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2013-08-03 02:18:51 +04:00
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int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-24 01:34:39 +04:00
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BusChild *kid;
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2011-12-05 06:39:20 +04:00
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I2CSlaveClass *sc;
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2016-06-14 17:59:14 +03:00
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I2CNode *node;
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2017-01-09 14:40:20 +03:00
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bool bus_scanned = false;
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2016-06-14 17:59:14 +03:00
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2016-07-27 15:39:58 +03:00
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if (address == I2C_BROADCAST) {
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2016-06-14 17:59:14 +03:00
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/*
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* This is a broadcast, the current_devs will be all the devices of the
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* bus.
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*/
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bus->broadcast = true;
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}
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2007-05-23 04:03:59 +04:00
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2016-10-24 18:26:55 +03:00
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/*
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* If there are already devices in the list, that means we are in
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* the middle of a transaction and we shouldn't rescan the bus.
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*
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* This happens with any SMBus transaction, even on a pure I2C
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* device. The interface does a transaction start without
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* terminating the previous transaction.
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*/
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if (QLIST_EMPTY(&bus->current_devs)) {
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QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) {
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DeviceState *qdev = kid->child;
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I2CSlave *candidate = I2C_SLAVE(qdev);
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if ((candidate->address == address) || (bus->broadcast)) {
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node = g_malloc(sizeof(struct I2CNode));
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node->elt = candidate;
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QLIST_INSERT_HEAD(&bus->current_devs, node, next);
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if (!bus->broadcast) {
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break;
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}
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2016-06-14 17:59:14 +03:00
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}
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2009-06-08 10:27:19 +04:00
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}
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2017-01-09 14:40:20 +03:00
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bus_scanned = true;
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2007-05-23 04:03:59 +04:00
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}
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2016-06-14 17:59:14 +03:00
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if (QLIST_EMPTY(&bus->current_devs)) {
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2007-05-23 04:03:59 +04:00
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return 1;
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2011-12-05 06:39:20 +04:00
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}
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2007-05-23 04:03:59 +04:00
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2016-06-14 17:59:14 +03:00
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QLIST_FOREACH(node, &bus->current_devs, next) {
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2018-06-08 15:15:33 +03:00
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I2CSlave *s = node->elt;
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2017-01-09 14:40:20 +03:00
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int rv;
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2018-06-08 15:15:33 +03:00
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sc = I2C_SLAVE_GET_CLASS(s);
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2016-06-14 17:59:14 +03:00
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/* If the bus is already busy, assume this is a repeated
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start condition. */
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2017-01-09 14:40:20 +03:00
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2016-06-14 17:59:14 +03:00
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if (sc->event) {
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2018-06-08 15:15:33 +03:00
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trace_i2c_event("start", s->address);
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rv = sc->event(s, recv ? I2C_START_RECV : I2C_START_SEND);
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2017-01-09 14:40:20 +03:00
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if (rv && !bus->broadcast) {
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if (bus_scanned) {
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/* First call, terminate the transfer. */
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i2c_end_transfer(bus);
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}
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return rv;
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}
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2016-06-14 17:59:14 +03:00
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}
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2011-12-05 06:39:20 +04:00
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}
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2007-05-23 04:03:59 +04:00
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return 0;
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}
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2013-08-03 02:18:51 +04:00
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void i2c_end_transfer(I2CBus *bus)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-05 06:39:20 +04:00
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I2CSlaveClass *sc;
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2016-06-14 17:59:14 +03:00
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I2CNode *node, *next;
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2007-05-23 04:03:59 +04:00
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2016-06-14 17:59:14 +03:00
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QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) {
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2018-06-08 15:15:33 +03:00
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I2CSlave *s = node->elt;
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sc = I2C_SLAVE_GET_CLASS(s);
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2016-06-14 17:59:14 +03:00
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if (sc->event) {
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2018-06-08 15:15:33 +03:00
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trace_i2c_event("finish", s->address);
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sc->event(s, I2C_FINISH);
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2016-06-14 17:59:14 +03:00
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}
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QLIST_REMOVE(node, next);
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g_free(node);
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2011-12-05 06:39:20 +04:00
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}
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2016-06-14 17:59:14 +03:00
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bus->broadcast = false;
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2007-05-23 04:03:59 +04:00
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}
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2016-06-14 17:59:14 +03:00
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int i2c_send_recv(I2CBus *bus, uint8_t *data, bool send)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-05 06:39:20 +04:00
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I2CSlaveClass *sc;
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2018-06-08 15:15:33 +03:00
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I2CSlave *s;
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2016-06-14 17:59:14 +03:00
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I2CNode *node;
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int ret = 0;
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2016-06-14 17:59:14 +03:00
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if (send) {
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QLIST_FOREACH(node, &bus->current_devs, next) {
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2018-06-08 15:15:33 +03:00
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s = node->elt;
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sc = I2C_SLAVE_GET_CLASS(s);
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2016-06-14 17:59:14 +03:00
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if (sc->send) {
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2018-06-08 15:15:33 +03:00
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trace_i2c_send(s->address, *data);
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ret = ret || sc->send(s, *data);
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2016-06-14 17:59:14 +03:00
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} else {
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ret = -1;
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}
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}
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return ret ? -1 : 0;
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} else {
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2018-11-14 20:50:50 +03:00
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ret = 0xff;
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if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) {
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sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt);
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if (sc->recv) {
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s = QLIST_FIRST(&bus->current_devs)->elt;
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ret = sc->recv(s);
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trace_i2c_recv(s->address, ret);
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2016-06-14 17:59:14 +03:00
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}
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}
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2018-11-14 20:50:50 +03:00
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*data = ret;
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return 0;
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2011-12-05 06:39:20 +04:00
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}
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2007-05-23 04:03:59 +04:00
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}
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2016-06-14 17:59:14 +03:00
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int i2c_send(I2CBus *bus, uint8_t data)
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2007-05-23 04:03:59 +04:00
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{
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2016-06-14 17:59:14 +03:00
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return i2c_send_recv(bus, &data, true);
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}
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2007-05-23 04:03:59 +04:00
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2018-11-14 20:50:50 +03:00
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uint8_t i2c_recv(I2CBus *bus)
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2016-06-14 17:59:14 +03:00
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{
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2018-11-14 20:50:50 +03:00
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uint8_t data = 0xff;
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2011-12-05 06:39:20 +04:00
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2018-11-14 20:50:50 +03:00
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i2c_send_recv(bus, &data, false);
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return data;
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2007-05-23 04:03:59 +04:00
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}
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2013-08-03 02:18:51 +04:00
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void i2c_nack(I2CBus *bus)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-05 06:39:20 +04:00
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I2CSlaveClass *sc;
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2016-06-14 17:59:14 +03:00
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I2CNode *node;
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2007-05-23 04:03:59 +04:00
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2016-06-14 17:59:14 +03:00
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if (QLIST_EMPTY(&bus->current_devs)) {
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2007-05-23 04:03:59 +04:00
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return;
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2011-12-05 06:39:20 +04:00
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}
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2007-05-23 04:03:59 +04:00
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2016-06-14 17:59:14 +03:00
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QLIST_FOREACH(node, &bus->current_devs, next) {
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sc = I2C_SLAVE_GET_CLASS(node->elt);
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if (sc->event) {
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2018-06-08 15:15:33 +03:00
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trace_i2c_event("nack", node->elt->address);
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2016-06-14 17:59:14 +03:00
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sc->event(node->elt, I2C_NACK);
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}
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2011-12-05 06:39:20 +04:00
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}
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2007-05-23 04:03:59 +04:00
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}
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2009-09-30 00:48:28 +04:00
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static int i2c_slave_post_load(void *opaque, int version_id)
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2007-05-24 22:50:09 +04:00
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{
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2011-12-05 06:28:27 +04:00
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I2CSlave *dev = opaque;
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2013-08-03 02:18:51 +04:00
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I2CBus *bus;
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2016-06-14 17:59:14 +03:00
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I2CNode *node;
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|
2013-06-07 16:45:17 +04:00
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bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
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2016-07-27 15:39:58 +03:00
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if ((bus->saved_address == dev->address) ||
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(bus->saved_address == I2C_BROADCAST)) {
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2016-06-14 17:59:14 +03:00
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node = g_malloc(sizeof(struct I2CNode));
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node->elt = dev;
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QLIST_INSERT_HEAD(&bus->current_devs, node, next);
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2009-05-15 01:35:08 +04:00
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}
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2009-09-30 00:48:28 +04:00
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return 0;
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}
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2009-09-30 00:48:30 +04:00
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const VMStateDescription vmstate_i2c_slave = {
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2011-12-05 06:28:27 +04:00
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.name = "I2CSlave",
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2009-09-30 00:48:28 +04:00
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.version_id = 1,
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.minimum_version_id = 1,
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.post_load = i2c_slave_post_load,
|
2014-04-16 18:01:33 +04:00
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.fields = (VMStateField[]) {
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2011-12-05 06:28:27 +04:00
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VMSTATE_UINT8(address, I2CSlave),
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2009-09-30 00:48:28 +04:00
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VMSTATE_END_OF_LIST()
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}
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};
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2013-08-03 02:18:51 +04:00
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DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr)
|
2009-05-15 01:35:08 +04:00
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{
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DeviceState *dev;
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|
2009-05-23 03:05:19 +04:00
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dev = qdev_create(&bus->qbus, name);
|
2009-09-30 00:48:26 +04:00
|
|
|
qdev_prop_set_uint8(dev, "address", addr);
|
2009-10-07 03:15:58 +04:00
|
|
|
qdev_init_nofail(dev);
|
2009-05-15 01:35:08 +04:00
|
|
|
return dev;
|
2007-05-24 22:50:09 +04:00
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
|
2011-12-08 07:34:16 +04:00
|
|
|
static void i2c_slave_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *k = DEVICE_CLASS(klass);
|
2013-07-29 18:17:45 +04:00
|
|
|
set_bit(DEVICE_CATEGORY_MISC, k->categories);
|
2012-05-02 11:00:20 +04:00
|
|
|
k->bus_type = TYPE_I2C_BUS;
|
2012-03-28 20:12:47 +04:00
|
|
|
k->props = i2c_props;
|
2011-12-08 07:34:16 +04:00
|
|
|
}
|
|
|
|
|
2013-01-10 19:19:07 +04:00
|
|
|
static const TypeInfo i2c_slave_type_info = {
|
2011-12-05 06:39:20 +04:00
|
|
|
.name = TYPE_I2C_SLAVE,
|
|
|
|
.parent = TYPE_DEVICE,
|
|
|
|
.instance_size = sizeof(I2CSlave),
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(I2CSlaveClass),
|
2011-12-08 07:34:16 +04:00
|
|
|
.class_init = i2c_slave_class_init,
|
2011-12-05 06:39:20 +04:00
|
|
|
};
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void i2c_slave_register_types(void)
|
2011-12-05 06:39:20 +04:00
|
|
|
{
|
2012-05-02 11:00:20 +04:00
|
|
|
type_register_static(&i2c_bus_info);
|
2011-12-05 06:39:20 +04:00
|
|
|
type_register_static(&i2c_slave_type_info);
|
|
|
|
}
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
type_init(i2c_slave_register_types)
|