2006-05-13 20:11:23 +04:00
|
|
|
/*
|
2007-10-29 02:42:18 +03:00
|
|
|
* QEMU Grackle PCI host (heathrow OldWorld PowerMac)
|
2006-05-13 20:11:23 +04:00
|
|
|
*
|
2007-10-29 02:42:18 +03:00
|
|
|
* Copyright (c) 2006-2007 Fabrice Bellard
|
|
|
|
* Copyright (c) 2007 Jocelyn Mayer
|
2007-09-17 01:08:06 +04:00
|
|
|
*
|
2006-05-13 20:11:23 +04:00
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
|
|
|
|
2016-01-26 21:16:58 +03:00
|
|
|
#include "qemu/osdep.h"
|
2019-08-12 08:23:51 +03:00
|
|
|
#include "hw/qdev-properties.h"
|
2022-12-22 13:03:28 +03:00
|
|
|
#include "hw/pci/pci_device.h"
|
2019-08-12 08:23:42 +03:00
|
|
|
#include "hw/irq.h"
|
2018-03-07 01:01:55 +03:00
|
|
|
#include "qapi/error.h"
|
2019-05-23 17:35:07 +03:00
|
|
|
#include "qemu/module.h"
|
2018-01-26 12:20:27 +03:00
|
|
|
#include "trace.h"
|
2020-09-03 23:43:22 +03:00
|
|
|
#include "qom/object.h"
|
2022-10-28 14:56:25 +03:00
|
|
|
#include "hw/pci-host/grackle.h"
|
2006-05-13 20:11:23 +04:00
|
|
|
|
2006-09-24 04:16:34 +04:00
|
|
|
/* Don't know if this matches real hardware, but it agrees with OHW. */
|
|
|
|
static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
|
2006-05-13 20:11:23 +04:00
|
|
|
{
|
2006-09-24 04:16:34 +04:00
|
|
|
return (irq_num + (pci_dev->devfn >> 3)) & 3;
|
|
|
|
}
|
|
|
|
|
2009-08-28 17:28:17 +04:00
|
|
|
static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
|
2006-09-24 04:16:34 +04:00
|
|
|
{
|
2018-03-07 01:01:55 +03:00
|
|
|
GrackleState *s = opaque;
|
2009-08-28 17:28:17 +04:00
|
|
|
|
2018-01-26 12:20:27 +03:00
|
|
|
trace_grackle_set_irq(irq_num, level);
|
2018-03-07 01:01:55 +03:00
|
|
|
qemu_set_irq(s->irqs[irq_num], level);
|
2006-05-13 20:11:23 +04:00
|
|
|
}
|
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
static void grackle_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
|
|
|
|
PCIHostState *phb = PCI_HOST_BRIDGE(dev);
|
|
|
|
|
2017-11-29 11:46:22 +03:00
|
|
|
phb->bus = pci_register_root_bus(dev, NULL,
|
|
|
|
pci_grackle_set_irq,
|
|
|
|
pci_grackle_map_irq,
|
2018-03-07 01:01:55 +03:00
|
|
|
s,
|
|
|
|
&s->pci_mmio,
|
2018-03-07 01:01:57 +03:00
|
|
|
&s->pci_io,
|
2017-11-29 11:46:22 +03:00
|
|
|
0, 4, TYPE_PCI_BUS);
|
2009-08-01 00:23:02 +04:00
|
|
|
|
2012-08-20 21:08:00 +04:00
|
|
|
pci_create_simple(phb->bus, 0, "grackle");
|
2009-08-01 00:23:02 +04:00
|
|
|
}
|
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
static void grackle_init(Object *obj)
|
2009-08-01 00:23:02 +04:00
|
|
|
{
|
2018-03-07 01:01:55 +03:00
|
|
|
GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
|
|
|
|
PCIHostState *phb = PCI_HOST_BRIDGE(obj);
|
2009-08-01 00:23:02 +04:00
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
|
2018-03-07 01:01:57 +03:00
|
|
|
memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
|
|
|
|
"pci-isa-mmio", 0x00200000);
|
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio,
|
|
|
|
0x80000000ULL, 0x7e000000ULL);
|
2009-08-01 00:23:02 +04:00
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops,
|
|
|
|
DEVICE(obj), "pci-conf-idx", 0x1000);
|
|
|
|
memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops,
|
|
|
|
DEVICE(obj), "pci-data-idx", 0x1000);
|
2009-08-01 00:23:02 +04:00
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
sysbus_init_mmio(sbd, &phb->conf_mem);
|
|
|
|
sysbus_init_mmio(sbd, &phb->data_mem);
|
2018-03-07 01:01:56 +03:00
|
|
|
sysbus_init_mmio(sbd, &s->pci_hole);
|
2018-03-07 01:01:57 +03:00
|
|
|
sysbus_init_mmio(sbd, &s->pci_io);
|
2020-10-13 14:49:21 +03:00
|
|
|
|
|
|
|
qdev_init_gpio_out(DEVICE(obj), s->irqs, ARRAY_SIZE(s->irqs));
|
2009-08-01 00:23:02 +04:00
|
|
|
}
|
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
static void grackle_pci_realize(PCIDevice *d, Error **errp)
|
2009-08-01 00:23:02 +04:00
|
|
|
{
|
2023-01-05 20:37:02 +03:00
|
|
|
d->config[PCI_CLASS_PROG] = 0x01;
|
2009-08-01 00:23:02 +04:00
|
|
|
}
|
2006-05-13 20:11:23 +04:00
|
|
|
|
2011-12-04 22:22:06 +04:00
|
|
|
static void grackle_pci_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
2011-12-08 07:34:16 +04:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2018-03-07 01:01:55 +03:00
|
|
|
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
2011-12-04 22:22:06 +04:00
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
k->realize = grackle_pci_realize;
|
2011-12-04 22:22:06 +04:00
|
|
|
k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
|
|
|
|
k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
|
|
|
|
k->revision = 0x00;
|
|
|
|
k->class_id = PCI_CLASS_BRIDGE_HOST;
|
pci-host: Consistently set cannot_instantiate_with_device_add_yet
Many PCI host bridges consist of a sysbus device and a PCI device.
You need both for the thing to work. Arguably, these bridges should
be modelled as a single, composite devices instead of pairs of
seemingly independent devices you can only use together, but we're not
there, yet.
Since the sysbus part can't be instantiated with device_add, yet,
permitting it with the PCI part is useless. We shouldn't offer
useless options to the user, so let's set
cannot_instantiate_with_device_add_yet for them.
It's already set for Bonito, Grackle, i440FX and Raven. Document why.
Set it for the others: dec-21154, e500-host-bridge, gt64120_pci, mch,
pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp,
uni-north-internal-pci, uni-north-pci, and versatile_pci_host.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-28 20:26:58 +04:00
|
|
|
/*
|
|
|
|
* PCI-facing part of the host bridge, not usable without the
|
|
|
|
* host-facing part, which can't be device_add'ed, yet.
|
|
|
|
*/
|
2017-05-03 23:35:44 +03:00
|
|
|
dc->user_creatable = false;
|
2011-12-04 22:22:06 +04:00
|
|
|
}
|
|
|
|
|
2012-08-20 21:07:56 +04:00
|
|
|
static const TypeInfo grackle_pci_info = {
|
2011-12-08 07:34:16 +04:00
|
|
|
.name = "grackle",
|
|
|
|
.parent = TYPE_PCI_DEVICE,
|
|
|
|
.instance_size = sizeof(PCIDevice),
|
2011-12-04 22:22:06 +04:00
|
|
|
.class_init = grackle_pci_class_init,
|
2017-09-27 22:56:34 +03:00
|
|
|
.interfaces = (InterfaceInfo[]) {
|
|
|
|
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
|
|
|
|
{ },
|
|
|
|
},
|
2009-08-01 00:23:02 +04:00
|
|
|
};
|
2008-12-28 21:27:10 +03:00
|
|
|
|
2018-08-29 19:59:08 +03:00
|
|
|
static char *grackle_ofw_unit_address(const SysBusDevice *dev)
|
|
|
|
{
|
|
|
|
GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
|
|
|
|
|
|
|
|
return g_strdup_printf("%x", s->ofw_addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static Property grackle_properties[] = {
|
|
|
|
DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1),
|
|
|
|
DEFINE_PROP_END_OF_LIST()
|
|
|
|
};
|
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
static void grackle_class_init(ObjectClass *klass, void *data)
|
2012-01-24 23:12:29 +04:00
|
|
|
{
|
2015-09-26 19:22:06 +03:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2018-08-29 19:59:08 +03:00
|
|
|
SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
|
2012-01-24 23:12:29 +04:00
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
dc->realize = grackle_realize;
|
2020-01-10 18:30:32 +03:00
|
|
|
device_class_set_props(dc, grackle_properties);
|
2015-09-26 19:22:06 +03:00
|
|
|
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
|
2018-08-29 19:59:08 +03:00
|
|
|
dc->fw_name = "pci";
|
|
|
|
sbc->explicit_ofw_unit_address = grackle_ofw_unit_address;
|
2012-01-24 23:12:29 +04:00
|
|
|
}
|
|
|
|
|
2018-03-07 01:01:55 +03:00
|
|
|
static const TypeInfo grackle_host_info = {
|
2012-08-20 21:08:00 +04:00
|
|
|
.name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
|
2012-08-20 21:08:08 +04:00
|
|
|
.parent = TYPE_PCI_HOST_BRIDGE,
|
2011-12-08 07:34:16 +04:00
|
|
|
.instance_size = sizeof(GrackleState),
|
2018-03-07 01:01:55 +03:00
|
|
|
.instance_init = grackle_init,
|
|
|
|
.class_init = grackle_class_init,
|
2012-01-18 04:11:16 +04:00
|
|
|
};
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void grackle_register_types(void)
|
2009-08-01 00:23:02 +04:00
|
|
|
{
|
2011-12-08 07:34:16 +04:00
|
|
|
type_register_static(&grackle_pci_info);
|
2018-03-07 01:01:55 +03:00
|
|
|
type_register_static(&grackle_host_info);
|
2006-05-13 20:11:23 +04:00
|
|
|
}
|
2009-08-01 00:23:02 +04:00
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
type_init(grackle_register_types)
|