2009-07-02 14:32:06 +04:00
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/*
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* QEMU System Emulator
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*
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* Copyright (c) 2003-2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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* splitted out ioport related stuffs from vl.c.
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*/
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2012-12-17 21:19:49 +04:00
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#include "exec/ioport.h"
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2010-08-11 15:45:11 +04:00
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#include "trace.h"
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2012-12-17 21:19:49 +04:00
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#include "exec/memory.h"
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2013-06-24 12:45:09 +04:00
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#include "exec/address-spaces.h"
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2009-07-02 14:32:06 +04:00
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//#define DEBUG_IOPORT
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#ifdef DEBUG_IOPORT
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# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
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#else
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# define LOG_IOPORT(...) do { } while (0)
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#endif
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2013-06-24 12:45:09 +04:00
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typedef struct MemoryRegionPortioList {
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MemoryRegion mr;
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void *portio_opaque;
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MemoryRegionPortio ports[];
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} MemoryRegionPortioList;
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2013-09-02 20:43:30 +04:00
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static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size)
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{
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return -1ULL;
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}
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static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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}
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const MemoryRegionOps unassigned_io_ops = {
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.read = unassigned_io_read,
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.write = unassigned_io_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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2009-10-02 01:12:16 +04:00
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void cpu_outb(pio_addr_t addr, uint8_t val)
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2009-07-02 14:32:06 +04:00
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{
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
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2010-08-11 15:45:11 +04:00
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trace_cpu_out(addr, val);
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2013-06-24 12:45:09 +04:00
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address_space_write(&address_space_io, addr, &val, 1);
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2009-07-02 14:32:06 +04:00
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}
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2009-10-02 01:12:16 +04:00
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void cpu_outw(pio_addr_t addr, uint16_t val)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[2];
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
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2010-08-11 15:45:11 +04:00
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trace_cpu_out(addr, val);
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2013-06-24 12:45:09 +04:00
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stw_p(buf, val);
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address_space_write(&address_space_io, addr, buf, 2);
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2009-07-02 14:32:06 +04:00
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}
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2009-10-02 01:12:16 +04:00
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void cpu_outl(pio_addr_t addr, uint32_t val)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[4];
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|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
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2010-08-11 15:45:11 +04:00
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trace_cpu_out(addr, val);
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2013-06-24 12:45:09 +04:00
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stl_p(buf, val);
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address_space_write(&address_space_io, addr, buf, 4);
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2009-07-02 14:32:06 +04:00
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}
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2009-10-02 01:12:16 +04:00
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uint8_t cpu_inb(pio_addr_t addr)
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2009-07-02 14:32:06 +04:00
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{
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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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uint8_t val;
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2013-06-24 12:45:09 +04:00
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address_space_read(&address_space_io, addr, &val, 1);
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2010-08-11 15:45:11 +04:00
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trace_cpu_in(addr, val);
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
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2009-07-02 14:32:06 +04:00
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return val;
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}
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2009-10-02 01:12:16 +04:00
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uint16_t cpu_inw(pio_addr_t addr)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[2];
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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uint16_t val;
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2013-06-24 12:45:09 +04:00
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address_space_read(&address_space_io, addr, buf, 2);
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val = lduw_p(buf);
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2010-08-11 15:45:11 +04:00
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trace_cpu_in(addr, val);
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
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2009-07-02 14:32:06 +04:00
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return val;
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}
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2009-10-02 01:12:16 +04:00
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uint32_t cpu_inl(pio_addr_t addr)
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2009-07-02 14:32:06 +04:00
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{
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2013-06-24 12:45:09 +04:00
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uint8_t buf[4];
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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uint32_t val;
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2013-06-24 12:45:09 +04:00
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address_space_read(&address_space_io, addr, buf, 4);
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val = ldl_p(buf);
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2010-08-11 15:45:11 +04:00
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trace_cpu_in(addr, val);
|
ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.
Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.
IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-14 14:10:43 +04:00
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LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
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2009-07-02 14:32:06 +04:00
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return val;
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}
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2011-09-26 15:52:26 +04:00
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void portio_list_init(PortioList *piolist,
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2013-06-07 05:19:53 +04:00
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Object *owner,
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2011-09-26 15:52:26 +04:00
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const MemoryRegionPortio *callbacks,
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void *opaque, const char *name)
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{
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unsigned n = 0;
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while (callbacks[n].size) {
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++n;
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}
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piolist->ports = callbacks;
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piolist->nr = 0;
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piolist->regions = g_new0(MemoryRegion *, n);
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piolist->address_space = NULL;
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piolist->opaque = opaque;
|
2013-06-07 05:19:53 +04:00
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piolist->owner = owner;
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2011-09-26 15:52:26 +04:00
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piolist->name = name;
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2013-07-02 22:22:37 +04:00
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piolist->flush_coalesced_mmio = false;
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}
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void portio_list_set_flush_coalesced(PortioList *piolist)
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{
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piolist->flush_coalesced_mmio = true;
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2011-09-26 15:52:26 +04:00
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}
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void portio_list_destroy(PortioList *piolist)
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{
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g_free(piolist->regions);
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}
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|
2013-06-24 12:45:09 +04:00
|
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static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
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uint64_t offset, unsigned size,
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bool write)
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{
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const MemoryRegionPortio *mrp;
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for (mrp = mrpio->ports; mrp->size; ++mrp) {
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if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
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size == mrp->size &&
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(write ? (bool)mrp->write : (bool)mrp->read)) {
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return mrp;
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}
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}
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return NULL;
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}
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static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
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|
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|
{
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MemoryRegionPortioList *mrpio = opaque;
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const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
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|
uint64_t data;
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data = ((uint64_t)1 << (size * 8)) - 1;
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if (mrp) {
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data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
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} else if (size == 2) {
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mrp = find_portio(mrpio, addr, 1, false);
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assert(mrp);
|
|
|
|
data = mrp->read(mrpio->portio_opaque, mrp->base + addr) |
|
|
|
|
(mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8);
|
|
|
|
}
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void portio_write(void *opaque, hwaddr addr, uint64_t data,
|
|
|
|
unsigned size)
|
|
|
|
{
|
|
|
|
MemoryRegionPortioList *mrpio = opaque;
|
|
|
|
const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
|
|
|
|
|
|
|
|
if (mrp) {
|
|
|
|
mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
|
|
|
|
} else if (size == 2) {
|
|
|
|
mrp = find_portio(mrpio, addr, 1, true);
|
|
|
|
assert(mrp);
|
|
|
|
mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
|
|
|
|
mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const MemoryRegionOps portio_ops = {
|
|
|
|
.read = portio_read,
|
|
|
|
.write = portio_write,
|
2013-07-22 17:54:25 +04:00
|
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
2013-06-24 12:45:09 +04:00
|
|
|
.valid.unaligned = true,
|
|
|
|
.impl.unaligned = true,
|
|
|
|
};
|
|
|
|
|
2011-09-26 15:52:26 +04:00
|
|
|
static void portio_list_add_1(PortioList *piolist,
|
|
|
|
const MemoryRegionPortio *pio_init,
|
|
|
|
unsigned count, unsigned start,
|
|
|
|
unsigned off_low, unsigned off_high)
|
|
|
|
{
|
2013-06-24 12:45:09 +04:00
|
|
|
MemoryRegionPortioList *mrpio;
|
2011-09-26 15:52:26 +04:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
/* Copy the sub-list and null-terminate it. */
|
2013-06-24 12:45:09 +04:00
|
|
|
mrpio = g_malloc0(sizeof(MemoryRegionPortioList) +
|
|
|
|
sizeof(MemoryRegionPortio) * (count + 1));
|
|
|
|
mrpio->portio_opaque = piolist->opaque;
|
|
|
|
memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
|
|
|
|
memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
|
2011-09-26 15:52:26 +04:00
|
|
|
|
|
|
|
/* Adjust the offsets to all be zero-based for the region. */
|
|
|
|
for (i = 0; i < count; ++i) {
|
2013-06-24 12:45:09 +04:00
|
|
|
mrpio->ports[i].offset -= off_low;
|
|
|
|
mrpio->ports[i].base = start + off_low;
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
|
2012-01-08 21:46:17 +04:00
|
|
|
/*
|
|
|
|
* Use an alias so that the callback is called with an absolute address,
|
|
|
|
* rather than an offset relative to to start + off_low.
|
|
|
|
*/
|
2013-06-07 05:19:53 +04:00
|
|
|
memory_region_init_io(&mrpio->mr, piolist->owner, &portio_ops, mrpio,
|
|
|
|
piolist->name, off_high - off_low);
|
2013-07-02 22:22:37 +04:00
|
|
|
if (piolist->flush_coalesced_mmio) {
|
|
|
|
memory_region_set_flush_coalesced(&mrpio->mr);
|
|
|
|
}
|
2011-09-26 15:52:26 +04:00
|
|
|
memory_region_add_subregion(piolist->address_space,
|
2013-06-24 12:45:09 +04:00
|
|
|
start + off_low, &mrpio->mr);
|
|
|
|
piolist->regions[piolist->nr] = &mrpio->mr;
|
2012-01-08 21:46:17 +04:00
|
|
|
++piolist->nr;
|
2011-09-26 15:52:26 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_add(PortioList *piolist,
|
|
|
|
MemoryRegion *address_space,
|
|
|
|
uint32_t start)
|
|
|
|
{
|
|
|
|
const MemoryRegionPortio *pio, *pio_start = piolist->ports;
|
|
|
|
unsigned int off_low, off_high, off_last, count;
|
|
|
|
|
|
|
|
piolist->address_space = address_space;
|
|
|
|
|
|
|
|
/* Handle the first entry specially. */
|
|
|
|
off_last = off_low = pio_start->offset;
|
|
|
|
off_high = off_low + pio_start->len;
|
|
|
|
count = 1;
|
|
|
|
|
|
|
|
for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
|
|
|
|
/* All entries must be sorted by offset. */
|
|
|
|
assert(pio->offset >= off_last);
|
|
|
|
off_last = pio->offset;
|
|
|
|
|
|
|
|
/* If we see a hole, break the region. */
|
|
|
|
if (off_last > off_high) {
|
|
|
|
portio_list_add_1(piolist, pio_start, count, start, off_low,
|
|
|
|
off_high);
|
|
|
|
/* ... and start collecting anew. */
|
|
|
|
pio_start = pio;
|
|
|
|
off_low = off_last;
|
|
|
|
off_high = off_low + pio->len;
|
|
|
|
count = 0;
|
|
|
|
} else if (off_last + pio->len > off_high) {
|
|
|
|
off_high = off_last + pio->len;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* There will always be an open sub-list. */
|
|
|
|
portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
|
|
|
|
}
|
|
|
|
|
|
|
|
void portio_list_del(PortioList *piolist)
|
|
|
|
{
|
2013-06-24 12:45:09 +04:00
|
|
|
MemoryRegionPortioList *mrpio;
|
2011-09-26 15:52:26 +04:00
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < piolist->nr; ++i) {
|
2013-06-24 12:45:09 +04:00
|
|
|
mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
|
|
|
|
memory_region_del_subregion(piolist->address_space, &mrpio->mr);
|
|
|
|
memory_region_destroy(&mrpio->mr);
|
|
|
|
g_free(mrpio);
|
2011-09-26 15:52:26 +04:00
|
|
|
piolist->regions[i] = NULL;
|
|
|
|
}
|
|
|
|
}
|