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7d8b28b8b5
qemu
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configs
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targets
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or1k-softmmu.mak
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default-configs: use TARGET_ARCH key Replace the individual TARGET_*=y lines with TARGET_ARCH, similar to how TARGET_BASE_ARCH is handled already. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-21 12:11:01 +03:00
TARGET_ARCH
=
openrisc
target/openrisc: Enable MTTCG This patch enables multithread TCG for OpenRISC. Since the or1k shared syncrhonized timer can be updated from each vCPU via helpers we use a mutex to synchronize updates. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2022-06-15 02:43:56 +03:00
TARGET_SUPPORTS_MTTCG
=
y
Replace TARGET_WORDS_BIGENDIAN Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1, and thus should always be defined to prevent misuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Suggested-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-03-23 18:57:18 +03:00
TARGET_BIG_ENDIAN
=
y
hw/openrisc/openrisc_sim: Add automatic device tree generation Using the device tree means that qemu can now directly tell the kernel what hardware is configured rather than use having to maintain and update a separate device tree file. This patch adds automatic device tree generation support for the OpenRISC simulator. A device tree is built up based on the state of the configure openrisc simulator. This is then dumped to memory and the load address is passed to the kernel in register r3. Signed-off-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2022-02-10 00:39:12 +03:00
TARGET_NEED_FDT
=
y
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