qemu/target/mips/tcg/msa.decode

# MIPS SIMD Architecture Module instruction set
#
# Copyright (C) 2020  Philippe Mathieu-Daudé
#
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Reference:
#       MIPS Architecture for Programmers Volume IV-j
#       - The MIPS32 SIMD Architecture Module, Revision 1.12
#         (Document Number: MD00866-2B-MSA32-AFP-01.12)
#       - The MIPS64 SIMD Architecture Module, Revision 1.12
#         (Document Number: MD00868-1D-MSA64-AFP-01.12)

&r                  rs rt rd sa

&msa_bz             df wt s16

@lsa                ...... rs:5 rt:5 rd:5 ... sa:2 ......   &r
@bz                 ...... ... ..   wt:5 s16:16             &msa_bz df=3
@bz_df              ...... ... df:2 wt:5 s16:16             &msa_bz

LSA                 000000 ..... ..... ..... 000 .. 000101  @lsa
DLSA                000000 ..... ..... ..... 000 .. 010101  @lsa

BZ_V                010001 01011  ..... ................    @bz
BNZ_V               010001 01111  ..... ................    @bz

BZ_x                010001 110 .. ..... ................    @bz_df
BNZ_x               010001 111 .. ..... ................    @bz_df

MSA                 011110 --------------------------
target/mips: Introduce decode tree bindings for MSA ASE Introduce the 'msa32' decodetree config for the 32-bit MSA ASE. We start by decoding: - the branch instructions, - all instructions based on the MSA opcode. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-20-f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> 2020-11-30 00:24:40 +03:00			`# MIPS SIMD Architecture Module instruction set`
			`#`
			`# Copyright (C) 2020 Philippe Mathieu-Daudé`
			`#`
			`# SPDX-License-Identifier: LGPL-2.1-or-later`
			`#`
			`# Reference:`
			`# MIPS Architecture for Programmers Volume IV-j`
target/mips: Merge msa32/msa64 decodetree definitions We don't need to maintain 2 sets of decodetree definitions. Merge them into a single file. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174636.2902654-3-f4bug@amsat.org> 2021-05-29 21:06:13 +03:00			`# - The MIPS32 SIMD Architecture Module, Revision 1.12`
			`# (Document Number: MD00866-2B-MSA32-AFP-01.12)`
			`# - The MIPS64 SIMD Architecture Module, Revision 1.12`
			`# (Document Number: MD00868-1D-MSA64-AFP-01.12)`
target/mips: Introduce decode tree bindings for MSA ASE Introduce the 'msa32' decodetree config for the 32-bit MSA ASE. We start by decoding: - the branch instructions, - all instructions based on the MSA opcode. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-20-f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> 2020-11-30 00:24:40 +03:00
target/mips: Rename 'rtype' as 'r' We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801234202.3167676-5-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> 2021-07-27 22:13:49 +03:00			`&r rs rt rd sa`
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes Add the LSA opcode to the MSA32 decodetree config, add DLSA to a new config for the MSA64 ASE, and call decode_msa64() in the main decode_opc() loop. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-23-f4bug@amsat.org> 2020-12-08 20:59:36 +03:00
target/mips: Introduce decode tree bindings for MSA ASE Introduce the 'msa32' decodetree config for the 32-bit MSA ASE. We start by decoding: - the branch instructions, - all instructions based on the MSA opcode. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-20-f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> 2020-11-30 00:24:40 +03:00			`&msa_bz df wt s16`

target/mips: Rename 'rtype' as 'r' We'll soon have more opcode and decoded arguments, and 'rtype' is not very helpful. Naming it simply 'r' ease reviewing the .decode files when we have many opcodes. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801234202.3167676-5-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> 2021-07-27 22:13:49 +03:00			`@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r`
target/mips: Introduce decode tree bindings for MSA ASE Introduce the 'msa32' decodetree config for the 32-bit MSA ASE. We start by decoding: - the branch instructions, - all instructions based on the MSA opcode. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-20-f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> 2020-11-30 00:24:40 +03:00			`@bz ...... ... .. wt:5 s16:16 &msa_bz df=3`
			`@bz_df ...... ... df:2 wt:5 s16:16 &msa_bz`

target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes Add the LSA opcode to the MSA32 decodetree config, add DLSA to a new config for the MSA64 ASE, and call decode_msa64() in the main decode_opc() loop. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-23-f4bug@amsat.org> 2020-12-08 20:59:36 +03:00			`LSA 000000 ..... ..... ..... 000 .. 000101 @lsa`
target/mips: Merge msa32/msa64 decodetree definitions We don't need to maintain 2 sets of decodetree definitions. Merge them into a single file. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174636.2902654-3-f4bug@amsat.org> 2021-05-29 21:06:13 +03:00			`DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa`
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes Add the LSA opcode to the MSA32 decodetree config, add DLSA to a new config for the MSA64 ASE, and call decode_msa64() in the main decode_opc() loop. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-23-f4bug@amsat.org> 2020-12-08 20:59:36 +03:00
target/mips: Introduce decode tree bindings for MSA ASE Introduce the 'msa32' decodetree config for the 32-bit MSA ASE. We start by decoding: - the branch instructions, - all instructions based on the MSA opcode. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-20-f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> 2020-11-30 00:24:40 +03:00			`BZ_V 010001 01011 ..... ................ @bz`
			`BNZ_V 010001 01111 ..... ................ @bz`

			`BZ_x 010001 110 .. ..... ................ @bz_df`
			`BNZ_x 010001 111 .. ..... ................ @bz_df`

			`MSA 011110 --------------------------`