2012-01-28 19:39:52 +04:00
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/*
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* QEMU CPU model
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*/
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#ifndef QEMU_CPU_H
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#define QEMU_CPU_H
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2012-12-05 20:49:13 +04:00
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#include "hw/qdev-core.h"
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2019-04-17 22:18:04 +03:00
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#include "disas/dis-asm.h"
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2022-02-03 14:31:29 +03:00
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#include "exec/cpu-common.h"
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2013-05-27 08:49:53 +04:00
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#include "exec/hwaddr.h"
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2015-04-26 18:49:24 +03:00
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#include "exec/memattrs.h"
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2018-02-11 12:36:01 +03:00
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#include "qapi/qapi-types-run-state.h"
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2016-07-11 13:53:41 +03:00
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#include "qemu/bitmap.h"
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2018-08-19 12:13:35 +03:00
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#include "qemu/rcu_queue.h"
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2013-06-25 01:50:24 +04:00
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#include "qemu/queue.h"
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2012-12-17 21:20:00 +04:00
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#include "qemu/thread.h"
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2017-08-31 01:39:53 +03:00
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#include "qemu/plugin.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2012-01-28 19:39:52 +04:00
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2014-02-18 10:11:25 +04:00
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typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
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void *opaque);
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2013-04-19 18:45:06 +04:00
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2012-01-28 19:39:52 +04:00
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/**
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* SECTION:cpu
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* @section_id: QEMU-cpu
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* @title: CPU Class
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* @short_description: Base class for all CPUs
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*/
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#define TYPE_CPU "cpu"
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2014-03-28 19:25:07 +04:00
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/* Since this macro is used a lot in hot code paths and in conjunction with
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* FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
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* an unchecked cast.
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*/
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#define CPU(obj) ((CPUState *)(obj))
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2022-09-23 11:47:59 +03:00
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/*
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* The class checkers bring in CPU_GET_CLASS() which is potentially
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* expensive given the eventual call to
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* object_class_dynamic_cast_assert(). Because of this the CPUState
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* has a cached value for the class in cs->cc which is set up in
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* cpu_exec_realizefn() for use in hot code paths.
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*/
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2020-09-03 23:43:22 +03:00
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typedef struct CPUClass CPUClass;
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2020-09-01 00:07:33 +03:00
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DECLARE_CLASS_CHECKERS(CPUClass, CPU,
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TYPE_CPU)
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2012-01-28 19:39:52 +04:00
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2022-02-14 19:08:40 +03:00
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/**
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* OBJECT_DECLARE_CPU_TYPE:
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* @CpuInstanceType: instance struct name
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* @CpuClassType: class struct name
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* @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
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*
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* This macro is typically used in "cpu-qom.h" header file, and will:
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*
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* - create the typedefs for the CPU object and class structs
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* - register the type for use with g_autoptr
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* - provide three standard type cast functions
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*
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* The object struct and class struct need to be declared manually.
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*/
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#define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
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2022-02-14 19:15:16 +03:00
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typedef struct ArchCPU CpuInstanceType; \
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OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
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2022-02-14 19:08:40 +03:00
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2016-06-14 15:26:17 +03:00
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typedef enum MMUAccessType {
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MMU_DATA_LOAD = 0,
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MMU_DATA_STORE = 1,
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MMU_INST_FETCH = 2
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} MMUAccessType;
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2016-02-11 14:17:32 +03:00
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typedef struct CPUWatchpoint CPUWatchpoint;
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2012-01-28 19:39:52 +04:00
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2021-02-04 19:39:23 +03:00
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/* see tcg-cpu-ops.h */
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struct TCGCPUOps;
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2021-02-04 19:39:09 +03:00
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2021-02-04 19:39:26 +03:00
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/* see accel-cpu.h */
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struct AccelCPUClass;
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2021-05-17 13:51:31 +03:00
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/* see sysemu-cpu-ops.h */
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struct SysemuCPUOps;
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2012-01-28 19:39:52 +04:00
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/**
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* CPUClass:
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2013-01-21 21:26:21 +04:00
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* @class_by_name: Callback to map -cpu command line model name to an
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* instantiatable CPU type.
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2014-03-04 02:19:19 +04:00
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* @parse_features: Callback to parse command line arguments.
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2013-06-16 09:49:48 +04:00
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* @reset_dump_flags: #CPUDumpFlags to use for reset logging.
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2013-08-25 20:53:55 +04:00
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* @has_work: Callback for checking if there is work to do.
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2013-06-27 21:09:09 +04:00
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* @memory_rw_debug: Callback for GDB memory access.
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2013-05-27 03:33:50 +04:00
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* @dump_state: Callback for dumping state.
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2013-04-23 12:29:41 +04:00
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* @get_arch_id: Callback for getting architecture-dependent CPU ID.
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2019-02-01 17:55:46 +03:00
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* @set_pc: Callback for setting the Program Counter register. This
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* should have the semantics used by the target architecture when
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* setting the PC from a source such as an ELF file entry point;
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* for example on Arm it will also set the Thumb mode bit based
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* on the least significant bit of the new PC value.
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* If the target behaviour here is anything other than "set
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* the PC register to the value passed in" then the target must
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* also implement the synchronize_from_tb hook.
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2022-09-30 20:31:21 +03:00
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* @get_pc: Callback for getting the Program Counter register.
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* As above, with the semantics of the target architecture.
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2013-06-29 06:18:45 +04:00
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* @gdb_read_register: Callback for letting GDB read a register.
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* @gdb_write_register: Callback for letting GDB write a register.
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2021-07-20 18:47:23 +03:00
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* @gdb_adjust_breakpoint: Callback for adjusting the address of a
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* breakpoint. Used by AVR to handle a gdb mis-feature with
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* its Harvard architecture split code and data.
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2013-06-29 01:18:47 +04:00
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* @gdb_num_core_regs: Number of core registers accessible to GDB.
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2013-07-07 17:08:22 +04:00
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* @gdb_core_xml_file: File name for core registers GDB XML description.
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2014-09-12 22:04:17 +04:00
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* @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
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* before the insn which triggers a watchpoint rather than after it.
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2015-12-03 15:14:41 +03:00
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* @gdb_arch_name: Optional callback that returns the architecture name known
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* to GDB. The caller must free the returned string with g_free.
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2018-05-18 19:48:07 +03:00
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* @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
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* gdb stub. Returns a pointer to the XML contents for the specified XML file
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* or NULL if the CPU doesn't have a dynamically generated content for it.
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2015-06-24 06:57:33 +03:00
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* @disas_set_info: Setup architecture specific components of disassembly info
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2017-02-07 21:29:59 +03:00
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* @adjust_watchpoint_address: Perform a target-specific adjustment to an
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* address before attempting to match it against watchpoints.
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2020-09-22 10:14:14 +03:00
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* @deprecation_note: If this CPUClass is deprecated, this field provides
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* related information.
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2012-01-28 19:39:52 +04:00
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*
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* Represents a CPU family or model.
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*/
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2020-09-03 23:43:22 +03:00
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struct CPUClass {
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2012-01-28 19:39:52 +04:00
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/*< private >*/
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2012-12-05 20:49:13 +04:00
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DeviceClass parent_class;
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2012-01-28 19:39:52 +04:00
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/*< public >*/
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2013-01-21 21:26:21 +04:00
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ObjectClass *(*class_by_name)(const char *cpu_model);
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2016-06-09 20:11:01 +03:00
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void (*parse_features)(const char *typename, char *str, Error **errp);
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2013-01-21 21:26:21 +04:00
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2013-08-25 20:53:55 +04:00
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bool (*has_work)(CPUState *cpu);
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2013-06-27 21:09:09 +04:00
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int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
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uint8_t *buf, int len, bool is_write);
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2019-04-17 22:18:02 +03:00
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void (*dump_state)(CPUState *cpu, FILE *, int flags);
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2013-04-23 12:29:41 +04:00
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int64_t (*get_arch_id)(CPUState *cpu);
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2013-06-21 21:09:18 +04:00
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void (*set_pc)(CPUState *cpu, vaddr value);
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2022-09-30 20:31:21 +03:00
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vaddr (*get_pc)(CPUState *cpu);
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2020-03-16 20:21:41 +03:00
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int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
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2013-06-29 06:18:45 +04:00
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int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
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2021-07-20 18:47:23 +03:00
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vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
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2013-01-20 23:23:22 +04:00
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2013-07-07 17:08:22 +04:00
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const char *gdb_core_xml_file;
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2015-12-03 15:14:41 +03:00
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gchar * (*gdb_arch_name)(CPUState *cpu);
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2018-05-18 19:48:07 +03:00
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const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
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2015-06-24 06:57:33 +03:00
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void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
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2017-10-16 05:02:42 +03:00
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2020-09-22 10:14:14 +03:00
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const char *deprecation_note;
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2021-02-04 19:39:26 +03:00
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struct AccelCPUClass *accel_cpu;
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2021-02-04 19:39:09 +03:00
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2021-05-17 13:51:31 +03:00
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/* when system emulation is not available, this pointer is NULL */
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const struct SysemuCPUOps *sysemu_ops;
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2021-02-04 19:39:23 +03:00
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/* when TCG is not available, this pointer is NULL */
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2021-02-28 02:21:17 +03:00
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const struct TCGCPUOps *tcg_ops;
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2021-03-22 16:27:59 +03:00
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/*
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* if not NULL, this is called in order for the CPUClass to initialize
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* class data that depends on the accelerator, see accel/accel-common.c.
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*/
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void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
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2021-07-31 04:20:45 +03:00
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/*
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* Keep non-pointer data at the end to minimize holes.
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*/
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int reset_dump_flags;
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int gdb_num_core_regs;
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bool gdb_stop_before_watchpoint;
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2020-09-03 23:43:22 +03:00
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};
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2012-01-28 19:39:52 +04:00
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2019-03-29 00:54:23 +03:00
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/*
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* Low 16 bits: number of cycles left, used only in icount mode.
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* High 16 bits: Set to -1 to force TCG to stop executing linked TBs
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* for this CPU and return to its top level loop (even in non-icount mode).
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* This allows a single read-compare-cbranch-write sequence to test
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* for both decrementer underflow and exceptions.
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*/
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typedef union IcountDecr {
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uint32_t u32;
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struct {
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2022-03-23 18:57:17 +03:00
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#if HOST_BIG_ENDIAN
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2019-03-29 00:54:23 +03:00
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uint16_t high;
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uint16_t low;
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2013-08-26 07:51:49 +04:00
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#else
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2019-03-29 00:54:23 +03:00
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uint16_t low;
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uint16_t high;
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2013-08-26 07:51:49 +04:00
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#endif
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2019-03-29 00:54:23 +03:00
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} u16;
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} IcountDecr;
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2013-08-26 07:51:49 +04:00
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2013-08-26 23:22:53 +04:00
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typedef struct CPUBreakpoint {
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vaddr pc;
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int flags; /* BP_* */
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QTAILQ_ENTRY(CPUBreakpoint) entry;
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} CPUBreakpoint;
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2016-02-11 14:17:32 +03:00
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struct CPUWatchpoint {
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2013-08-26 20:23:18 +04:00
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vaddr vaddr;
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2014-09-12 17:06:48 +04:00
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vaddr len;
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2014-09-12 17:06:48 +04:00
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vaddr hitaddr;
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2015-04-26 18:49:24 +03:00
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MemTxAttrs hitattrs;
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2013-08-26 20:23:18 +04:00
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int flags; /* BP_* */
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QTAILQ_ENTRY(CPUWatchpoint) entry;
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2016-02-11 14:17:32 +03:00
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};
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2013-08-26 20:23:18 +04:00
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2020-07-13 23:04:10 +03:00
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#ifdef CONFIG_PLUGIN
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/*
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* For plugins we sometime need to save the resolved iotlb data before
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* the memory regions get moved around by io_writex.
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*/
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typedef struct SavedIOTLB {
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MemoryRegionSection *section;
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hwaddr mr_offset;
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} SavedIOTLB;
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#endif
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2012-12-01 08:35:08 +04:00
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struct KVMState;
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2012-12-01 09:18:14 +04:00
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struct kvm_run;
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2012-12-01 08:35:08 +04:00
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2017-01-10 13:59:57 +03:00
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struct hax_vcpu_state;
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2021-06-03 16:09:34 +03:00
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struct hvf_vcpu_state;
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2017-01-10 13:59:57 +03:00
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2016-03-15 18:47:38 +03:00
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/* work queue */
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2016-10-31 12:36:08 +03:00
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/* The union type allows passing of 64 bit target pointers on 32 bit
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* hosts in a single parameter
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*/
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typedef union {
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int host_int;
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unsigned long host_ulong;
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void *host_ptr;
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vaddr target_ptr;
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} run_on_cpu_data;
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#define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
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#define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
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#define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
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#define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
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#define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
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typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
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2016-08-29 10:51:00 +03:00
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struct qemu_work_item;
|
2016-03-15 18:47:38 +03:00
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2017-05-10 14:29:46 +03:00
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#define CPU_UNSET_NUMA_NODE_ID -1
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2017-07-04 11:34:19 +03:00
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#define CPU_TRACE_DSTATE_MAX_EVENTS 32
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2017-05-10 14:29:46 +03:00
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2012-01-28 19:39:52 +04:00
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/**
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* CPUState:
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2012-12-17 09:18:02 +04:00
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* @cpu_index: CPU index (informative).
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2019-01-29 14:46:05 +03:00
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* @cluster_index: Identifies which cluster this CPU is in.
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|
|
* For boards which don't define clusters or for "loose" CPUs not assigned
|
|
|
|
* to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
|
|
|
|
* be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
|
|
|
|
* QOM parent.
|
2021-03-02 06:21:08 +03:00
|
|
|
* @tcg_cflags: Pre-computed cflags for this cpu.
|
2012-12-17 06:27:07 +04:00
|
|
|
* @nr_cores: Number of cores within this CPU package.
|
|
|
|
* @nr_threads: Number of threads within this CPU.
|
2016-08-31 22:33:58 +03:00
|
|
|
* @running: #true if CPU is currently running (lockless).
|
|
|
|
* @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
|
2016-08-31 17:56:04 +03:00
|
|
|
* valid under cpu_list_lock.
|
2012-05-03 00:49:36 +04:00
|
|
|
* @created: Indicates whether the CPU thread has been successfully created.
|
2013-01-17 21:51:17 +04:00
|
|
|
* @interrupt_request: Indicates a pending interrupt request.
|
|
|
|
* @halted: Nonzero if the CPU is in suspended state.
|
2012-05-03 01:10:09 +04:00
|
|
|
* @stop: Indicates a pending stop request.
|
2012-05-03 01:26:21 +04:00
|
|
|
* @stopped: Indicates the CPU has been artificially stopped.
|
2016-05-12 06:48:13 +03:00
|
|
|
* @unplug: Indicates a pending CPU unplug request.
|
2015-07-03 15:01:44 +03:00
|
|
|
* @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
|
2013-06-21 22:20:45 +04:00
|
|
|
* @singlestep_enabled: Flags for single-stepping.
|
2013-08-26 07:39:29 +04:00
|
|
|
* @icount_extra: Instructions until next timer event.
|
2015-06-24 15:16:26 +03:00
|
|
|
* @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
|
|
|
|
* requires that IO only be performed on the last instruction of a TB
|
|
|
|
* so that interrupts take effect immediately.
|
2015-10-01 17:29:50 +03:00
|
|
|
* @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
|
|
|
|
* AddressSpaces this CPU has)
|
2016-01-21 17:15:04 +03:00
|
|
|
* @num_ases: number of CPUAddressSpaces in @cpu_ases
|
2015-10-01 17:29:50 +03:00
|
|
|
* @as: Pointer to the first AddressSpace, for the convenience of targets which
|
|
|
|
* only have a single AddressSpace
|
2013-01-17 15:13:41 +04:00
|
|
|
* @env_ptr: Pointer to subclass-specific CPUArchState field.
|
2019-03-29 00:54:23 +03:00
|
|
|
* @icount_decr_ptr: Pointer to IcountDecr field within subclass.
|
2013-06-28 23:11:37 +04:00
|
|
|
* @gdb_regs: Additional GDB registers.
|
2013-06-29 01:18:47 +04:00
|
|
|
* @gdb_num_regs: Number of total registers accessible to GDB.
|
2013-08-12 20:09:47 +04:00
|
|
|
* @gdb_num_g_regs: Number of registers in GDB 'g' packets.
|
2013-05-30 00:29:20 +04:00
|
|
|
* @next_cpu: Next CPU sharing TB cache.
|
2013-08-26 20:14:44 +04:00
|
|
|
* @opaque: User data.
|
2013-08-26 05:41:01 +04:00
|
|
|
* @mem_io_pc: Host Program Counter at which the memory was accessed.
|
2012-10-31 08:29:00 +04:00
|
|
|
* @kvm_fd: vCPU file descriptor for KVM.
|
2020-06-12 22:02:24 +03:00
|
|
|
* @work_mutex: Lock to prevent multiple access to @work_list.
|
|
|
|
* @work_list: List of pending asynchronous work.
|
2017-07-04 11:38:26 +03:00
|
|
|
* @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
|
|
|
|
* to @trace_dstate).
|
2016-07-11 13:53:41 +03:00
|
|
|
* @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
|
2017-08-31 01:39:53 +03:00
|
|
|
* @plugin_mask: Plugin event bitmap. Modified only via async work.
|
2017-09-07 15:54:54 +03:00
|
|
|
* @ignore_memory_transaction_failures: Cached copy of the MachineState
|
|
|
|
* flag of the same name: allows the board to suppress calling of the
|
|
|
|
* CPU do_transaction_failed hook function.
|
2021-05-17 11:23:50 +03:00
|
|
|
* @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
|
|
|
|
* ring is enabled.
|
|
|
|
* @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
|
|
|
|
* dirty ring structure.
|
2012-01-28 19:39:52 +04:00
|
|
|
*
|
|
|
|
* State of one CPU core or thread.
|
|
|
|
*/
|
|
|
|
struct CPUState {
|
|
|
|
/*< private >*/
|
2012-12-05 20:49:13 +04:00
|
|
|
DeviceState parent_obj;
|
2022-09-23 11:47:59 +03:00
|
|
|
/* cache to avoid expensive CPU_GET_CLASS */
|
|
|
|
CPUClass *cc;
|
2012-01-28 19:39:52 +04:00
|
|
|
/*< public >*/
|
|
|
|
|
2012-12-17 06:27:07 +04:00
|
|
|
int nr_cores;
|
|
|
|
int nr_threads;
|
|
|
|
|
2012-05-02 19:00:37 +04:00
|
|
|
struct QemuThread *thread;
|
2012-05-02 17:24:40 +04:00
|
|
|
#ifdef _WIN32
|
|
|
|
HANDLE hThread;
|
2022-10-28 07:57:26 +03:00
|
|
|
QemuSemaphore sem;
|
2012-05-02 17:24:40 +04:00
|
|
|
#endif
|
2012-05-03 08:59:07 +04:00
|
|
|
int thread_id;
|
2016-08-31 22:33:58 +03:00
|
|
|
bool running, has_waiter;
|
2012-05-03 03:22:49 +04:00
|
|
|
struct QemuCond *halt_cond;
|
2012-05-02 19:49:49 +04:00
|
|
|
bool thread_kicked;
|
2012-05-03 00:49:36 +04:00
|
|
|
bool created;
|
2012-05-03 01:10:09 +04:00
|
|
|
bool stop;
|
2012-05-03 01:26:21 +04:00
|
|
|
bool stopped;
|
2020-08-26 08:55:28 +03:00
|
|
|
|
|
|
|
/* Should CPU start in powered-off state? */
|
|
|
|
bool start_powered_off;
|
|
|
|
|
2016-05-12 06:48:13 +03:00
|
|
|
bool unplug;
|
2015-07-03 15:01:44 +03:00
|
|
|
bool crash_occurred;
|
2015-08-26 01:19:19 +03:00
|
|
|
bool exit_request;
|
2018-11-27 01:14:43 +03:00
|
|
|
bool in_exclusive_context;
|
2017-10-13 20:50:02 +03:00
|
|
|
uint32_t cflags_next_tb;
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
/* updates protected by BQL */
|
2013-01-17 21:51:17 +04:00
|
|
|
uint32_t interrupt_request;
|
2013-06-21 22:20:45 +04:00
|
|
|
int singlestep_enabled;
|
2017-03-31 18:09:42 +03:00
|
|
|
int64_t icount_budget;
|
2013-08-26 07:39:29 +04:00
|
|
|
int64_t icount_extra;
|
2019-03-14 23:06:29 +03:00
|
|
|
uint64_t random_seed;
|
2013-08-26 08:22:03 +04:00
|
|
|
sigjmp_buf jmp_env;
|
2012-05-02 17:24:40 +04:00
|
|
|
|
2015-07-10 13:32:32 +03:00
|
|
|
QemuMutex work_mutex;
|
2020-06-12 22:02:24 +03:00
|
|
|
QSIMPLEQ_HEAD(, qemu_work_item) work_list;
|
2015-07-10 13:32:32 +03:00
|
|
|
|
2015-10-01 17:29:50 +03:00
|
|
|
CPUAddressSpace *cpu_ases;
|
2016-01-21 17:15:04 +03:00
|
|
|
int num_ases;
|
2013-12-17 07:06:51 +04:00
|
|
|
AddressSpace *as;
|
2016-01-21 17:15:06 +03:00
|
|
|
MemoryRegion *memory;
|
2013-12-17 07:06:51 +04:00
|
|
|
|
2022-02-07 15:35:58 +03:00
|
|
|
CPUArchState *env_ptr;
|
2019-03-29 00:54:23 +03:00
|
|
|
IcountDecr *icount_decr_ptr;
|
2016-10-27 18:10:03 +03:00
|
|
|
|
2022-08-15 23:13:05 +03:00
|
|
|
CPUJumpCache *tb_jmp_cache;
|
2016-10-27 18:10:03 +03:00
|
|
|
|
2013-06-28 23:11:37 +04:00
|
|
|
struct GDBRegisterState *gdb_regs;
|
2013-06-29 01:18:47 +04:00
|
|
|
int gdb_num_regs;
|
2013-08-12 20:09:47 +04:00
|
|
|
int gdb_num_g_regs;
|
2013-06-25 01:50:24 +04:00
|
|
|
QTAILQ_ENTRY(CPUState) node;
|
2013-01-16 22:29:31 +04:00
|
|
|
|
2013-08-26 23:22:53 +04:00
|
|
|
/* ice debug support */
|
2018-12-06 13:58:10 +03:00
|
|
|
QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
|
2013-08-26 23:22:53 +04:00
|
|
|
|
2018-12-06 13:58:10 +03:00
|
|
|
QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
|
2013-08-26 20:23:18 +04:00
|
|
|
CPUWatchpoint *watchpoint_hit;
|
|
|
|
|
2013-08-26 20:14:44 +04:00
|
|
|
void *opaque;
|
|
|
|
|
2013-08-26 05:41:01 +04:00
|
|
|
/* In order to avoid passing too many arguments to the MMIO helpers,
|
|
|
|
* we store some rarely used information in the CPU context.
|
|
|
|
*/
|
|
|
|
uintptr_t mem_io_pc;
|
|
|
|
|
2021-05-17 11:23:50 +03:00
|
|
|
/* Only used in KVM */
|
2012-10-31 08:29:00 +04:00
|
|
|
int kvm_fd;
|
2012-12-01 08:35:08 +04:00
|
|
|
struct KVMState *kvm_state;
|
2012-12-01 09:18:14 +04:00
|
|
|
struct kvm_run *kvm_run;
|
2021-05-17 11:23:50 +03:00
|
|
|
struct kvm_dirty_gfn *kvm_dirty_gfns;
|
|
|
|
uint32_t kvm_fetch_index;
|
2021-06-29 19:01:18 +03:00
|
|
|
uint64_t dirty_pages;
|
2012-10-31 08:29:00 +04:00
|
|
|
|
2022-11-11 18:47:56 +03:00
|
|
|
/* Use by accel-block: CPU is executing an ioctl() */
|
|
|
|
QemuLockCnt in_ioctl_lock;
|
|
|
|
|
2017-07-04 11:34:19 +03:00
|
|
|
/* Used for events with 'vcpu' and *without* the 'disabled' properties */
|
2017-07-04 11:38:26 +03:00
|
|
|
DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS);
|
2017-07-04 11:34:19 +03:00
|
|
|
DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS);
|
2016-07-11 13:53:41 +03:00
|
|
|
|
2017-08-31 01:39:53 +03:00
|
|
|
DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
|
|
|
|
|
2020-07-13 23:04:10 +03:00
|
|
|
#ifdef CONFIG_PLUGIN
|
2017-08-31 01:39:53 +03:00
|
|
|
GArray *plugin_mem_cbs;
|
2020-07-13 23:04:10 +03:00
|
|
|
/* saved iotlb data from io_writex */
|
|
|
|
SavedIOTLB saved_iotlb;
|
|
|
|
#endif
|
2017-08-31 01:39:53 +03:00
|
|
|
|
2012-05-03 00:28:58 +04:00
|
|
|
/* TODO Move common fields from CPUArchState here. */
|
2017-09-13 16:23:57 +03:00
|
|
|
int cpu_index;
|
2019-01-29 14:46:05 +03:00
|
|
|
int cluster_index;
|
2021-03-02 06:21:08 +03:00
|
|
|
uint32_t tcg_cflags;
|
2017-09-13 16:23:57 +03:00
|
|
|
uint32_t halted;
|
2013-08-26 07:15:23 +04:00
|
|
|
uint32_t can_do_io;
|
2017-09-13 16:23:57 +03:00
|
|
|
int32_t exception_index;
|
2014-03-15 02:30:10 +04:00
|
|
|
|
2017-06-18 22:11:01 +03:00
|
|
|
/* shared by kvm, hax and hvf */
|
|
|
|
bool vcpu_dirty;
|
|
|
|
|
2015-09-08 20:12:33 +03:00
|
|
|
/* Used to keep track of an outstanding cpu throttle thread for migration
|
|
|
|
* autoconverge
|
|
|
|
*/
|
|
|
|
bool throttle_thread_scheduled;
|
|
|
|
|
2022-06-25 20:38:35 +03:00
|
|
|
/*
|
|
|
|
* Sleep throttle_us_per_full microseconds once dirty ring is full
|
|
|
|
* if dirty page rate limit is enabled.
|
|
|
|
*/
|
|
|
|
int64_t throttle_us_per_full;
|
|
|
|
|
2017-09-07 15:54:54 +03:00
|
|
|
bool ignore_memory_transaction_failures;
|
|
|
|
|
2021-12-27 18:01:24 +03:00
|
|
|
/* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
|
|
|
|
bool prctl_unalign_sigbus;
|
|
|
|
|
2017-01-10 13:59:57 +03:00
|
|
|
struct hax_vcpu_state *hax_vcpu;
|
2017-02-23 21:29:18 +03:00
|
|
|
|
2021-06-03 16:09:34 +03:00
|
|
|
struct hvf_vcpu_state *hvf;
|
2018-06-15 16:57:16 +03:00
|
|
|
|
|
|
|
/* track IOMMUs whose translations we've cached in the TCG TLB */
|
|
|
|
GArray *iommu_notifiers;
|
2012-01-28 19:39:52 +04:00
|
|
|
};
|
|
|
|
|
2018-12-06 13:56:15 +03:00
|
|
|
typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
|
|
|
|
extern CPUTailQ cpus;
|
|
|
|
|
2018-08-19 12:13:35 +03:00
|
|
|
#define first_cpu QTAILQ_FIRST_RCU(&cpus)
|
|
|
|
#define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
|
|
|
|
#define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
|
2013-06-25 01:50:24 +04:00
|
|
|
#define CPU_FOREACH_SAFE(cpu, next_cpu) \
|
2018-08-19 12:13:35 +03:00
|
|
|
QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
|
2013-05-30 00:29:20 +04:00
|
|
|
|
2015-08-26 01:17:58 +03:00
|
|
|
extern __thread CPUState *current_cpu;
|
2013-05-27 07:17:50 +04:00
|
|
|
|
2017-02-23 21:29:08 +03:00
|
|
|
/**
|
|
|
|
* qemu_tcg_mttcg_enabled:
|
|
|
|
* Check whether we are running MultiThread TCG or not.
|
|
|
|
*
|
|
|
|
* Returns: %true if we are in MTTCG mode %false otherwise.
|
|
|
|
*/
|
|
|
|
extern bool mttcg_enabled;
|
|
|
|
#define qemu_tcg_mttcg_enabled() (mttcg_enabled)
|
|
|
|
|
2013-05-28 15:28:38 +04:00
|
|
|
/**
|
|
|
|
* cpu_paging_enabled:
|
|
|
|
* @cpu: The CPU whose state is to be inspected.
|
|
|
|
*
|
|
|
|
* Returns: %true if paging is enabled, %false otherwise.
|
|
|
|
*/
|
|
|
|
bool cpu_paging_enabled(const CPUState *cpu);
|
|
|
|
|
2013-05-28 15:52:01 +04:00
|
|
|
/**
|
|
|
|
* cpu_get_memory_mapping:
|
|
|
|
* @cpu: The CPU whose memory mappings are to be obtained.
|
|
|
|
* @list: Where to write the memory mappings to.
|
|
|
|
* @errp: Pointer for reporting an #Error.
|
|
|
|
*/
|
|
|
|
void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
|
|
|
|
Error **errp);
|
|
|
|
|
2020-05-22 20:25:09 +03:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
|
|
|
2013-04-19 18:45:06 +04:00
|
|
|
/**
|
|
|
|
* cpu_write_elf64_note:
|
|
|
|
* @f: pointer to a function that writes memory to a file
|
|
|
|
* @cpu: The CPU whose memory is to be dumped
|
|
|
|
* @cpuid: ID number of the CPU
|
|
|
|
* @opaque: pointer to the CPUState struct
|
|
|
|
*/
|
|
|
|
int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
|
|
|
|
int cpuid, void *opaque);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_write_elf64_qemunote:
|
|
|
|
* @f: pointer to a function that writes memory to a file
|
|
|
|
* @cpu: The CPU whose memory is to be dumped
|
|
|
|
* @cpuid: ID number of the CPU
|
|
|
|
* @opaque: pointer to the CPUState struct
|
|
|
|
*/
|
|
|
|
int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
|
|
|
|
void *opaque);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_write_elf32_note:
|
|
|
|
* @f: pointer to a function that writes memory to a file
|
|
|
|
* @cpu: The CPU whose memory is to be dumped
|
|
|
|
* @cpuid: ID number of the CPU
|
|
|
|
* @opaque: pointer to the CPUState struct
|
|
|
|
*/
|
|
|
|
int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
|
|
|
|
int cpuid, void *opaque);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_write_elf32_qemunote:
|
|
|
|
* @f: pointer to a function that writes memory to a file
|
|
|
|
* @cpu: The CPU whose memory is to be dumped
|
|
|
|
* @cpuid: ID number of the CPU
|
|
|
|
* @opaque: pointer to the CPUState struct
|
|
|
|
*/
|
|
|
|
int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
|
|
|
|
void *opaque);
|
2012-01-28 19:39:52 +04:00
|
|
|
|
2017-02-14 09:25:23 +03:00
|
|
|
/**
|
|
|
|
* cpu_get_crash_info:
|
|
|
|
* @cpu: The CPU to get crash information for
|
|
|
|
*
|
|
|
|
* Gets the previously saved crash information.
|
|
|
|
* Caller is responsible for freeing the data.
|
|
|
|
*/
|
|
|
|
GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
|
|
|
|
|
2020-05-22 20:25:09 +03:00
|
|
|
#endif /* !CONFIG_USER_ONLY */
|
|
|
|
|
2013-05-27 03:33:50 +04:00
|
|
|
/**
|
|
|
|
* CPUDumpFlags:
|
|
|
|
* @CPU_DUMP_CODE:
|
|
|
|
* @CPU_DUMP_FPU: dump FPU register state, not just integer
|
|
|
|
* @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
|
|
|
|
*/
|
|
|
|
enum CPUDumpFlags {
|
|
|
|
CPU_DUMP_CODE = 0x00010000,
|
|
|
|
CPU_DUMP_FPU = 0x00020000,
|
|
|
|
CPU_DUMP_CCOP = 0x00040000,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_dump_state:
|
|
|
|
* @cpu: The CPU whose state is to be dumped.
|
2019-04-17 22:18:02 +03:00
|
|
|
* @f: If non-null, dump to this stream, else to current print sink.
|
2013-05-27 03:33:50 +04:00
|
|
|
*
|
|
|
|
* Dumps CPU state.
|
|
|
|
*/
|
2019-04-17 22:18:02 +03:00
|
|
|
void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
|
2013-05-27 03:33:50 +04:00
|
|
|
|
2013-06-29 20:55:54 +04:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2016-01-21 17:15:05 +03:00
|
|
|
/**
|
|
|
|
* cpu_get_phys_page_attrs_debug:
|
|
|
|
* @cpu: The CPU to obtain the physical page address for.
|
|
|
|
* @addr: The virtual address.
|
|
|
|
* @attrs: Updated on return with the memory transaction attributes to use
|
|
|
|
* for this access.
|
|
|
|
*
|
|
|
|
* Obtains the physical page corresponding to a virtual one, together
|
|
|
|
* with the corresponding memory transaction attributes to use for the access.
|
|
|
|
* Use it only for debugging because no protection checks are done.
|
|
|
|
*
|
|
|
|
* Returns: Corresponding physical page address or -1 if no page found.
|
|
|
|
*/
|
2021-05-17 13:51:23 +03:00
|
|
|
hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
|
|
|
|
MemTxAttrs *attrs);
|
2016-01-21 17:15:05 +03:00
|
|
|
|
2013-06-29 20:55:54 +04:00
|
|
|
/**
|
|
|
|
* cpu_get_phys_page_debug:
|
|
|
|
* @cpu: The CPU to obtain the physical page address for.
|
|
|
|
* @addr: The virtual address.
|
|
|
|
*
|
|
|
|
* Obtains the physical page corresponding to a virtual one.
|
|
|
|
* Use it only for debugging because no protection checks are done.
|
|
|
|
*
|
|
|
|
* Returns: Corresponding physical page address or -1 if no page found.
|
|
|
|
*/
|
2021-05-17 13:51:23 +03:00
|
|
|
hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
|
2016-01-21 17:15:05 +03:00
|
|
|
|
|
|
|
/** cpu_asidx_from_attrs:
|
|
|
|
* @cpu: CPU
|
|
|
|
* @attrs: memory transaction attributes
|
|
|
|
*
|
|
|
|
* Returns the address space index specifying the CPU AddressSpace
|
|
|
|
* to use for a memory access with the given transaction attributes.
|
|
|
|
*/
|
2021-05-17 13:51:23 +03:00
|
|
|
int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
|
2016-01-21 17:15:05 +03:00
|
|
|
|
2021-05-17 13:51:24 +03:00
|
|
|
/**
|
|
|
|
* cpu_virtio_is_big_endian:
|
|
|
|
* @cpu: CPU
|
|
|
|
|
|
|
|
* Returns %true if a CPU which supports runtime configurable endianness
|
|
|
|
* is currently big-endian.
|
|
|
|
*/
|
|
|
|
bool cpu_virtio_is_big_endian(CPUState *cpu);
|
2020-05-22 20:25:09 +03:00
|
|
|
|
|
|
|
#endif /* CONFIG_USER_ONLY */
|
2013-06-29 20:55:54 +04:00
|
|
|
|
2016-08-28 04:45:14 +03:00
|
|
|
/**
|
|
|
|
* cpu_list_add:
|
|
|
|
* @cpu: The CPU to be added to the list of CPUs.
|
|
|
|
*/
|
|
|
|
void cpu_list_add(CPUState *cpu);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_list_remove:
|
|
|
|
* @cpu: The CPU to be removed from the list of CPUs.
|
|
|
|
*/
|
|
|
|
void cpu_list_remove(CPUState *cpu);
|
|
|
|
|
2012-01-28 19:39:52 +04:00
|
|
|
/**
|
|
|
|
* cpu_reset:
|
|
|
|
* @cpu: The CPU whose state is to be reset.
|
|
|
|
*/
|
|
|
|
void cpu_reset(CPUState *cpu);
|
|
|
|
|
2013-01-21 21:26:21 +04:00
|
|
|
/**
|
|
|
|
* cpu_class_by_name:
|
|
|
|
* @typename: The CPU base type.
|
|
|
|
* @cpu_model: The model string without any parameters.
|
|
|
|
*
|
|
|
|
* Looks up a CPU #ObjectClass matching name @cpu_model.
|
|
|
|
*
|
|
|
|
* Returns: A #CPUClass or %NULL if not matching class is found.
|
|
|
|
*/
|
|
|
|
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
|
|
|
|
|
2017-09-13 19:04:53 +03:00
|
|
|
/**
|
|
|
|
* cpu_create:
|
|
|
|
* @typename: The CPU type.
|
|
|
|
*
|
|
|
|
* Instantiates a CPU and realizes the CPU.
|
|
|
|
*
|
|
|
|
* Returns: A #CPUState or %NULL if an error occurred.
|
|
|
|
*/
|
|
|
|
CPUState *cpu_create(const char *typename);
|
|
|
|
|
|
|
|
/**
|
2019-04-17 05:59:40 +03:00
|
|
|
* parse_cpu_option:
|
|
|
|
* @cpu_option: The -cpu option including optional parameters.
|
2017-09-13 19:04:53 +03:00
|
|
|
*
|
|
|
|
* processes optional parameters and registers them as global properties
|
|
|
|
*
|
2017-09-13 19:04:54 +03:00
|
|
|
* Returns: type of CPU to create or prints error and terminates process
|
|
|
|
* if an error occurred.
|
2017-09-13 19:04:53 +03:00
|
|
|
*/
|
2019-04-17 05:59:40 +03:00
|
|
|
const char *parse_cpu_option(const char *cpu_option);
|
2014-03-04 06:17:10 +04:00
|
|
|
|
2012-05-03 08:43:49 +04:00
|
|
|
/**
|
2013-08-25 20:53:55 +04:00
|
|
|
* cpu_has_work:
|
2012-05-03 08:43:49 +04:00
|
|
|
* @cpu: The vCPU to check.
|
|
|
|
*
|
|
|
|
* Checks whether the CPU has work to do.
|
|
|
|
*
|
|
|
|
* Returns: %true if the CPU has work, %false otherwise.
|
|
|
|
*/
|
2013-08-25 20:53:55 +04:00
|
|
|
static inline bool cpu_has_work(CPUState *cpu)
|
|
|
|
{
|
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
|
|
|
|
|
|
|
g_assert(cc->has_work);
|
|
|
|
return cc->has_work(cpu);
|
|
|
|
}
|
2012-05-03 08:43:49 +04:00
|
|
|
|
2012-05-03 00:23:49 +04:00
|
|
|
/**
|
|
|
|
* qemu_cpu_is_self:
|
|
|
|
* @cpu: The vCPU to check against.
|
|
|
|
*
|
|
|
|
* Checks whether the caller is executing on the vCPU thread.
|
|
|
|
*
|
|
|
|
* Returns: %true if called from @cpu's thread, %false otherwise.
|
|
|
|
*/
|
|
|
|
bool qemu_cpu_is_self(CPUState *cpu);
|
|
|
|
|
2012-05-03 06:34:15 +04:00
|
|
|
/**
|
|
|
|
* qemu_cpu_kick:
|
|
|
|
* @cpu: The vCPU to kick.
|
|
|
|
*
|
|
|
|
* Kicks @cpu's thread.
|
|
|
|
*/
|
|
|
|
void qemu_cpu_kick(CPUState *cpu);
|
|
|
|
|
2012-05-03 01:38:39 +04:00
|
|
|
/**
|
|
|
|
* cpu_is_stopped:
|
|
|
|
* @cpu: The CPU to check.
|
|
|
|
*
|
|
|
|
* Checks whether the CPU is stopped.
|
|
|
|
*
|
|
|
|
* Returns: %true if run state is not running or if artificially stopped;
|
|
|
|
* %false otherwise.
|
|
|
|
*/
|
|
|
|
bool cpu_is_stopped(CPUState *cpu);
|
|
|
|
|
2016-08-29 10:51:00 +03:00
|
|
|
/**
|
|
|
|
* do_run_on_cpu:
|
|
|
|
* @cpu: The vCPU to run on.
|
|
|
|
* @func: The function to be executed.
|
|
|
|
* @data: Data to pass to the function.
|
|
|
|
* @mutex: Mutex to release while waiting for @func to run.
|
|
|
|
*
|
|
|
|
* Used internally in the implementation of run_on_cpu.
|
|
|
|
*/
|
2016-10-31 12:36:08 +03:00
|
|
|
void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
|
2016-08-29 10:51:00 +03:00
|
|
|
QemuMutex *mutex);
|
|
|
|
|
2012-05-03 16:58:47 +04:00
|
|
|
/**
|
|
|
|
* run_on_cpu:
|
|
|
|
* @cpu: The vCPU to run on.
|
|
|
|
* @func: The function to be executed.
|
|
|
|
* @data: Data to pass to the function.
|
|
|
|
*
|
|
|
|
* Schedules the function @func for execution on the vCPU @cpu.
|
|
|
|
*/
|
2016-10-31 12:36:08 +03:00
|
|
|
void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
|
2012-05-03 16:58:47 +04:00
|
|
|
|
2013-06-24 13:49:41 +04:00
|
|
|
/**
|
|
|
|
* async_run_on_cpu:
|
|
|
|
* @cpu: The vCPU to run on.
|
|
|
|
* @func: The function to be executed.
|
|
|
|
* @data: Data to pass to the function.
|
|
|
|
*
|
|
|
|
* Schedules the function @func for execution on the vCPU @cpu asynchronously.
|
|
|
|
*/
|
2016-10-31 12:36:08 +03:00
|
|
|
void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
|
2013-06-24 13:49:41 +04:00
|
|
|
|
2016-08-28 06:38:24 +03:00
|
|
|
/**
|
|
|
|
* async_safe_run_on_cpu:
|
|
|
|
* @cpu: The vCPU to run on.
|
|
|
|
* @func: The function to be executed.
|
|
|
|
* @data: Data to pass to the function.
|
|
|
|
*
|
|
|
|
* Schedules the function @func for execution on the vCPU @cpu asynchronously,
|
|
|
|
* while all other vCPUs are sleeping.
|
|
|
|
*
|
|
|
|
* Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
|
|
|
|
* BQL.
|
|
|
|
*/
|
2016-10-31 12:36:08 +03:00
|
|
|
void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
|
2016-08-28 06:38:24 +03:00
|
|
|
|
2018-11-27 01:14:43 +03:00
|
|
|
/**
|
|
|
|
* cpu_in_exclusive_context()
|
|
|
|
* @cpu: The vCPU to check
|
|
|
|
*
|
|
|
|
* Returns true if @cpu is an exclusive context, for example running
|
|
|
|
* something which has previously been queued via async_safe_run_on_cpu().
|
|
|
|
*/
|
|
|
|
static inline bool cpu_in_exclusive_context(const CPUState *cpu)
|
|
|
|
{
|
|
|
|
return cpu->in_exclusive_context;
|
|
|
|
}
|
|
|
|
|
2012-12-17 22:47:15 +04:00
|
|
|
/**
|
|
|
|
* qemu_get_cpu:
|
|
|
|
* @index: The CPUState@cpu_index value of the CPU to obtain.
|
|
|
|
*
|
|
|
|
* Gets a CPU matching @index.
|
|
|
|
*
|
|
|
|
* Returns: The CPU or %NULL if there is no matching CPU.
|
|
|
|
*/
|
|
|
|
CPUState *qemu_get_cpu(int index);
|
|
|
|
|
2013-04-25 18:05:24 +04:00
|
|
|
/**
|
|
|
|
* cpu_exists:
|
|
|
|
* @id: Guest-exposed CPU ID to lookup.
|
|
|
|
*
|
|
|
|
* Search for CPU with specified ID.
|
|
|
|
*
|
|
|
|
* Returns: %true - CPU is found, %false - CPU isn't found.
|
|
|
|
*/
|
|
|
|
bool cpu_exists(int64_t id);
|
|
|
|
|
2017-07-26 21:44:35 +03:00
|
|
|
/**
|
|
|
|
* cpu_by_arch_id:
|
|
|
|
* @id: Guest-exposed CPU ID of the CPU to obtain.
|
|
|
|
*
|
|
|
|
* Get a CPU with matching @id.
|
|
|
|
*
|
|
|
|
* Returns: The CPU or %NULL if there is no matching CPU.
|
|
|
|
*/
|
|
|
|
CPUState *cpu_by_arch_id(int64_t id);
|
|
|
|
|
2013-01-18 18:03:43 +04:00
|
|
|
/**
|
|
|
|
* cpu_interrupt:
|
|
|
|
* @cpu: The CPU to set an interrupt on.
|
2018-09-05 15:29:08 +03:00
|
|
|
* @mask: The interrupts to set.
|
2013-01-18 18:03:43 +04:00
|
|
|
*
|
|
|
|
* Invokes the interrupt handler.
|
|
|
|
*/
|
|
|
|
|
|
|
|
void cpu_interrupt(CPUState *cpu, int mask);
|
|
|
|
|
2015-06-24 06:19:20 +03:00
|
|
|
/**
|
|
|
|
* cpu_set_pc:
|
|
|
|
* @cpu: The CPU to set the program counter for.
|
|
|
|
* @addr: Program counter value.
|
|
|
|
*
|
|
|
|
* Sets the program counter for a CPU.
|
|
|
|
*/
|
|
|
|
static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
|
|
|
|
{
|
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
|
|
|
|
|
|
|
cc->set_pc(cpu, addr);
|
|
|
|
}
|
|
|
|
|
2013-01-18 01:30:20 +04:00
|
|
|
/**
|
|
|
|
* cpu_reset_interrupt:
|
|
|
|
* @cpu: The CPU to clear the interrupt on.
|
|
|
|
* @mask: The interrupt mask to clear.
|
|
|
|
*
|
|
|
|
* Resets interrupts on the vCPU @cpu.
|
|
|
|
*/
|
|
|
|
void cpu_reset_interrupt(CPUState *cpu, int mask);
|
|
|
|
|
2013-05-17 20:26:54 +04:00
|
|
|
/**
|
|
|
|
* cpu_exit:
|
|
|
|
* @cpu: The CPU to exit.
|
|
|
|
*
|
|
|
|
* Requests the CPU @cpu to exit execution.
|
|
|
|
*/
|
|
|
|
void cpu_exit(CPUState *cpu);
|
|
|
|
|
2013-04-23 12:29:37 +04:00
|
|
|
/**
|
|
|
|
* cpu_resume:
|
|
|
|
* @cpu: The CPU to resume.
|
|
|
|
*
|
|
|
|
* Resumes CPU, i.e. puts CPU into runnable state.
|
|
|
|
*/
|
|
|
|
void cpu_resume(CPUState *cpu);
|
2012-01-28 19:39:52 +04:00
|
|
|
|
2016-05-12 06:48:13 +03:00
|
|
|
/**
|
2016-05-12 06:48:14 +03:00
|
|
|
* cpu_remove_sync:
|
|
|
|
* @cpu: The CPU to remove.
|
|
|
|
*
|
|
|
|
* Requests the CPU to be removed and waits till it is removed.
|
|
|
|
*/
|
|
|
|
void cpu_remove_sync(CPUState *cpu);
|
|
|
|
|
2016-08-29 10:51:00 +03:00
|
|
|
/**
|
|
|
|
* process_queued_cpu_work() - process all items on CPU work queue
|
|
|
|
* @cpu: The CPU which work queue to process.
|
|
|
|
*/
|
|
|
|
void process_queued_cpu_work(CPUState *cpu);
|
|
|
|
|
2016-08-31 17:56:04 +03:00
|
|
|
/**
|
|
|
|
* cpu_exec_start:
|
|
|
|
* @cpu: The CPU for the current thread.
|
|
|
|
*
|
|
|
|
* Record that a CPU has started execution and can be interrupted with
|
|
|
|
* cpu_exit.
|
|
|
|
*/
|
|
|
|
void cpu_exec_start(CPUState *cpu);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_exec_end:
|
|
|
|
* @cpu: The CPU for the current thread.
|
|
|
|
*
|
|
|
|
* Record that a CPU has stopped execution and exclusive sections
|
|
|
|
* can be executed without interrupting it.
|
|
|
|
*/
|
|
|
|
void cpu_exec_end(CPUState *cpu);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* start_exclusive:
|
|
|
|
*
|
|
|
|
* Wait for a concurrent exclusive section to end, and then start
|
|
|
|
* a section of work that is run while other CPUs are not running
|
|
|
|
* between cpu_exec_start and cpu_exec_end. CPUs that are running
|
|
|
|
* cpu_exec are exited immediately. CPUs that call cpu_exec_start
|
|
|
|
* during the exclusive section go to sleep until this CPU calls
|
|
|
|
* end_exclusive.
|
|
|
|
*/
|
|
|
|
void start_exclusive(void);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* end_exclusive:
|
|
|
|
*
|
|
|
|
* Concludes an exclusive execution section started by start_exclusive.
|
|
|
|
*/
|
|
|
|
void end_exclusive(void);
|
|
|
|
|
2013-05-27 05:23:24 +04:00
|
|
|
/**
|
|
|
|
* qemu_init_vcpu:
|
|
|
|
* @cpu: The vCPU to initialize.
|
|
|
|
*
|
|
|
|
* Initializes a vCPU.
|
|
|
|
*/
|
|
|
|
void qemu_init_vcpu(CPUState *cpu);
|
|
|
|
|
2013-06-24 20:41:06 +04:00
|
|
|
#define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
|
|
|
|
#define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
|
|
|
|
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_single_step:
|
|
|
|
* @cpu: CPU to the flags for.
|
|
|
|
* @enabled: Flags to enable.
|
|
|
|
*
|
|
|
|
* Enables or disables single-stepping for @cpu.
|
|
|
|
*/
|
|
|
|
void cpu_single_step(CPUState *cpu, int enabled);
|
|
|
|
|
2013-09-02 19:26:20 +04:00
|
|
|
/* Breakpoint/watchpoint flags */
|
|
|
|
#define BP_MEM_READ 0x01
|
|
|
|
#define BP_MEM_WRITE 0x02
|
|
|
|
#define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
|
|
|
|
#define BP_STOP_BEFORE_ACCESS 0x04
|
2014-09-12 17:06:48 +04:00
|
|
|
/* 0x08 currently unused */
|
2013-09-02 19:26:20 +04:00
|
|
|
#define BP_GDB 0x10
|
|
|
|
#define BP_CPU 0x20
|
2015-09-18 01:58:10 +03:00
|
|
|
#define BP_ANY (BP_GDB | BP_CPU)
|
2014-09-12 17:06:48 +04:00
|
|
|
#define BP_WATCHPOINT_HIT_READ 0x40
|
|
|
|
#define BP_WATCHPOINT_HIT_WRITE 0x80
|
|
|
|
#define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
|
2013-09-02 19:26:20 +04:00
|
|
|
|
|
|
|
int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
|
|
|
|
CPUBreakpoint **breakpoint);
|
|
|
|
int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
|
|
|
|
void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
|
|
|
|
void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
|
|
|
|
|
2015-09-18 01:58:10 +03:00
|
|
|
/* Return true if PC matches an installed breakpoint. */
|
|
|
|
static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
|
|
|
|
{
|
|
|
|
CPUBreakpoint *bp;
|
|
|
|
|
|
|
|
if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
|
|
|
|
QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
|
|
|
|
if (bp->pc == pc && (bp->flags & mask)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2019-08-24 23:31:58 +03:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
|
|
|
|
int flags, CPUWatchpoint **watchpoint)
|
|
|
|
{
|
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
|
|
|
|
vaddr len, int flags)
|
|
|
|
{
|
|
|
|
return -ENOSYS;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
|
|
|
|
CPUWatchpoint *wp)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
|
|
|
|
{
|
|
|
|
}
|
2019-08-23 13:07:40 +03:00
|
|
|
|
|
|
|
static inline void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
|
|
|
|
MemTxAttrs atr, int fl, uintptr_t ra)
|
|
|
|
{
|
|
|
|
}
|
2019-08-24 18:21:34 +03:00
|
|
|
|
|
|
|
static inline int cpu_watchpoint_address_matches(CPUState *cpu,
|
|
|
|
vaddr addr, vaddr len)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2019-08-24 23:31:58 +03:00
|
|
|
#else
|
2013-09-02 18:57:02 +04:00
|
|
|
int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
|
|
|
|
int flags, CPUWatchpoint **watchpoint);
|
|
|
|
int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
|
|
|
|
vaddr len, int flags);
|
|
|
|
void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
|
|
|
|
void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
|
2020-05-08 18:43:41 +03:00
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_check_watchpoint:
|
|
|
|
* @cpu: cpu context
|
|
|
|
* @addr: guest virtual address
|
|
|
|
* @len: access length
|
|
|
|
* @attrs: memory access attributes
|
|
|
|
* @flags: watchpoint access type
|
|
|
|
* @ra: unwind return address
|
|
|
|
*
|
|
|
|
* Check for a watchpoint hit in [addr, addr+len) of the type
|
|
|
|
* specified by @flags. Exit via exception with a hit.
|
|
|
|
*/
|
2019-08-23 13:07:40 +03:00
|
|
|
void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
|
|
|
|
MemTxAttrs attrs, int flags, uintptr_t ra);
|
2020-05-08 18:43:41 +03:00
|
|
|
|
|
|
|
/**
|
|
|
|
* cpu_watchpoint_address_matches:
|
|
|
|
* @cpu: cpu context
|
|
|
|
* @addr: guest virtual address
|
|
|
|
* @len: access length
|
|
|
|
*
|
|
|
|
* Return the watchpoint flags that apply to [addr, addr+len).
|
|
|
|
* If no watchpoint is registered for the range, the result is 0.
|
|
|
|
*/
|
2019-08-24 18:21:34 +03:00
|
|
|
int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len);
|
2019-08-24 23:31:58 +03:00
|
|
|
#endif
|
2013-09-02 18:57:02 +04:00
|
|
|
|
2016-03-15 15:18:37 +03:00
|
|
|
/**
|
|
|
|
* cpu_get_address_space:
|
|
|
|
* @cpu: CPU to get address space from
|
|
|
|
* @asidx: index identifying which address space to get
|
|
|
|
*
|
|
|
|
* Return the requested address space of this CPU. @asidx
|
|
|
|
* specifies which address space to read.
|
|
|
|
*/
|
|
|
|
AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
|
|
|
|
|
2022-04-20 16:26:02 +03:00
|
|
|
G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
|
2022-02-20 19:39:25 +03:00
|
|
|
G_GNUC_PRINTF(2, 3);
|
2021-02-04 19:39:11 +03:00
|
|
|
|
|
|
|
/* $(top_srcdir)/cpu.c */
|
2021-08-22 10:25:28 +03:00
|
|
|
void cpu_class_init_props(DeviceClass *dc);
|
2016-10-20 14:26:02 +03:00
|
|
|
void cpu_exec_initfn(CPUState *cpu);
|
2016-10-20 14:26:03 +03:00
|
|
|
void cpu_exec_realizefn(CPUState *cpu, Error **errp);
|
2016-10-20 14:26:04 +03:00
|
|
|
void cpu_exec_unrealizefn(CPUState *cpu);
|
2013-09-03 19:38:47 +04:00
|
|
|
|
2018-10-05 15:46:02 +03:00
|
|
|
/**
|
|
|
|
* target_words_bigendian:
|
|
|
|
* Returns true if the (default) endianness of the target is big endian,
|
|
|
|
* false otherwise. Note that in target-specific code, you can use
|
2022-03-23 18:57:18 +03:00
|
|
|
* TARGET_BIG_ENDIAN directly instead. On the other hand, common
|
2018-10-05 15:46:02 +03:00
|
|
|
* code should normally never need to know about the endianness of the
|
|
|
|
* target, so please do *not* use this function unless you know very well
|
|
|
|
* what you are doing!
|
|
|
|
*/
|
|
|
|
bool target_words_bigendian(void);
|
|
|
|
|
2022-03-23 18:57:38 +03:00
|
|
|
void page_size_init(void);
|
|
|
|
|
2017-06-26 08:22:56 +03:00
|
|
|
#ifdef NEED_CPU_H
|
|
|
|
|
2013-06-17 06:09:11 +04:00
|
|
|
#ifdef CONFIG_SOFTMMU
|
2021-05-17 13:51:32 +03:00
|
|
|
|
2019-08-12 08:23:44 +03:00
|
|
|
extern const VMStateDescription vmstate_cpu_common;
|
2013-06-17 06:09:11 +04:00
|
|
|
|
|
|
|
#define VMSTATE_CPU() { \
|
|
|
|
.name = "parent_obj", \
|
|
|
|
.size = sizeof(CPUState), \
|
|
|
|
.vmsd = &vmstate_cpu_common, \
|
|
|
|
.flags = VMS_STRUCT, \
|
|
|
|
.offset = 0, \
|
|
|
|
}
|
2021-05-17 13:51:32 +03:00
|
|
|
#endif /* CONFIG_SOFTMMU */
|
2013-06-17 06:09:11 +04:00
|
|
|
|
2017-06-26 08:22:56 +03:00
|
|
|
#endif /* NEED_CPU_H */
|
|
|
|
|
2016-07-25 12:59:21 +03:00
|
|
|
#define UNASSIGNED_CPU_INDEX -1
|
2019-01-29 14:46:05 +03:00
|
|
|
#define UNASSIGNED_CLUSTER_INDEX -1
|
2016-07-25 12:59:21 +03:00
|
|
|
|
2012-01-28 19:39:52 +04:00
|
|
|
#endif
|