2014-09-10 16:12:28 +04:00
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/*
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* Virtio GPU Device
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*
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* Copyright Red Hat, Inc. 2013-2014
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*
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* Authors:
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* Dave Airlie <airlied@redhat.com>
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* Gerd Hoffmann <kraxel@redhat.com>
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*
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2015-09-16 10:15:15 +03:00
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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2014-09-10 16:12:28 +04:00
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* See the COPYING file in the top-level directory.
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*/
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2016-01-26 21:17:07 +03:00
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#include "qemu/osdep.h"
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2014-09-10 16:12:28 +04:00
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#include "qemu-common.h"
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#include "qemu/iov.h"
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#include "ui/console.h"
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#include "trace.h"
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#include "hw/virtio/virtio.h"
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#include "hw/virtio/virtio-gpu.h"
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#include "hw/virtio/virtio-bus.h"
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2017-04-06 13:00:28 +03:00
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#include "migration/blocker.h"
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2015-12-15 15:16:16 +03:00
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#include "qemu/log.h"
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2016-05-19 13:25:57 +03:00
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#include "qapi/error.h"
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2014-09-10 16:12:28 +04:00
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2016-05-23 16:22:07 +03:00
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#define VIRTIO_GPU_VM_VERSION 1
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2014-09-10 16:12:28 +04:00
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static struct virtio_gpu_simple_resource*
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virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
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2016-11-29 05:29:25 +03:00
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static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res);
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2014-07-11 14:51:43 +04:00
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#ifdef CONFIG_VIRGL
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2016-06-22 20:11:19 +03:00
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#include <virglrenderer.h>
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2014-07-11 14:51:43 +04:00
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#define VIRGL(_g, _virgl, _simple, ...) \
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do { \
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if (_g->use_virgl_renderer) { \
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_virgl(__VA_ARGS__); \
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} else { \
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_simple(__VA_ARGS__); \
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} \
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} while (0)
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#else
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#define VIRGL(_g, _virgl, _simple, ...) \
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do { \
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_simple(__VA_ARGS__); \
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} while (0)
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#endif
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2014-09-10 16:12:28 +04:00
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static void update_cursor_data_simple(VirtIOGPU *g,
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struct virtio_gpu_scanout *s,
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uint32_t resource_id)
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{
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struct virtio_gpu_simple_resource *res;
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uint32_t pixels;
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res = virtio_gpu_find_resource(g, resource_id);
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if (!res) {
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return;
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}
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if (pixman_image_get_width(res->image) != s->current_cursor->width ||
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pixman_image_get_height(res->image) != s->current_cursor->height) {
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return;
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}
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pixels = s->current_cursor->width * s->current_cursor->height;
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memcpy(s->current_cursor->data,
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pixman_image_get_data(res->image),
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pixels * sizeof(uint32_t));
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}
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2014-07-11 14:51:43 +04:00
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#ifdef CONFIG_VIRGL
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static void update_cursor_data_virgl(VirtIOGPU *g,
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struct virtio_gpu_scanout *s,
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uint32_t resource_id)
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{
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uint32_t width, height;
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uint32_t pixels, *data;
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data = virgl_renderer_get_cursor_data(resource_id, &width, &height);
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if (!data) {
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return;
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}
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if (width != s->current_cursor->width ||
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height != s->current_cursor->height) {
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2016-11-01 14:06:58 +03:00
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free(data);
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2014-07-11 14:51:43 +04:00
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return;
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}
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pixels = s->current_cursor->width * s->current_cursor->height;
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memcpy(s->current_cursor->data, data, pixels * sizeof(uint32_t));
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free(data);
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}
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#endif
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2014-09-10 16:12:28 +04:00
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static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor)
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{
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struct virtio_gpu_scanout *s;
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2016-05-23 16:22:07 +03:00
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bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR;
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2014-09-10 16:12:28 +04:00
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if (cursor->pos.scanout_id >= g->conf.max_outputs) {
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return;
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}
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s = &g->scanout[cursor->pos.scanout_id];
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2015-10-02 09:30:27 +03:00
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trace_virtio_gpu_update_cursor(cursor->pos.scanout_id,
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cursor->pos.x,
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cursor->pos.y,
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move ? "move" : "update",
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cursor->resource_id);
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2016-05-23 16:22:07 +03:00
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if (!move) {
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2014-09-10 16:12:28 +04:00
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if (!s->current_cursor) {
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s->current_cursor = cursor_alloc(64, 64);
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}
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s->current_cursor->hot_x = cursor->hot_x;
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s->current_cursor->hot_y = cursor->hot_y;
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if (cursor->resource_id > 0) {
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2014-07-11 14:51:43 +04:00
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VIRGL(g, update_cursor_data_virgl, update_cursor_data_simple,
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g, s, cursor->resource_id);
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2014-09-10 16:12:28 +04:00
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}
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dpy_cursor_define(s->con, s->current_cursor);
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2016-05-23 16:22:07 +03:00
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s->cursor = *cursor;
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} else {
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s->cursor.pos.x = cursor->pos.x;
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s->cursor.pos.y = cursor->pos.y;
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2014-09-10 16:12:28 +04:00
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}
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dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y,
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cursor->resource_id ? 1 : 0);
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}
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static void virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config)
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{
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VirtIOGPU *g = VIRTIO_GPU(vdev);
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memcpy(config, &g->virtio_config, sizeof(g->virtio_config));
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}
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static void virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config)
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{
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VirtIOGPU *g = VIRTIO_GPU(vdev);
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struct virtio_gpu_config vgconfig;
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memcpy(&vgconfig, config, sizeof(g->virtio_config));
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if (vgconfig.events_clear) {
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g->virtio_config.events_read &= ~vgconfig.events_clear;
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}
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}
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2015-07-27 12:49:19 +03:00
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static uint64_t virtio_gpu_get_features(VirtIODevice *vdev, uint64_t features,
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Error **errp)
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2014-09-10 16:12:28 +04:00
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{
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2014-07-11 14:51:43 +04:00
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VirtIOGPU *g = VIRTIO_GPU(vdev);
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if (virtio_gpu_virgl_enabled(g->conf)) {
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2015-12-15 17:00:27 +03:00
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features |= (1 << VIRTIO_GPU_F_VIRGL);
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2014-07-11 14:51:43 +04:00
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}
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2014-09-10 16:12:28 +04:00
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return features;
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}
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2014-07-11 14:51:43 +04:00
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static void virtio_gpu_set_features(VirtIODevice *vdev, uint64_t features)
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{
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2015-12-15 17:00:27 +03:00
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static const uint32_t virgl = (1 << VIRTIO_GPU_F_VIRGL);
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2014-07-11 14:51:43 +04:00
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VirtIOGPU *g = VIRTIO_GPU(vdev);
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g->use_virgl_renderer = ((features & virgl) == virgl);
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trace_virtio_gpu_features(g->use_virgl_renderer);
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}
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2014-09-10 16:12:28 +04:00
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static void virtio_gpu_notify_event(VirtIOGPU *g, uint32_t event_type)
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{
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g->virtio_config.events_read |= event_type;
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virtio_notify_config(&g->parent_obj);
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}
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static struct virtio_gpu_simple_resource *
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virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id)
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{
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struct virtio_gpu_simple_resource *res;
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QTAILQ_FOREACH(res, &g->reslist, next) {
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if (res->resource_id == resource_id) {
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return res;
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}
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}
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return NULL;
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}
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void virtio_gpu_ctrl_response(VirtIOGPU *g,
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struct virtio_gpu_ctrl_command *cmd,
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struct virtio_gpu_ctrl_hdr *resp,
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size_t resp_len)
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{
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size_t s;
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if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) {
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resp->flags |= VIRTIO_GPU_FLAG_FENCE;
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resp->fence_id = cmd->cmd_hdr.fence_id;
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resp->ctx_id = cmd->cmd_hdr.ctx_id;
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}
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s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);
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if (s != resp_len) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: response size incorrect %zu vs %zu\n",
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__func__, s, resp_len);
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}
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virtqueue_push(cmd->vq, &cmd->elem, s);
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virtio_notify(VIRTIO_DEVICE(g), cmd->vq);
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cmd->finished = true;
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}
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void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
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struct virtio_gpu_ctrl_command *cmd,
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enum virtio_gpu_ctrl_type type)
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{
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struct virtio_gpu_ctrl_hdr resp;
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memset(&resp, 0, sizeof(resp));
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resp.type = type;
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virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp));
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}
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static void
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virtio_gpu_fill_display_info(VirtIOGPU *g,
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struct virtio_gpu_resp_display_info *dpy_info)
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{
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int i;
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for (i = 0; i < g->conf.max_outputs; i++) {
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if (g->enabled_output_bitmask & (1 << i)) {
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dpy_info->pmodes[i].enabled = 1;
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dpy_info->pmodes[i].r.width = g->req_state[i].width;
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dpy_info->pmodes[i].r.height = g->req_state[i].height;
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}
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}
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}
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void virtio_gpu_get_display_info(VirtIOGPU *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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struct virtio_gpu_resp_display_info display_info;
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trace_virtio_gpu_cmd_get_display_info();
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memset(&display_info, 0, sizeof(display_info));
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display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO;
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virtio_gpu_fill_display_info(g, &display_info);
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virtio_gpu_ctrl_response(g, cmd, &display_info.hdr,
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sizeof(display_info));
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}
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static pixman_format_code_t get_pixman_format(uint32_t virtio_gpu_format)
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{
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switch (virtio_gpu_format) {
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case VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_b8g8r8x8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_b8g8r8a8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_x8r8g8b8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_a8r8g8b8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_r8g8b8x8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_r8g8b8a8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_x8b8g8r8;
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2014-09-10 16:12:28 +04:00
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case VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM:
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2017-04-03 14:40:44 +03:00
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return PIXMAN_BE_a8b8g8r8;
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2014-09-10 16:12:28 +04:00
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default:
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return 0;
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}
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}
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static void virtio_gpu_resource_create_2d(VirtIOGPU *g,
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struct virtio_gpu_ctrl_command *cmd)
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{
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pixman_format_code_t pformat;
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struct virtio_gpu_simple_resource *res;
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struct virtio_gpu_resource_create_2d c2d;
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VIRTIO_GPU_FILL_CMD(c2d);
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trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format,
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c2d.width, c2d.height);
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if (c2d.resource_id == 0) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
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__func__);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
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return;
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}
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res = virtio_gpu_find_resource(g, c2d.resource_id);
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if (res) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
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__func__, c2d.resource_id);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
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return;
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}
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res = g_new0(struct virtio_gpu_simple_resource, 1);
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res->width = c2d.width;
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res->height = c2d.height;
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res->format = c2d.format;
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res->resource_id = c2d.resource_id;
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pformat = get_pixman_format(c2d.format);
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if (!pformat) {
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qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"%s: host couldn't handle guest format %d\n",
|
|
|
|
__func__, c2d.format);
|
2016-09-19 05:07:11 +03:00
|
|
|
g_free(res);
|
2014-09-10 16:12:28 +04:00
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
|
|
|
|
return;
|
|
|
|
}
|
2016-11-29 15:42:36 +03:00
|
|
|
|
|
|
|
res->hostmem = PIXMAN_FORMAT_BPP(pformat) * c2d.width * c2d.height;
|
|
|
|
if (res->hostmem + g->hostmem < g->conf.max_hostmem) {
|
|
|
|
res->image = pixman_image_create_bits(pformat,
|
|
|
|
c2d.width,
|
|
|
|
c2d.height,
|
|
|
|
NULL, 0);
|
|
|
|
}
|
2014-09-10 16:12:28 +04:00
|
|
|
|
|
|
|
if (!res->image) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"%s: resource creation failed %d %d %d\n",
|
|
|
|
__func__, c2d.resource_id, c2d.width, c2d.height);
|
|
|
|
g_free(res);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
QTAILQ_INSERT_HEAD(&g->reslist, res, next);
|
2016-11-29 15:42:36 +03:00
|
|
|
g->hostmem += res->hostmem;
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_resource_destroy(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_simple_resource *res)
|
|
|
|
{
|
|
|
|
pixman_image_unref(res->image);
|
2016-11-29 05:29:25 +03:00
|
|
|
virtio_gpu_cleanup_mapping(res);
|
2014-09-10 16:12:28 +04:00
|
|
|
QTAILQ_REMOVE(&g->reslist, res, next);
|
2016-11-29 15:42:36 +03:00
|
|
|
g->hostmem -= res->hostmem;
|
2014-09-10 16:12:28 +04:00
|
|
|
g_free(res);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_resource_unref(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
struct virtio_gpu_resource_unref unref;
|
|
|
|
|
|
|
|
VIRTIO_GPU_FILL_CMD(unref);
|
|
|
|
trace_virtio_gpu_cmd_res_unref(unref.resource_id);
|
|
|
|
|
|
|
|
res = virtio_gpu_find_resource(g, unref.resource_id);
|
|
|
|
if (!res) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
|
|
|
|
__func__, unref.resource_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
virtio_gpu_resource_destroy(g, res);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
int h;
|
|
|
|
uint32_t src_offset, dst_offset, stride;
|
|
|
|
int bpp;
|
|
|
|
pixman_format_code_t format;
|
|
|
|
struct virtio_gpu_transfer_to_host_2d t2d;
|
|
|
|
|
|
|
|
VIRTIO_GPU_FILL_CMD(t2d);
|
|
|
|
trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id);
|
|
|
|
|
|
|
|
res = virtio_gpu_find_resource(g, t2d.resource_id);
|
|
|
|
if (!res || !res->iov) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
|
|
|
|
__func__, t2d.resource_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (t2d.r.x > res->width ||
|
|
|
|
t2d.r.y > res->height ||
|
|
|
|
t2d.r.width > res->width ||
|
|
|
|
t2d.r.height > res->height ||
|
|
|
|
t2d.r.x + t2d.r.width > res->width ||
|
|
|
|
t2d.r.y + t2d.r.height > res->height) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource"
|
|
|
|
" bounds for resource %d: %d %d %d %d vs %d %d\n",
|
|
|
|
__func__, t2d.resource_id, t2d.r.x, t2d.r.y,
|
|
|
|
t2d.r.width, t2d.r.height, res->width, res->height);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
format = pixman_image_get_format(res->image);
|
|
|
|
bpp = (PIXMAN_FORMAT_BPP(format) + 7) / 8;
|
|
|
|
stride = pixman_image_get_stride(res->image);
|
|
|
|
|
|
|
|
if (t2d.offset || t2d.r.x || t2d.r.y ||
|
|
|
|
t2d.r.width != pixman_image_get_width(res->image)) {
|
|
|
|
void *img_data = pixman_image_get_data(res->image);
|
|
|
|
for (h = 0; h < t2d.r.height; h++) {
|
|
|
|
src_offset = t2d.offset + stride * h;
|
|
|
|
dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp);
|
|
|
|
|
|
|
|
iov_to_buf(res->iov, res->iov_cnt, src_offset,
|
|
|
|
(uint8_t *)img_data
|
|
|
|
+ dst_offset, t2d.r.width * bpp);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
iov_to_buf(res->iov, res->iov_cnt, 0,
|
|
|
|
pixman_image_get_data(res->image),
|
|
|
|
pixman_image_get_stride(res->image)
|
|
|
|
* pixman_image_get_height(res->image));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_resource_flush(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
struct virtio_gpu_resource_flush rf;
|
|
|
|
pixman_region16_t flush_region;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
VIRTIO_GPU_FILL_CMD(rf);
|
|
|
|
trace_virtio_gpu_cmd_res_flush(rf.resource_id,
|
|
|
|
rf.r.width, rf.r.height, rf.r.x, rf.r.y);
|
|
|
|
|
|
|
|
res = virtio_gpu_find_resource(g, rf.resource_id);
|
|
|
|
if (!res) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
|
|
|
|
__func__, rf.resource_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rf.r.x > res->width ||
|
|
|
|
rf.r.y > res->height ||
|
|
|
|
rf.r.width > res->width ||
|
|
|
|
rf.r.height > res->height ||
|
|
|
|
rf.r.x + rf.r.width > res->width ||
|
|
|
|
rf.r.y + rf.r.height > res->height) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource"
|
|
|
|
" bounds for resource %d: %d %d %d %d vs %d %d\n",
|
|
|
|
__func__, rf.resource_id, rf.r.x, rf.r.y,
|
|
|
|
rf.r.width, rf.r.height, res->width, res->height);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pixman_region_init_rect(&flush_region,
|
|
|
|
rf.r.x, rf.r.y, rf.r.width, rf.r.height);
|
2016-05-19 13:25:58 +03:00
|
|
|
for (i = 0; i < g->conf.max_outputs; i++) {
|
2014-09-10 16:12:28 +04:00
|
|
|
struct virtio_gpu_scanout *scanout;
|
|
|
|
pixman_region16_t region, finalregion;
|
|
|
|
pixman_box16_t *extents;
|
|
|
|
|
|
|
|
if (!(res->scanout_bitmask & (1 << i))) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
scanout = &g->scanout[i];
|
|
|
|
|
|
|
|
pixman_region_init(&finalregion);
|
|
|
|
pixman_region_init_rect(®ion, scanout->x, scanout->y,
|
|
|
|
scanout->width, scanout->height);
|
|
|
|
|
|
|
|
pixman_region_intersect(&finalregion, &flush_region, ®ion);
|
|
|
|
pixman_region_translate(&finalregion, -scanout->x, -scanout->y);
|
|
|
|
extents = pixman_region_extents(&finalregion);
|
|
|
|
/* work out the area we need to update for each console */
|
|
|
|
dpy_gfx_update(g->scanout[i].con,
|
|
|
|
extents->x1, extents->y1,
|
|
|
|
extents->x2 - extents->x1,
|
|
|
|
extents->y2 - extents->y1);
|
|
|
|
|
|
|
|
pixman_region_fini(®ion);
|
|
|
|
pixman_region_fini(&finalregion);
|
|
|
|
}
|
|
|
|
pixman_region_fini(&flush_region);
|
|
|
|
}
|
|
|
|
|
2016-05-30 11:40:55 +03:00
|
|
|
static void virtio_unref_resource(pixman_image_t *image, void *data)
|
|
|
|
{
|
|
|
|
pixman_image_unref(data);
|
|
|
|
}
|
|
|
|
|
2014-09-10 16:12:28 +04:00
|
|
|
static void virtio_gpu_set_scanout(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
struct virtio_gpu_scanout *scanout;
|
|
|
|
pixman_format_code_t format;
|
|
|
|
uint32_t offset;
|
|
|
|
int bpp;
|
|
|
|
struct virtio_gpu_set_scanout ss;
|
|
|
|
|
|
|
|
VIRTIO_GPU_FILL_CMD(ss);
|
|
|
|
trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
|
|
|
|
ss.r.width, ss.r.height, ss.r.x, ss.r.y);
|
|
|
|
|
2016-05-19 13:25:58 +03:00
|
|
|
if (ss.scanout_id >= g->conf.max_outputs) {
|
2016-05-19 13:25:55 +03:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
|
|
|
|
__func__, ss.scanout_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2014-09-10 16:12:28 +04:00
|
|
|
g->enable = 1;
|
|
|
|
if (ss.resource_id == 0) {
|
|
|
|
scanout = &g->scanout[ss.scanout_id];
|
|
|
|
if (scanout->resource_id) {
|
|
|
|
res = virtio_gpu_find_resource(g, scanout->resource_id);
|
|
|
|
if (res) {
|
|
|
|
res->scanout_bitmask &= ~(1 << ss.scanout_id);
|
|
|
|
}
|
|
|
|
}
|
2016-05-19 13:25:55 +03:00
|
|
|
if (ss.scanout_id == 0) {
|
2014-09-10 16:12:28 +04:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"%s: illegal scanout id specified %d",
|
|
|
|
__func__, ss.scanout_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
dpy_gfx_replace_surface(g->scanout[ss.scanout_id].con, NULL);
|
|
|
|
scanout->ds = NULL;
|
|
|
|
scanout->width = 0;
|
|
|
|
scanout->height = 0;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* create a surface for this scanout */
|
|
|
|
res = virtio_gpu_find_resource(g, ss.resource_id);
|
|
|
|
if (!res) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
|
|
|
|
__func__, ss.resource_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ss.r.x > res->width ||
|
|
|
|
ss.r.y > res->height ||
|
|
|
|
ss.r.width > res->width ||
|
|
|
|
ss.r.height > res->height ||
|
|
|
|
ss.r.x + ss.r.width > res->width ||
|
|
|
|
ss.r.y + ss.r.height > res->height) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for"
|
|
|
|
" resource %d, (%d,%d)+%d,%d vs %d %d\n",
|
|
|
|
__func__, ss.scanout_id, ss.resource_id, ss.r.x, ss.r.y,
|
|
|
|
ss.r.width, ss.r.height, res->width, res->height);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
scanout = &g->scanout[ss.scanout_id];
|
|
|
|
|
|
|
|
format = pixman_image_get_format(res->image);
|
|
|
|
bpp = (PIXMAN_FORMAT_BPP(format) + 7) / 8;
|
|
|
|
offset = (ss.r.x * bpp) + ss.r.y * pixman_image_get_stride(res->image);
|
|
|
|
if (!scanout->ds || surface_data(scanout->ds)
|
|
|
|
!= ((uint8_t *)pixman_image_get_data(res->image) + offset) ||
|
|
|
|
scanout->width != ss.r.width ||
|
|
|
|
scanout->height != ss.r.height) {
|
2016-05-30 11:40:55 +03:00
|
|
|
pixman_image_t *rect;
|
|
|
|
void *ptr = (uint8_t *)pixman_image_get_data(res->image) + offset;
|
|
|
|
rect = pixman_image_create_bits(format, ss.r.width, ss.r.height, ptr,
|
|
|
|
pixman_image_get_stride(res->image));
|
|
|
|
pixman_image_ref(res->image);
|
|
|
|
pixman_image_set_destroy_function(rect, virtio_unref_resource,
|
|
|
|
res->image);
|
2014-09-10 16:12:28 +04:00
|
|
|
/* realloc the surface ptr */
|
2016-05-30 11:40:55 +03:00
|
|
|
scanout->ds = qemu_create_displaysurface_pixman(rect);
|
2014-09-10 16:12:28 +04:00
|
|
|
if (!scanout->ds) {
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
|
|
|
|
return;
|
|
|
|
}
|
2017-01-22 10:42:33 +03:00
|
|
|
pixman_image_unref(rect);
|
2014-09-10 16:12:28 +04:00
|
|
|
dpy_gfx_replace_surface(g->scanout[ss.scanout_id].con, scanout->ds);
|
|
|
|
}
|
|
|
|
|
|
|
|
res->scanout_bitmask |= (1 << ss.scanout_id);
|
|
|
|
scanout->resource_id = ss.resource_id;
|
|
|
|
scanout->x = ss.r.x;
|
|
|
|
scanout->y = ss.r.y;
|
|
|
|
scanout->width = ss.r.width;
|
|
|
|
scanout->height = ss.r.height;
|
|
|
|
}
|
|
|
|
|
|
|
|
int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd,
|
2016-05-23 16:22:07 +03:00
|
|
|
uint64_t **addr, struct iovec **iov)
|
2014-09-10 16:12:28 +04:00
|
|
|
{
|
|
|
|
struct virtio_gpu_mem_entry *ents;
|
|
|
|
size_t esize, s;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (ab->nr_entries > 16384) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
2015-03-17 10:56:18 +03:00
|
|
|
"%s: nr_entries is too big (%d > 16384)\n",
|
2014-09-10 16:12:28 +04:00
|
|
|
__func__, ab->nr_entries);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
esize = sizeof(*ents) * ab->nr_entries;
|
|
|
|
ents = g_malloc(esize);
|
|
|
|
s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
|
|
|
|
sizeof(*ab), ents, esize);
|
|
|
|
if (s != esize) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"%s: command data size incorrect %zu vs %zu\n",
|
|
|
|
__func__, s, esize);
|
|
|
|
g_free(ents);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
*iov = g_malloc0(sizeof(struct iovec) * ab->nr_entries);
|
2016-05-23 16:22:07 +03:00
|
|
|
if (addr) {
|
|
|
|
*addr = g_malloc0(sizeof(uint64_t) * ab->nr_entries);
|
|
|
|
}
|
2014-09-10 16:12:28 +04:00
|
|
|
for (i = 0; i < ab->nr_entries; i++) {
|
|
|
|
hwaddr len = ents[i].length;
|
|
|
|
(*iov)[i].iov_len = ents[i].length;
|
|
|
|
(*iov)[i].iov_base = cpu_physical_memory_map(ents[i].addr, &len, 1);
|
2016-05-23 16:22:07 +03:00
|
|
|
if (addr) {
|
|
|
|
(*addr)[i] = ents[i].addr;
|
|
|
|
}
|
2014-09-10 16:12:28 +04:00
|
|
|
if (!(*iov)[i].iov_base || len != ents[i].length) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
|
|
|
|
" resource %d element %d\n",
|
|
|
|
__func__, ab->resource_id, i);
|
|
|
|
virtio_gpu_cleanup_mapping_iov(*iov, i);
|
|
|
|
g_free(ents);
|
|
|
|
*iov = NULL;
|
2016-05-23 16:22:07 +03:00
|
|
|
if (addr) {
|
|
|
|
g_free(*addr);
|
|
|
|
*addr = NULL;
|
|
|
|
}
|
2014-09-10 16:12:28 +04:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
g_free(ents);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
cpu_physical_memory_unmap(iov[i].iov_base, iov[i].iov_len, 1,
|
|
|
|
iov[i].iov_len);
|
|
|
|
}
|
2015-09-15 10:23:14 +03:00
|
|
|
g_free(iov);
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res)
|
|
|
|
{
|
|
|
|
virtio_gpu_cleanup_mapping_iov(res->iov, res->iov_cnt);
|
|
|
|
res->iov = NULL;
|
|
|
|
res->iov_cnt = 0;
|
2016-05-23 16:22:07 +03:00
|
|
|
g_free(res->addrs);
|
|
|
|
res->addrs = NULL;
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
virtio_gpu_resource_attach_backing(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
struct virtio_gpu_resource_attach_backing ab;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
VIRTIO_GPU_FILL_CMD(ab);
|
|
|
|
trace_virtio_gpu_cmd_res_back_attach(ab.resource_id);
|
|
|
|
|
|
|
|
res = virtio_gpu_find_resource(g, ab.resource_id);
|
|
|
|
if (!res) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
|
|
|
|
__func__, ab.resource_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2016-12-29 12:28:41 +03:00
|
|
|
if (res->iov) {
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2016-05-23 16:22:07 +03:00
|
|
|
ret = virtio_gpu_create_mapping_iov(&ab, cmd, &res->addrs, &res->iov);
|
2014-09-10 16:12:28 +04:00
|
|
|
if (ret != 0) {
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
res->iov_cnt = ab.nr_entries;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
virtio_gpu_resource_detach_backing(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
struct virtio_gpu_resource_detach_backing detach;
|
|
|
|
|
|
|
|
VIRTIO_GPU_FILL_CMD(detach);
|
|
|
|
trace_virtio_gpu_cmd_res_back_detach(detach.resource_id);
|
|
|
|
|
|
|
|
res = virtio_gpu_find_resource(g, detach.resource_id);
|
|
|
|
if (!res || !res->iov) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
|
|
|
|
__func__, detach.resource_id);
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
virtio_gpu_cleanup_mapping(res);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_simple_process_cmd(VirtIOGPU *g,
|
|
|
|
struct virtio_gpu_ctrl_command *cmd)
|
|
|
|
{
|
|
|
|
VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
|
|
|
|
|
|
|
|
switch (cmd->cmd_hdr.type) {
|
|
|
|
case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
|
|
|
|
virtio_gpu_get_display_info(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
|
|
|
|
virtio_gpu_resource_create_2d(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_RESOURCE_UNREF:
|
|
|
|
virtio_gpu_resource_unref(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
|
|
|
|
virtio_gpu_resource_flush(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
|
|
|
|
virtio_gpu_transfer_to_host_2d(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_SET_SCANOUT:
|
|
|
|
virtio_gpu_set_scanout(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
|
|
|
|
virtio_gpu_resource_attach_backing(g, cmd);
|
|
|
|
break;
|
|
|
|
case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
|
|
|
|
virtio_gpu_resource_detach_backing(g, cmd);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (!cmd->finished) {
|
|
|
|
virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error :
|
|
|
|
VIRTIO_GPU_RESP_OK_NODATA);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(vdev);
|
|
|
|
qemu_bh_schedule(g->ctrl_bh);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(vdev);
|
|
|
|
qemu_bh_schedule(g->cursor_bh);
|
|
|
|
}
|
|
|
|
|
2015-12-01 15:18:38 +03:00
|
|
|
void virtio_gpu_process_cmdq(VirtIOGPU *g)
|
2015-12-01 14:05:14 +03:00
|
|
|
{
|
|
|
|
struct virtio_gpu_ctrl_command *cmd;
|
|
|
|
|
|
|
|
while (!QTAILQ_EMPTY(&g->cmdq)) {
|
|
|
|
cmd = QTAILQ_FIRST(&g->cmdq);
|
|
|
|
|
|
|
|
/* process command */
|
|
|
|
VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd,
|
|
|
|
g, cmd);
|
2015-12-01 15:18:38 +03:00
|
|
|
if (cmd->waiting) {
|
|
|
|
break;
|
|
|
|
}
|
2015-12-01 14:05:14 +03:00
|
|
|
QTAILQ_REMOVE(&g->cmdq, cmd, next);
|
|
|
|
if (virtio_gpu_stats_enabled(g->conf)) {
|
|
|
|
g->stats.requests++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!cmd->finished) {
|
|
|
|
QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next);
|
|
|
|
g->inflight++;
|
|
|
|
if (virtio_gpu_stats_enabled(g->conf)) {
|
|
|
|
if (g->stats.max_inflight < g->inflight) {
|
|
|
|
g->stats.max_inflight = g->inflight;
|
|
|
|
}
|
|
|
|
fprintf(stderr, "inflight: %3d (+)\r", g->inflight);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
g_free(cmd);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-09-10 16:12:28 +04:00
|
|
|
static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(vdev);
|
|
|
|
struct virtio_gpu_ctrl_command *cmd;
|
|
|
|
|
|
|
|
if (!virtio_queue_ready(vq)) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2014-07-11 14:51:43 +04:00
|
|
|
#ifdef CONFIG_VIRGL
|
|
|
|
if (!g->renderer_inited && g->use_virgl_renderer) {
|
|
|
|
virtio_gpu_virgl_init(g);
|
|
|
|
g->renderer_inited = true;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2016-02-04 17:26:51 +03:00
|
|
|
cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
|
|
|
|
while (cmd) {
|
2014-09-10 16:12:28 +04:00
|
|
|
cmd->vq = vq;
|
|
|
|
cmd->error = 0;
|
|
|
|
cmd->finished = false;
|
2015-12-01 14:05:14 +03:00
|
|
|
cmd->waiting = false;
|
|
|
|
QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next);
|
2016-02-04 17:26:51 +03:00
|
|
|
cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
2014-07-11 14:51:43 +04:00
|
|
|
|
2015-12-01 14:05:14 +03:00
|
|
|
virtio_gpu_process_cmdq(g);
|
|
|
|
|
2014-07-11 14:51:43 +04:00
|
|
|
#ifdef CONFIG_VIRGL
|
|
|
|
if (g->use_virgl_renderer) {
|
|
|
|
virtio_gpu_virgl_fence_poll(g);
|
|
|
|
}
|
|
|
|
#endif
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_ctrl_bh(void *opaque)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = opaque;
|
|
|
|
virtio_gpu_handle_ctrl(&g->parent_obj, g->ctrl_vq);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(vdev);
|
2016-02-04 17:26:51 +03:00
|
|
|
VirtQueueElement *elem;
|
2014-09-10 16:12:28 +04:00
|
|
|
size_t s;
|
|
|
|
struct virtio_gpu_update_cursor cursor_info;
|
|
|
|
|
|
|
|
if (!virtio_queue_ready(vq)) {
|
|
|
|
return;
|
|
|
|
}
|
2016-02-04 17:26:51 +03:00
|
|
|
for (;;) {
|
|
|
|
elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
|
|
|
|
if (!elem) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
s = iov_to_buf(elem->out_sg, elem->out_num, 0,
|
2014-09-10 16:12:28 +04:00
|
|
|
&cursor_info, sizeof(cursor_info));
|
|
|
|
if (s != sizeof(cursor_info)) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"%s: cursor size incorrect %zu vs %zu\n",
|
|
|
|
__func__, s, sizeof(cursor_info));
|
|
|
|
} else {
|
|
|
|
update_cursor(g, &cursor_info);
|
|
|
|
}
|
2016-02-04 17:26:51 +03:00
|
|
|
virtqueue_push(vq, elem, 0);
|
2014-09-10 16:12:28 +04:00
|
|
|
virtio_notify(vdev, vq);
|
2016-02-04 17:26:51 +03:00
|
|
|
g_free(elem);
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_cursor_bh(void *opaque)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = opaque;
|
|
|
|
virtio_gpu_handle_cursor(&g->parent_obj, g->cursor_vq);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_invalidate_display(void *opaque)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_update_display(void *opaque)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_text_update(void *opaque, console_ch_t *chardata)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = opaque;
|
|
|
|
|
2016-05-19 13:26:00 +03:00
|
|
|
if (idx >= g->conf.max_outputs) {
|
2014-09-10 16:12:28 +04:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
g->req_state[idx].x = info->xoff;
|
|
|
|
g->req_state[idx].y = info->yoff;
|
|
|
|
g->req_state[idx].width = info->width;
|
|
|
|
g->req_state[idx].height = info->height;
|
|
|
|
|
|
|
|
if (info->width && info->height) {
|
|
|
|
g->enabled_output_bitmask |= (1 << idx);
|
|
|
|
} else {
|
|
|
|
g->enabled_output_bitmask &= ~(1 << idx);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* send event to guest */
|
|
|
|
virtio_gpu_notify_event(g, VIRTIO_GPU_EVENT_DISPLAY);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
const GraphicHwOps virtio_gpu_ops = {
|
|
|
|
.invalidate = virtio_gpu_invalidate_display,
|
|
|
|
.gfx_update = virtio_gpu_update_display,
|
|
|
|
.text_update = virtio_gpu_text_update,
|
|
|
|
.ui_info = virtio_gpu_ui_info,
|
2017-05-05 13:40:56 +03:00
|
|
|
#ifdef CONFIG_VIRGL
|
2015-12-02 10:17:24 +03:00
|
|
|
.gl_block = virtio_gpu_gl_block,
|
2017-05-05 13:40:56 +03:00
|
|
|
#endif
|
2014-09-10 16:12:28 +04:00
|
|
|
};
|
|
|
|
|
2016-05-23 16:22:07 +03:00
|
|
|
static const VMStateDescription vmstate_virtio_gpu_scanout = {
|
|
|
|
.name = "virtio-gpu-one-scanout",
|
|
|
|
.version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(width, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(height, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_INT32(x, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_INT32(y, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_virtio_gpu_scanouts = {
|
|
|
|
.name = "virtio-gpu-scanouts",
|
|
|
|
.version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_INT32(enable, struct VirtIOGPU),
|
|
|
|
VMSTATE_UINT32_EQUAL(conf.max_outputs, struct VirtIOGPU),
|
|
|
|
VMSTATE_STRUCT_VARRAY_UINT32(scanout, struct VirtIOGPU,
|
|
|
|
conf.max_outputs, 1,
|
|
|
|
vmstate_virtio_gpu_scanout,
|
|
|
|
struct virtio_gpu_scanout),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2017-01-19 22:00:50 +03:00
|
|
|
static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size,
|
|
|
|
VMStateField *field, QJSON *vmdesc)
|
2016-05-23 16:22:07 +03:00
|
|
|
{
|
|
|
|
VirtIOGPU *g = opaque;
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* in 2d mode we should never find unprocessed commands here */
|
|
|
|
assert(QTAILQ_EMPTY(&g->cmdq));
|
|
|
|
|
|
|
|
QTAILQ_FOREACH(res, &g->reslist, next) {
|
|
|
|
qemu_put_be32(f, res->resource_id);
|
|
|
|
qemu_put_be32(f, res->width);
|
|
|
|
qemu_put_be32(f, res->height);
|
|
|
|
qemu_put_be32(f, res->format);
|
|
|
|
qemu_put_be32(f, res->iov_cnt);
|
|
|
|
for (i = 0; i < res->iov_cnt; i++) {
|
|
|
|
qemu_put_be64(f, res->addrs[i]);
|
|
|
|
qemu_put_be32(f, res->iov[i].iov_len);
|
|
|
|
}
|
|
|
|
qemu_put_buffer(f, (void *)pixman_image_get_data(res->image),
|
|
|
|
pixman_image_get_stride(res->image) * res->height);
|
|
|
|
}
|
|
|
|
qemu_put_be32(f, 0); /* end of list */
|
|
|
|
|
|
|
|
vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
|
2017-01-19 22:00:50 +03:00
|
|
|
|
|
|
|
return 0;
|
2016-05-23 16:22:07 +03:00
|
|
|
}
|
|
|
|
|
2017-01-19 22:00:50 +03:00
|
|
|
static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
|
|
|
|
VMStateField *field)
|
2016-05-23 16:22:07 +03:00
|
|
|
{
|
|
|
|
VirtIOGPU *g = opaque;
|
|
|
|
struct virtio_gpu_simple_resource *res;
|
|
|
|
struct virtio_gpu_scanout *scanout;
|
|
|
|
uint32_t resource_id, pformat;
|
2016-10-06 15:55:44 +03:00
|
|
|
int i;
|
2016-05-23 16:22:07 +03:00
|
|
|
|
2017-01-09 16:38:42 +03:00
|
|
|
g->hostmem = 0;
|
|
|
|
|
2016-05-23 16:22:07 +03:00
|
|
|
resource_id = qemu_get_be32(f);
|
|
|
|
while (resource_id != 0) {
|
|
|
|
res = g_new0(struct virtio_gpu_simple_resource, 1);
|
|
|
|
res->resource_id = resource_id;
|
|
|
|
res->width = qemu_get_be32(f);
|
|
|
|
res->height = qemu_get_be32(f);
|
|
|
|
res->format = qemu_get_be32(f);
|
|
|
|
res->iov_cnt = qemu_get_be32(f);
|
|
|
|
|
|
|
|
/* allocate */
|
|
|
|
pformat = get_pixman_format(res->format);
|
|
|
|
if (!pformat) {
|
2017-01-09 16:38:43 +03:00
|
|
|
g_free(res);
|
2016-05-23 16:22:07 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
res->image = pixman_image_create_bits(pformat,
|
|
|
|
res->width, res->height,
|
|
|
|
NULL, 0);
|
|
|
|
if (!res->image) {
|
2017-01-09 16:38:43 +03:00
|
|
|
g_free(res);
|
2016-05-23 16:22:07 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-01-09 16:38:42 +03:00
|
|
|
res->hostmem = PIXMAN_FORMAT_BPP(pformat) * res->width * res->height;
|
|
|
|
|
2016-05-23 16:22:07 +03:00
|
|
|
res->addrs = g_new(uint64_t, res->iov_cnt);
|
|
|
|
res->iov = g_new(struct iovec, res->iov_cnt);
|
|
|
|
|
|
|
|
/* read data */
|
|
|
|
for (i = 0; i < res->iov_cnt; i++) {
|
|
|
|
res->addrs[i] = qemu_get_be64(f);
|
|
|
|
res->iov[i].iov_len = qemu_get_be32(f);
|
|
|
|
}
|
|
|
|
qemu_get_buffer(f, (void *)pixman_image_get_data(res->image),
|
|
|
|
pixman_image_get_stride(res->image) * res->height);
|
|
|
|
|
|
|
|
/* restore mapping */
|
|
|
|
for (i = 0; i < res->iov_cnt; i++) {
|
|
|
|
hwaddr len = res->iov[i].iov_len;
|
|
|
|
res->iov[i].iov_base =
|
|
|
|
cpu_physical_memory_map(res->addrs[i], &len, 1);
|
|
|
|
if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
|
2017-01-09 16:38:43 +03:00
|
|
|
/* Clean up the half-a-mapping we just created... */
|
|
|
|
if (res->iov[i].iov_base) {
|
|
|
|
cpu_physical_memory_unmap(res->iov[i].iov_base,
|
|
|
|
len, 0, 0);
|
|
|
|
}
|
|
|
|
/* ...and the mappings for previous loop iterations */
|
|
|
|
res->iov_cnt = i;
|
|
|
|
virtio_gpu_cleanup_mapping(res);
|
|
|
|
pixman_image_unref(res->image);
|
|
|
|
g_free(res);
|
2016-05-23 16:22:07 +03:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
QTAILQ_INSERT_HEAD(&g->reslist, res, next);
|
2017-01-09 16:38:42 +03:00
|
|
|
g->hostmem += res->hostmem;
|
2016-05-23 16:22:07 +03:00
|
|
|
|
|
|
|
resource_id = qemu_get_be32(f);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* load & apply scanout state */
|
|
|
|
vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1);
|
|
|
|
for (i = 0; i < g->conf.max_outputs; i++) {
|
|
|
|
scanout = &g->scanout[i];
|
|
|
|
if (!scanout->resource_id) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
res = virtio_gpu_find_resource(g, scanout->resource_id);
|
|
|
|
if (!res) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
scanout->ds = qemu_create_displaysurface_pixman(res->image);
|
|
|
|
if (!scanout->ds) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dpy_gfx_replace_surface(scanout->con, scanout->ds);
|
|
|
|
dpy_gfx_update(scanout->con, 0, 0, scanout->width, scanout->height);
|
|
|
|
update_cursor(g, &scanout->cursor);
|
|
|
|
res->scanout_bitmask |= (1 << i);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-09-10 16:12:28 +04:00
|
|
|
static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
|
|
|
|
{
|
|
|
|
VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(qdev);
|
2014-07-11 14:51:43 +04:00
|
|
|
bool have_virgl;
|
2017-01-16 14:31:53 +03:00
|
|
|
Error *local_err = NULL;
|
2014-09-10 16:12:28 +04:00
|
|
|
int i;
|
|
|
|
|
2016-05-19 13:25:59 +03:00
|
|
|
if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
|
|
|
|
error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
|
2016-05-19 13:25:57 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2014-07-11 14:51:43 +04:00
|
|
|
g->use_virgl_renderer = false;
|
|
|
|
#if !defined(CONFIG_VIRGL) || defined(HOST_WORDS_BIGENDIAN)
|
|
|
|
have_virgl = false;
|
|
|
|
#else
|
|
|
|
have_virgl = display_opengl;
|
|
|
|
#endif
|
|
|
|
if (!have_virgl) {
|
|
|
|
g->conf.flags &= ~(1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED);
|
|
|
|
}
|
|
|
|
|
2017-01-16 14:31:53 +03:00
|
|
|
if (virtio_gpu_virgl_enabled(g->conf)) {
|
|
|
|
error_setg(&g->migration_blocker, "virgl is not yet migratable");
|
|
|
|
migrate_add_blocker(g->migration_blocker, &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
error_free(g->migration_blocker);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
g->config_size = sizeof(struct virtio_gpu_config);
|
|
|
|
g->virtio_config.num_scanouts = g->conf.max_outputs;
|
|
|
|
virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,
|
|
|
|
g->config_size);
|
|
|
|
|
2017-04-21 12:22:14 +03:00
|
|
|
g->req_state[0].width = g->conf.xres;
|
|
|
|
g->req_state[0].height = g->conf.yres;
|
2017-01-16 14:31:53 +03:00
|
|
|
|
2014-07-11 14:51:43 +04:00
|
|
|
if (virtio_gpu_virgl_enabled(g->conf)) {
|
|
|
|
/* use larger control queue in 3d mode */
|
|
|
|
g->ctrl_vq = virtio_add_queue(vdev, 256, virtio_gpu_handle_ctrl_cb);
|
|
|
|
g->cursor_vq = virtio_add_queue(vdev, 16, virtio_gpu_handle_cursor_cb);
|
|
|
|
g->virtio_config.num_capsets = 1;
|
|
|
|
} else {
|
|
|
|
g->ctrl_vq = virtio_add_queue(vdev, 64, virtio_gpu_handle_ctrl_cb);
|
|
|
|
g->cursor_vq = virtio_add_queue(vdev, 16, virtio_gpu_handle_cursor_cb);
|
|
|
|
}
|
2014-09-10 16:12:28 +04:00
|
|
|
|
|
|
|
g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g);
|
|
|
|
g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g);
|
|
|
|
QTAILQ_INIT(&g->reslist);
|
2015-12-01 14:05:14 +03:00
|
|
|
QTAILQ_INIT(&g->cmdq);
|
2014-09-10 16:12:28 +04:00
|
|
|
QTAILQ_INIT(&g->fenceq);
|
|
|
|
|
|
|
|
g->enabled_output_bitmask = 1;
|
|
|
|
g->qdev = qdev;
|
|
|
|
|
|
|
|
for (i = 0; i < g->conf.max_outputs; i++) {
|
|
|
|
g->scanout[i].con =
|
|
|
|
graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g);
|
|
|
|
if (i > 0) {
|
|
|
|
dpy_gfx_replace_surface(g->scanout[i].con, NULL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-07-14 20:22:54 +03:00
|
|
|
static void virtio_gpu_device_unrealize(DeviceState *qdev, Error **errp)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(qdev);
|
|
|
|
if (g->migration_blocker) {
|
|
|
|
migrate_del_blocker(g->migration_blocker);
|
|
|
|
error_free(g->migration_blocker);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-09-10 16:12:28 +04:00
|
|
|
static void virtio_gpu_instance_init(Object *obj)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virtio_gpu_reset(VirtIODevice *vdev)
|
|
|
|
{
|
|
|
|
VirtIOGPU *g = VIRTIO_GPU(vdev);
|
|
|
|
struct virtio_gpu_simple_resource *res, *tmp;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
g->enable = 0;
|
|
|
|
|
|
|
|
QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {
|
|
|
|
virtio_gpu_resource_destroy(g, res);
|
|
|
|
}
|
|
|
|
for (i = 0; i < g->conf.max_outputs; i++) {
|
|
|
|
#if 0
|
|
|
|
g->req_state[i].x = 0;
|
|
|
|
g->req_state[i].y = 0;
|
|
|
|
if (i == 0) {
|
|
|
|
g->req_state[0].width = 1024;
|
|
|
|
g->req_state[0].height = 768;
|
|
|
|
} else {
|
|
|
|
g->req_state[i].width = 0;
|
|
|
|
g->req_state[i].height = 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
g->scanout[i].resource_id = 0;
|
|
|
|
g->scanout[i].width = 0;
|
|
|
|
g->scanout[i].height = 0;
|
|
|
|
g->scanout[i].x = 0;
|
|
|
|
g->scanout[i].y = 0;
|
|
|
|
g->scanout[i].ds = NULL;
|
|
|
|
}
|
|
|
|
g->enabled_output_bitmask = 1;
|
2014-07-11 14:51:43 +04:00
|
|
|
|
|
|
|
#ifdef CONFIG_VIRGL
|
|
|
|
if (g->use_virgl_renderer) {
|
|
|
|
virtio_gpu_virgl_reset(g);
|
|
|
|
g->use_virgl_renderer = 0;
|
|
|
|
}
|
|
|
|
#endif
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
|
2016-10-06 15:55:44 +03:00
|
|
|
/*
|
|
|
|
* For historical reasons virtio_gpu does not adhere to virtio migration
|
|
|
|
* scheme as described in doc/virtio-migration.txt, in a sense that no
|
|
|
|
* save/load callback are provided to the core. Instead the device data
|
|
|
|
* is saved/loaded after the core data.
|
|
|
|
*
|
|
|
|
* Because of this we need a special vmsd.
|
|
|
|
*/
|
|
|
|
static const VMStateDescription vmstate_virtio_gpu = {
|
|
|
|
.name = "virtio-gpu",
|
|
|
|
.minimum_version_id = VIRTIO_GPU_VM_VERSION,
|
|
|
|
.version_id = VIRTIO_GPU_VM_VERSION,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_VIRTIO_DEVICE /* core */,
|
|
|
|
{
|
|
|
|
.name = "virtio-gpu",
|
|
|
|
.info = &(const VMStateInfo) {
|
|
|
|
.name = "virtio-gpu",
|
|
|
|
.get = virtio_gpu_load,
|
|
|
|
.put = virtio_gpu_save,
|
|
|
|
},
|
|
|
|
.flags = VMS_SINGLE,
|
|
|
|
} /* device */,
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
2016-07-14 20:22:55 +03:00
|
|
|
|
2014-09-10 16:12:28 +04:00
|
|
|
static Property virtio_gpu_properties[] = {
|
2015-06-24 13:22:09 +03:00
|
|
|
DEFINE_PROP_UINT32("max_outputs", VirtIOGPU, conf.max_outputs, 1),
|
2016-11-29 15:42:36 +03:00
|
|
|
DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf.max_hostmem,
|
|
|
|
256 * 1024 * 1024),
|
2014-07-11 14:51:43 +04:00
|
|
|
#ifdef CONFIG_VIRGL
|
|
|
|
DEFINE_PROP_BIT("virgl", VirtIOGPU, conf.flags,
|
|
|
|
VIRTIO_GPU_FLAG_VIRGL_ENABLED, true),
|
|
|
|
DEFINE_PROP_BIT("stats", VirtIOGPU, conf.flags,
|
|
|
|
VIRTIO_GPU_FLAG_STATS_ENABLED, false),
|
|
|
|
#endif
|
2017-04-21 12:22:14 +03:00
|
|
|
DEFINE_PROP_UINT32("xres", VirtIOGPU, conf.xres, 1024),
|
|
|
|
DEFINE_PROP_UINT32("yres", VirtIOGPU, conf.yres, 768),
|
2014-09-10 16:12:28 +04:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void virtio_gpu_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
vdc->realize = virtio_gpu_device_realize;
|
2016-07-14 20:22:54 +03:00
|
|
|
vdc->unrealize = virtio_gpu_device_unrealize;
|
2014-09-10 16:12:28 +04:00
|
|
|
vdc->get_config = virtio_gpu_get_config;
|
|
|
|
vdc->set_config = virtio_gpu_set_config;
|
|
|
|
vdc->get_features = virtio_gpu_get_features;
|
2014-07-11 14:51:43 +04:00
|
|
|
vdc->set_features = virtio_gpu_set_features;
|
2014-09-10 16:12:28 +04:00
|
|
|
|
|
|
|
vdc->reset = virtio_gpu_reset;
|
|
|
|
|
|
|
|
dc->props = virtio_gpu_properties;
|
2016-07-14 20:22:55 +03:00
|
|
|
dc->vmsd = &vmstate_virtio_gpu;
|
2017-01-09 16:55:38 +03:00
|
|
|
dc->hotpluggable = false;
|
2014-09-10 16:12:28 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo virtio_gpu_info = {
|
|
|
|
.name = TYPE_VIRTIO_GPU,
|
|
|
|
.parent = TYPE_VIRTIO_DEVICE,
|
|
|
|
.instance_size = sizeof(VirtIOGPU),
|
|
|
|
.instance_init = virtio_gpu_instance_init,
|
|
|
|
.class_init = virtio_gpu_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void virtio_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&virtio_gpu_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(virtio_register_types)
|
|
|
|
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctrl_hdr) != 24);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_update_cursor) != 56);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_unref) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_2d) != 40);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_set_scanout) != 48);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_flush) != 48);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_to_host_2d) != 56);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_mem_entry) != 16);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_attach_backing) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_detach_backing) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_display_info) != 408);
|
2014-07-11 14:51:43 +04:00
|
|
|
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_transfer_host_3d) != 72);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resource_create_3d) != 72);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_create) != 96);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_destroy) != 24);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_ctx_resource) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_cmd_submit) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset_info) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset_info) != 40);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_get_capset) != 32);
|
|
|
|
QEMU_BUILD_BUG_ON(sizeof(struct virtio_gpu_resp_capset) != 24);
|