2007-04-05 10:58:33 +04:00
|
|
|
/*
|
2012-03-24 20:51:13 +04:00
|
|
|
* Helpers for loads and stores
|
2007-09-17 01:08:06 +04:00
|
|
|
*
|
2007-04-05 10:58:33 +04:00
|
|
|
* Copyright (c) 2007 Jocelyn Mayer
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
2009-07-17 00:47:01 +04:00
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
2007-04-05 10:58:33 +04:00
|
|
|
*/
|
|
|
|
|
2011-07-13 16:44:15 +04:00
|
|
|
#include "cpu.h"
|
2008-11-17 17:43:54 +03:00
|
|
|
#include "helper.h"
|
2007-04-05 10:58:33 +04:00
|
|
|
|
|
|
|
|
|
|
|
/* Softmmu support */
|
2012-03-24 20:51:13 +04:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
|
2011-05-21 00:04:35 +04:00
|
|
|
uint64_t helper_ldl_phys(uint64_t p)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
return (int32_t)ldl_phys(p);
|
2008-09-30 10:45:44 +04:00
|
|
|
}
|
|
|
|
|
2011-05-21 00:04:35 +04:00
|
|
|
uint64_t helper_ldq_phys(uint64_t p)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
return ldq_phys(p);
|
2008-09-30 10:45:44 +04:00
|
|
|
}
|
|
|
|
|
2012-03-24 20:51:13 +04:00
|
|
|
uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
env->lock_addr = p;
|
|
|
|
return env->lock_value = (int32_t)ldl_phys(p);
|
2008-09-30 10:45:44 +04:00
|
|
|
}
|
|
|
|
|
2012-03-24 20:51:13 +04:00
|
|
|
uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
env->lock_addr = p;
|
2012-03-24 20:51:13 +04:00
|
|
|
return env->lock_value = ldq_phys(p);
|
2008-09-30 10:45:44 +04:00
|
|
|
}
|
|
|
|
|
2011-05-21 00:04:35 +04:00
|
|
|
void helper_stl_phys(uint64_t p, uint64_t v)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
stl_phys(p, v);
|
2008-09-30 10:45:44 +04:00
|
|
|
}
|
|
|
|
|
2011-05-21 00:04:35 +04:00
|
|
|
void helper_stq_phys(uint64_t p, uint64_t v)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
stq_phys(p, v);
|
2008-09-30 10:45:44 +04:00
|
|
|
}
|
|
|
|
|
2012-03-24 20:51:13 +04:00
|
|
|
uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
uint64_t ret = 0;
|
2008-09-30 10:45:44 +04:00
|
|
|
|
2011-05-21 00:04:35 +04:00
|
|
|
if (p == env->lock_addr) {
|
|
|
|
int32_t old = ldl_phys(p);
|
|
|
|
if (old == (int32_t)env->lock_value) {
|
|
|
|
stl_phys(p, v);
|
|
|
|
ret = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
env->lock_addr = -1;
|
2008-09-30 10:45:44 +04:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-03-24 20:51:13 +04:00
|
|
|
uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
|
2008-09-30 10:45:44 +04:00
|
|
|
{
|
2011-05-21 00:04:35 +04:00
|
|
|
uint64_t ret = 0;
|
2008-09-30 10:45:44 +04:00
|
|
|
|
2011-05-21 00:04:35 +04:00
|
|
|
if (p == env->lock_addr) {
|
|
|
|
uint64_t old = ldq_phys(p);
|
|
|
|
if (old == env->lock_value) {
|
|
|
|
stq_phys(p, v);
|
|
|
|
ret = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
env->lock_addr = -1;
|
2008-09-30 10:45:44 +04:00
|
|
|
|
|
|
|
return ret;
|
2007-04-05 10:58:33 +04:00
|
|
|
}
|
|
|
|
|
2012-03-24 20:51:13 +04:00
|
|
|
static void do_unaligned_access(CPUAlphaState *env, target_ulong addr,
|
2012-04-09 18:20:20 +04:00
|
|
|
int is_write, int is_user, uintptr_t retaddr)
|
2011-04-19 03:13:12 +04:00
|
|
|
{
|
|
|
|
uint64_t pc;
|
|
|
|
uint32_t insn;
|
|
|
|
|
2012-12-05 00:16:07 +04:00
|
|
|
if (retaddr) {
|
|
|
|
cpu_restore_state(env, retaddr);
|
|
|
|
}
|
2011-04-19 03:13:12 +04:00
|
|
|
|
|
|
|
pc = env->pc;
|
2012-03-24 20:51:13 +04:00
|
|
|
insn = cpu_ldl_code(env, pc);
|
2011-04-19 03:13:12 +04:00
|
|
|
|
|
|
|
env->trap_arg0 = addr;
|
|
|
|
env->trap_arg1 = insn >> 26; /* opcode */
|
|
|
|
env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
|
2012-03-24 20:51:08 +04:00
|
|
|
env->exception_index = EXCP_UNALIGN;
|
|
|
|
env->error_code = 0;
|
|
|
|
cpu_loop_exit(env);
|
2011-04-19 03:13:12 +04:00
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
void cpu_unassigned_access(CPUAlphaState *env, hwaddr addr,
|
2012-03-24 20:51:13 +04:00
|
|
|
int is_write, int is_exec, int unused, int size)
|
2011-04-19 03:13:12 +04:00
|
|
|
{
|
|
|
|
env->trap_arg0 = addr;
|
|
|
|
env->trap_arg1 = is_write;
|
2012-04-09 18:20:20 +04:00
|
|
|
dynamic_excp(env, 0, EXCP_MCHK, 0);
|
2011-04-19 03:13:12 +04:00
|
|
|
}
|
|
|
|
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/softmmu_exec.h"
|
2011-07-13 16:44:15 +04:00
|
|
|
|
2007-04-05 10:58:33 +04:00
|
|
|
#define MMUSUFFIX _mmu
|
2011-04-19 03:13:12 +04:00
|
|
|
#define ALIGNED_ONLY
|
2007-04-05 10:58:33 +04:00
|
|
|
|
|
|
|
#define SHIFT 0
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/softmmu_template.h"
|
2007-04-05 10:58:33 +04:00
|
|
|
|
|
|
|
#define SHIFT 1
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/softmmu_template.h"
|
2007-04-05 10:58:33 +04:00
|
|
|
|
|
|
|
#define SHIFT 2
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/softmmu_template.h"
|
2007-04-05 10:58:33 +04:00
|
|
|
|
|
|
|
#define SHIFT 3
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/softmmu_template.h"
|
2007-04-05 10:58:33 +04:00
|
|
|
|
|
|
|
/* try to fill the TLB and return an exception if error. If retaddr is
|
|
|
|
NULL, it means that the function was called in C code (i.e. not
|
|
|
|
from generated code or from helper.c) */
|
|
|
|
/* XXX: fix it to restore all registers */
|
2012-03-24 20:51:13 +04:00
|
|
|
void tlb_fill(CPUAlphaState *env, target_ulong addr, int is_write,
|
2012-04-09 18:20:20 +04:00
|
|
|
int mmu_idx, uintptr_t retaddr)
|
2007-04-05 10:58:33 +04:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2011-08-01 20:12:17 +04:00
|
|
|
ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx);
|
2011-04-25 23:20:27 +04:00
|
|
|
if (unlikely(ret != 0)) {
|
2012-12-05 00:16:07 +04:00
|
|
|
if (retaddr) {
|
|
|
|
cpu_restore_state(env, retaddr);
|
|
|
|
}
|
2007-04-05 10:58:33 +04:00
|
|
|
/* Exception index and error code are already set */
|
2011-05-14 16:52:35 +04:00
|
|
|
cpu_loop_exit(env);
|
2007-04-05 10:58:33 +04:00
|
|
|
}
|
|
|
|
}
|
2012-03-24 20:51:13 +04:00
|
|
|
#endif /* CONFIG_USER_ONLY */
|