2012-06-21 19:40:09 +04:00
|
|
|
#ifndef XEN_PT_H
|
|
|
|
#define XEN_PT_H
|
|
|
|
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/xen/xen_common.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/pci/pci.h"
|
2013-03-18 20:36:02 +04:00
|
|
|
#include "xen-host-pci-device.h"
|
2020-09-03 23:43:22 +03:00
|
|
|
#include "qom/object.h"
|
2012-06-21 19:40:09 +04:00
|
|
|
|
2020-06-03 19:04:42 +03:00
|
|
|
bool xen_igd_gfx_pt_enabled(void);
|
|
|
|
void xen_igd_gfx_pt_set(bool value, Error **errp);
|
|
|
|
|
2022-02-20 19:39:25 +03:00
|
|
|
void xen_pt_log(const PCIDevice *d, const char *f, ...) G_GNUC_PRINTF(2, 3);
|
2012-06-21 19:40:09 +04:00
|
|
|
|
|
|
|
#define XEN_PT_ERR(d, _f, _a...) xen_pt_log(d, "%s: Error: "_f, __func__, ##_a)
|
|
|
|
|
|
|
|
#ifdef XEN_PT_LOGGING_ENABLED
|
|
|
|
# define XEN_PT_LOG(d, _f, _a...) xen_pt_log(d, "%s: " _f, __func__, ##_a)
|
|
|
|
# define XEN_PT_WARN(d, _f, _a...) \
|
|
|
|
xen_pt_log(d, "%s: Warning: "_f, __func__, ##_a)
|
|
|
|
#else
|
|
|
|
# define XEN_PT_LOG(d, _f, _a...)
|
|
|
|
# define XEN_PT_WARN(d, _f, _a...)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef XEN_PT_DEBUG_PCI_CONFIG_ACCESS
|
|
|
|
# define XEN_PT_LOG_CONFIG(d, addr, val, len) \
|
|
|
|
xen_pt_log(d, "%s: address=0x%04x val=0x%08x len=%d\n", \
|
|
|
|
__func__, addr, val, len)
|
|
|
|
#else
|
|
|
|
# define XEN_PT_LOG_CONFIG(d, addr, val, len)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
/* Helper */
|
|
|
|
#define XEN_PFN(x) ((x) >> XC_PAGE_SHIFT)
|
|
|
|
|
2015-06-05 15:04:55 +03:00
|
|
|
typedef const struct XenPTRegInfo XenPTRegInfo;
|
2012-06-21 19:40:09 +04:00
|
|
|
typedef struct XenPTReg XenPTReg;
|
|
|
|
|
|
|
|
|
2015-05-13 03:43:26 +03:00
|
|
|
#define TYPE_XEN_PT_DEVICE "xen-pci-passthrough"
|
2020-09-16 21:25:19 +03:00
|
|
|
OBJECT_DECLARE_SIMPLE_TYPE(XenPCIPassthroughState, XEN_PT_DEVICE)
|
2015-05-13 03:43:26 +03:00
|
|
|
|
2015-07-15 08:37:50 +03:00
|
|
|
uint32_t igd_read_opregion(XenPCIPassthroughState *s);
|
|
|
|
void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
|
2022-03-26 19:58:24 +03:00
|
|
|
void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
|
|
|
|
XenHostPCIDevice *dev);
|
2015-07-15 08:37:50 +03:00
|
|
|
|
2012-06-21 19:40:09 +04:00
|
|
|
/* function type for config reg */
|
|
|
|
typedef int (*xen_pt_conf_reg_init)
|
|
|
|
(XenPCIPassthroughState *, XenPTRegInfo *, uint32_t real_offset,
|
|
|
|
uint32_t *data);
|
|
|
|
typedef int (*xen_pt_conf_dword_write)
|
|
|
|
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
|
|
|
uint32_t *val, uint32_t dev_value, uint32_t valid_mask);
|
|
|
|
typedef int (*xen_pt_conf_word_write)
|
|
|
|
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
|
|
|
uint16_t *val, uint16_t dev_value, uint16_t valid_mask);
|
|
|
|
typedef int (*xen_pt_conf_byte_write)
|
|
|
|
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
|
|
|
uint8_t *val, uint8_t dev_value, uint8_t valid_mask);
|
|
|
|
typedef int (*xen_pt_conf_dword_read)
|
|
|
|
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
|
|
|
uint32_t *val, uint32_t valid_mask);
|
|
|
|
typedef int (*xen_pt_conf_word_read)
|
|
|
|
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
|
|
|
uint16_t *val, uint16_t valid_mask);
|
|
|
|
typedef int (*xen_pt_conf_byte_read)
|
|
|
|
(XenPCIPassthroughState *, XenPTReg *cfg_entry,
|
|
|
|
uint8_t *val, uint8_t valid_mask);
|
|
|
|
|
|
|
|
#define XEN_PT_BAR_ALLF 0xFFFFFFFF
|
|
|
|
#define XEN_PT_BAR_UNMAPPED (-1)
|
|
|
|
|
2015-07-15 08:37:50 +03:00
|
|
|
#define XEN_PCI_CAP_MAX 48
|
2012-06-21 19:40:48 +04:00
|
|
|
|
2015-07-15 08:37:50 +03:00
|
|
|
#define XEN_PCI_INTEL_OPREGION 0xfc
|
2012-06-21 19:40:09 +04:00
|
|
|
|
|
|
|
typedef enum {
|
|
|
|
XEN_PT_GRP_TYPE_HARDWIRED = 0, /* 0 Hardwired reg group */
|
|
|
|
XEN_PT_GRP_TYPE_EMU, /* emul reg group */
|
|
|
|
} XenPTRegisterGroupType;
|
|
|
|
|
|
|
|
typedef enum {
|
|
|
|
XEN_PT_BAR_FLAG_MEM = 0, /* Memory type BAR */
|
|
|
|
XEN_PT_BAR_FLAG_IO, /* I/O type BAR */
|
|
|
|
XEN_PT_BAR_FLAG_UPPER, /* upper 64bit BAR */
|
|
|
|
XEN_PT_BAR_FLAG_UNUSED, /* unused BAR */
|
|
|
|
} XenPTBarFlag;
|
|
|
|
|
|
|
|
|
|
|
|
typedef struct XenPTRegion {
|
|
|
|
/* BAR flag */
|
|
|
|
XenPTBarFlag bar_flag;
|
|
|
|
/* Translation of the emulated address */
|
|
|
|
union {
|
|
|
|
uint64_t maddr;
|
|
|
|
uint64_t pio_base;
|
|
|
|
uint64_t u;
|
|
|
|
} access;
|
|
|
|
} XenPTRegion;
|
|
|
|
|
|
|
|
/* XenPTRegInfo declaration
|
|
|
|
* - only for emulated register (either a part or whole bit).
|
|
|
|
* - for passthrough register that need special behavior (like interacting with
|
|
|
|
* other component), set emu_mask to all 0 and specify r/w func properly.
|
|
|
|
* - do NOT use ALL F for init_val, otherwise the tbl will not be registered.
|
|
|
|
*/
|
|
|
|
|
2012-08-11 00:03:25 +04:00
|
|
|
/* emulated register information */
|
2012-06-21 19:40:09 +04:00
|
|
|
struct XenPTRegInfo {
|
|
|
|
uint32_t offset;
|
|
|
|
uint32_t size;
|
|
|
|
uint32_t init_val;
|
2015-06-02 18:07:01 +03:00
|
|
|
/* reg reserved field mask (ON:reserved, OFF:defined) */
|
|
|
|
uint32_t res_mask;
|
2012-06-21 19:40:09 +04:00
|
|
|
/* reg read only field mask (ON:RO/ROS, OFF:other) */
|
|
|
|
uint32_t ro_mask;
|
2015-12-09 18:47:28 +03:00
|
|
|
/* reg read/write-1-clear field mask (ON:RW1C/RW1CS, OFF:other) */
|
|
|
|
uint32_t rw1c_mask;
|
2012-06-21 19:40:09 +04:00
|
|
|
/* reg emulate field mask (ON:emu, OFF:passthrough) */
|
|
|
|
uint32_t emu_mask;
|
|
|
|
xen_pt_conf_reg_init init;
|
|
|
|
/* read/write function pointer
|
|
|
|
* for double_word/word/byte size */
|
|
|
|
union {
|
|
|
|
struct {
|
|
|
|
xen_pt_conf_dword_write write;
|
|
|
|
xen_pt_conf_dword_read read;
|
|
|
|
} dw;
|
|
|
|
struct {
|
|
|
|
xen_pt_conf_word_write write;
|
|
|
|
xen_pt_conf_word_read read;
|
|
|
|
} w;
|
|
|
|
struct {
|
|
|
|
xen_pt_conf_byte_write write;
|
|
|
|
xen_pt_conf_byte_read read;
|
|
|
|
} b;
|
|
|
|
} u;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* emulated register management */
|
|
|
|
struct XenPTReg {
|
|
|
|
QLIST_ENTRY(XenPTReg) entries;
|
|
|
|
XenPTRegInfo *reg;
|
2015-07-01 22:41:33 +03:00
|
|
|
union {
|
|
|
|
uint8_t *byte;
|
|
|
|
uint16_t *half_word;
|
|
|
|
uint32_t *word;
|
|
|
|
} ptr; /* pointer to dev.config. */
|
2012-06-21 19:40:09 +04:00
|
|
|
};
|
|
|
|
|
2015-06-05 15:04:55 +03:00
|
|
|
typedef const struct XenPTRegGroupInfo XenPTRegGroupInfo;
|
2012-06-21 19:40:09 +04:00
|
|
|
|
|
|
|
/* emul reg group size initialize method */
|
|
|
|
typedef int (*xen_pt_reg_size_init_fn)
|
2015-06-05 15:04:55 +03:00
|
|
|
(XenPCIPassthroughState *, XenPTRegGroupInfo *,
|
2012-06-21 19:40:09 +04:00
|
|
|
uint32_t base_offset, uint8_t *size);
|
|
|
|
|
2012-08-11 00:03:25 +04:00
|
|
|
/* emulated register group information */
|
2012-06-21 19:40:09 +04:00
|
|
|
struct XenPTRegGroupInfo {
|
|
|
|
uint8_t grp_id;
|
|
|
|
XenPTRegisterGroupType grp_type;
|
|
|
|
uint8_t grp_size;
|
|
|
|
xen_pt_reg_size_init_fn size_init;
|
|
|
|
XenPTRegInfo *emu_regs;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* emul register group management table */
|
|
|
|
typedef struct XenPTRegGroup {
|
|
|
|
QLIST_ENTRY(XenPTRegGroup) entries;
|
2015-06-05 15:04:55 +03:00
|
|
|
XenPTRegGroupInfo *reg_grp;
|
2012-06-21 19:40:09 +04:00
|
|
|
uint32_t base_offset;
|
|
|
|
uint8_t size;
|
|
|
|
QLIST_HEAD(, XenPTReg) reg_tbl_list;
|
|
|
|
} XenPTRegGroup;
|
|
|
|
|
|
|
|
|
|
|
|
#define XEN_PT_UNASSIGNED_PIRQ (-1)
|
2012-06-21 19:42:35 +04:00
|
|
|
typedef struct XenPTMSI {
|
|
|
|
uint16_t flags;
|
|
|
|
uint32_t addr_lo; /* guest message address */
|
|
|
|
uint32_t addr_hi; /* guest message upper address */
|
|
|
|
uint16_t data; /* guest message data */
|
|
|
|
uint32_t ctrl_offset; /* saved control offset */
|
2017-08-24 18:07:03 +03:00
|
|
|
uint32_t mask; /* guest mask bits */
|
2012-06-21 19:42:35 +04:00
|
|
|
int pirq; /* guest pirq corresponding */
|
|
|
|
bool initialized; /* when guest MSI is initialized */
|
|
|
|
bool mapped; /* when pirq is mapped */
|
|
|
|
} XenPTMSI;
|
|
|
|
|
|
|
|
typedef struct XenPTMSIXEntry {
|
|
|
|
int pirq;
|
|
|
|
uint64_t addr;
|
|
|
|
uint32_t data;
|
2015-12-09 18:45:29 +03:00
|
|
|
uint32_t latch[4];
|
2012-06-21 19:42:35 +04:00
|
|
|
bool updated; /* indicate whether MSI ADDR or DATA is updated */
|
|
|
|
} XenPTMSIXEntry;
|
|
|
|
typedef struct XenPTMSIX {
|
|
|
|
uint32_t ctrl_offset;
|
|
|
|
bool enabled;
|
2015-12-09 18:45:29 +03:00
|
|
|
bool maskall;
|
2012-06-21 19:42:35 +04:00
|
|
|
int total_entries;
|
|
|
|
int bar_index;
|
|
|
|
uint64_t table_base;
|
|
|
|
uint32_t table_offset_adjust; /* page align mmap */
|
|
|
|
uint64_t mmio_base_addr;
|
|
|
|
MemoryRegion mmio;
|
|
|
|
void *phys_iomem_base;
|
misc: Replace zero-length arrays with flexible array member (automatic)
Description copied from Linux kernel commit from Gustavo A. R. Silva
(see [3]):
--v-- description start --v--
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to
declare variable-length types such as these ones is a flexible
array member [1], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler
warning in case the flexible array does not occur last in the
structure, which will help us prevent some kind of undefined
behavior bugs from being unadvertenly introduced [2] to the
Linux codebase from now on.
--^-- description end --^--
Do the similar housekeeping in the QEMU codebase (which uses
C99 since commit 7be41675f7cb).
All these instances of code were found with the help of the
following Coccinelle script:
@@
identifier s, m, a;
type t, T;
@@
struct s {
...
t m;
- T a[0];
+ T a[];
};
@@
identifier s, m, a;
type t, T;
@@
struct s {
...
t m;
- T a[0];
+ T a[];
} QEMU_PACKED;
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76497732932f
[3] https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?id=17642a2fbd2c1
Inspired-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-04 18:38:15 +03:00
|
|
|
XenPTMSIXEntry msix_entry[];
|
2012-06-21 19:42:35 +04:00
|
|
|
} XenPTMSIX;
|
2012-06-21 19:40:09 +04:00
|
|
|
|
|
|
|
struct XenPCIPassthroughState {
|
|
|
|
PCIDevice dev;
|
|
|
|
|
|
|
|
PCIHostDeviceAddress hostaddr;
|
|
|
|
bool is_virtfn;
|
2015-06-02 18:07:01 +03:00
|
|
|
bool permissive;
|
|
|
|
bool permissive_warned;
|
2012-06-21 19:40:09 +04:00
|
|
|
XenHostPCIDevice real_device;
|
|
|
|
XenPTRegion bases[PCI_NUM_REGIONS]; /* Access regions */
|
|
|
|
QLIST_HEAD(, XenPTRegGroup) reg_grps;
|
|
|
|
|
|
|
|
uint32_t machine_irq;
|
|
|
|
|
2012-06-21 19:42:35 +04:00
|
|
|
XenPTMSI *msi;
|
|
|
|
XenPTMSIX *msix;
|
|
|
|
|
2012-06-21 19:40:09 +04:00
|
|
|
MemoryRegion bar[PCI_NUM_REGIONS - 1];
|
|
|
|
MemoryRegion rom;
|
|
|
|
|
|
|
|
MemoryListener memory_listener;
|
2012-10-01 00:21:11 +04:00
|
|
|
MemoryListener io_listener;
|
2015-09-08 23:21:29 +03:00
|
|
|
bool listener_set;
|
2012-06-21 19:40:09 +04:00
|
|
|
};
|
|
|
|
|
2016-01-17 15:13:14 +03:00
|
|
|
void xen_pt_config_init(XenPCIPassthroughState *s, Error **errp);
|
2012-06-21 19:40:09 +04:00
|
|
|
void xen_pt_config_delete(XenPCIPassthroughState *s);
|
|
|
|
XenPTRegGroup *xen_pt_find_reg_grp(XenPCIPassthroughState *s, uint32_t address);
|
|
|
|
XenPTReg *xen_pt_find_reg(XenPTRegGroup *reg_grp, uint32_t address);
|
|
|
|
int xen_pt_bar_offset_to_index(uint32_t offset);
|
|
|
|
|
|
|
|
static inline pcibus_t xen_pt_get_emul_size(XenPTBarFlag flag, pcibus_t r_size)
|
|
|
|
{
|
|
|
|
/* align resource size (memory type only) */
|
|
|
|
if (flag == XEN_PT_BAR_FLAG_MEM) {
|
|
|
|
return (r_size + XC_PAGE_SIZE - 1) & XC_PAGE_MASK;
|
|
|
|
} else {
|
|
|
|
return r_size;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* INTx */
|
|
|
|
/* The PCI Local Bus Specification, Rev. 3.0,
|
|
|
|
* Section 6.2.4 Miscellaneous Registers, pp 223
|
|
|
|
* outlines 5 valid values for the interrupt pin (intx).
|
|
|
|
* 0: For devices (or device functions) that don't use an interrupt in
|
|
|
|
* 1: INTA#
|
|
|
|
* 2: INTB#
|
|
|
|
* 3: INTC#
|
|
|
|
* 4: INTD#
|
|
|
|
*
|
|
|
|
* Xen uses the following 4 values for intx
|
|
|
|
* 0: INTA#
|
|
|
|
* 1: INTB#
|
|
|
|
* 2: INTC#
|
|
|
|
* 3: INTD#
|
|
|
|
*
|
|
|
|
* Observing that these list of values are not the same, xen_pt_pci_read_intx()
|
|
|
|
* uses the following mapping from hw to xen values.
|
|
|
|
* This seems to reflect the current usage within Xen.
|
|
|
|
*
|
|
|
|
* PCI hardware | Xen | Notes
|
|
|
|
* ----------------+-----+----------------------------------------------------
|
|
|
|
* 0 | 0 | No interrupt
|
|
|
|
* 1 | 0 | INTA#
|
|
|
|
* 2 | 1 | INTB#
|
|
|
|
* 3 | 2 | INTC#
|
|
|
|
* 4 | 3 | INTD#
|
|
|
|
* any other value | 0 | This should never happen, log error message
|
|
|
|
*/
|
|
|
|
|
|
|
|
static inline uint8_t xen_pt_pci_read_intx(XenPCIPassthroughState *s)
|
|
|
|
{
|
|
|
|
uint8_t v = 0;
|
|
|
|
xen_host_pci_get_byte(&s->real_device, PCI_INTERRUPT_PIN, &v);
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline uint8_t xen_pt_pci_intx(XenPCIPassthroughState *s)
|
|
|
|
{
|
|
|
|
uint8_t r_val = xen_pt_pci_read_intx(s);
|
|
|
|
|
|
|
|
XEN_PT_LOG(&s->dev, "intx=%i\n", r_val);
|
|
|
|
if (r_val < 1 || r_val > 4) {
|
|
|
|
XEN_PT_LOG(&s->dev, "Interrupt pin read from hardware is out of range:"
|
|
|
|
" value=%i, acceptable range is 1 - 4\n", r_val);
|
|
|
|
r_val = 0;
|
|
|
|
} else {
|
2015-09-08 23:21:29 +03:00
|
|
|
/* Note that if s.real_device.config_fd is closed we make 0xff. */
|
2012-06-21 19:40:09 +04:00
|
|
|
r_val -= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return r_val;
|
|
|
|
}
|
|
|
|
|
2012-06-21 19:42:35 +04:00
|
|
|
/* MSI/MSI-X */
|
|
|
|
int xen_pt_msi_setup(XenPCIPassthroughState *s);
|
|
|
|
int xen_pt_msi_update(XenPCIPassthroughState *d);
|
|
|
|
void xen_pt_msi_disable(XenPCIPassthroughState *s);
|
|
|
|
|
|
|
|
int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base);
|
|
|
|
void xen_pt_msix_delete(XenPCIPassthroughState *s);
|
2015-10-11 18:19:24 +03:00
|
|
|
void xen_pt_msix_unmap(XenPCIPassthroughState *s);
|
2012-06-21 19:42:35 +04:00
|
|
|
int xen_pt_msix_update(XenPCIPassthroughState *s);
|
|
|
|
int xen_pt_msix_update_remap(XenPCIPassthroughState *s, int bar_index);
|
|
|
|
void xen_pt_msix_disable(XenPCIPassthroughState *s);
|
|
|
|
|
|
|
|
static inline bool xen_pt_has_msix_mapping(XenPCIPassthroughState *s, int bar)
|
|
|
|
{
|
|
|
|
return s->msix && s->msix->bar_index == bar;
|
|
|
|
}
|
|
|
|
|
2015-07-15 08:37:46 +03:00
|
|
|
extern void *pci_assign_dev_load_option_rom(PCIDevice *dev,
|
2018-06-22 15:28:42 +03:00
|
|
|
int *size,
|
2015-07-15 08:37:46 +03:00
|
|
|
unsigned int domain,
|
|
|
|
unsigned int bus, unsigned int slot,
|
|
|
|
unsigned int function);
|
2015-07-15 08:37:45 +03:00
|
|
|
static inline bool is_igd_vga_passthrough(XenHostPCIDevice *dev)
|
|
|
|
{
|
2020-06-03 19:04:42 +03:00
|
|
|
return (xen_igd_gfx_pt_enabled()
|
2015-07-15 08:37:45 +03:00
|
|
|
&& ((dev->class_code >> 0x8) == PCI_CLASS_DISPLAY_VGA));
|
|
|
|
}
|
|
|
|
int xen_pt_register_vga_regions(XenHostPCIDevice *dev);
|
|
|
|
int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev);
|
2016-01-17 15:13:13 +03:00
|
|
|
void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev,
|
|
|
|
Error **errp);
|
2016-06-29 16:29:06 +03:00
|
|
|
#endif /* XEN_PT_H */
|