2006-06-26 02:28:15 +04:00
|
|
|
/*
|
|
|
|
* CFI parallel flash with AMD command set emulation
|
2007-09-17 01:08:06 +04:00
|
|
|
*
|
2006-06-26 02:28:15 +04:00
|
|
|
* Copyright (c) 2005 Jocelyn Mayer
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
2020-10-23 15:30:34 +03:00
|
|
|
* version 2.1 of the License, or (at your option) any later version.
|
2006-06-26 02:28:15 +04:00
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
2009-07-17 00:47:01 +04:00
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
2006-06-26 02:28:15 +04:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* For now, this code can emulate flashes of 1, 2 or 4 bytes width.
|
|
|
|
* Supported commands/modes are:
|
|
|
|
* - flash read
|
|
|
|
* - flash write
|
|
|
|
* - flash ID read
|
|
|
|
* - sector erase
|
|
|
|
* - chip erase
|
|
|
|
* - unlock bypass command
|
|
|
|
* - CFI queries
|
|
|
|
*
|
|
|
|
* It does not support flash interleaving.
|
|
|
|
* It does not implement software data protection as found in many real chips
|
|
|
|
*/
|
|
|
|
|
2016-01-18 21:01:42 +03:00
|
|
|
#include "qemu/osdep.h"
|
pflash: Require backend size to match device, improve errors
We reject undersized backends with a rather enigmatic "failed to read
the initial flash content" error. For instance:
$ qemu-system-ppc64 -S -display none -M sam460ex -drive if=pflash,format=raw,file=eins.img
qemu-system-ppc64: Initialization of device cfi.pflash02 failed: failed to read the initial flash content
We happily accept oversized images, ignoring their tail. Throwing
away parts of firmware that way is pretty much certain to end in an
even more enigmatic failure to boot.
Require the backend's size to match the device's size exactly. Report
mismatch like this:
qemu-system-ppc64: Initialization of device cfi.pflash01 failed: device requires 1048576 bytes, block backend provides 512 bytes
Improve the error for actual read failures to "can't read block
backend".
To avoid duplicating even more code between the two pflash device
models, do all that in new helper blk_check_size_and_read_all().
The error reporting can still be confusing. For instance:
qemu-system-ppc64 -S -display none -M taihu -drive if=pflash,format=raw,file=eins.img -drive if=pflash,unit=1,format=raw,file=zwei.img
qemu-system-ppc64: Initialization of device cfi.pflash02 failed: device requires 2097152 bytes, block backend provides 512 bytes
Leaves the user guessing which of the two -drive is wrong. Mention
the issue in a TODO comment.
Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190319163551.32499-2-armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-03-19 19:35:50 +03:00
|
|
|
#include "hw/block/block.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/block/flash.h"
|
2019-08-12 08:23:51 +03:00
|
|
|
#include "hw/qdev-properties.h"
|
2020-12-12 01:05:12 +03:00
|
|
|
#include "hw/qdev-properties-system.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 11:01:28 +03:00
|
|
|
#include "qapi/error.h"
|
2020-04-08 03:35:52 +03:00
|
|
|
#include "qemu/error-report.h"
|
2019-04-26 19:26:23 +03:00
|
|
|
#include "qemu/bitmap.h"
|
2012-12-17 21:20:00 +04:00
|
|
|
#include "qemu/timer.h"
|
2014-10-07 15:59:18 +04:00
|
|
|
#include "sysemu/block-backend.h"
|
2012-12-17 21:20:00 +04:00
|
|
|
#include "qemu/host-utils.h"
|
2019-05-23 17:35:07 +03:00
|
|
|
#include "qemu/module.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/sysbus.h"
|
2019-08-12 08:23:45 +03:00
|
|
|
#include "migration/vmstate.h"
|
2018-06-21 20:12:57 +03:00
|
|
|
#include "trace.h"
|
2006-06-26 02:28:15 +04:00
|
|
|
|
2011-04-10 14:53:39 +04:00
|
|
|
#define PFLASH_LAZY_ROMD_THRESHOLD 42
|
|
|
|
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
/*
|
|
|
|
* The size of the cfi_table indirectly depends on this and the start of the
|
|
|
|
* PRI table directly depends on it. 4 is the maximum size (and also what
|
|
|
|
* seems common) without changing the PRT table address.
|
|
|
|
*/
|
|
|
|
#define PFLASH_MAX_ERASE_REGIONS 4
|
|
|
|
|
2019-05-05 23:42:08 +03:00
|
|
|
/* Special write cycles for CFI queries. */
|
|
|
|
enum {
|
|
|
|
WCYCLE_CFI = 7,
|
2019-04-26 19:26:20 +03:00
|
|
|
WCYCLE_AUTOSELECT_CFI = 8,
|
2019-05-05 23:42:08 +03:00
|
|
|
};
|
|
|
|
|
2019-03-08 12:45:56 +03:00
|
|
|
struct PFlashCFI02 {
|
2013-07-01 14:18:28 +04:00
|
|
|
/*< private >*/
|
|
|
|
SysBusDevice parent_obj;
|
|
|
|
/*< public >*/
|
|
|
|
|
2014-10-07 15:59:18 +04:00
|
|
|
BlockBackend *blk;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
uint32_t uniform_nb_blocs;
|
|
|
|
uint32_t uniform_sector_len;
|
2019-04-26 19:26:23 +03:00
|
|
|
uint32_t total_sectors;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
uint32_t nb_blocs[PFLASH_MAX_ERASE_REGIONS];
|
|
|
|
uint32_t sector_len[PFLASH_MAX_ERASE_REGIONS];
|
2008-04-17 03:45:36 +04:00
|
|
|
uint32_t chip_len;
|
2012-10-30 11:45:11 +04:00
|
|
|
uint8_t mappings;
|
|
|
|
uint8_t width;
|
|
|
|
uint8_t be;
|
2006-06-26 02:28:15 +04:00
|
|
|
int wcycle; /* if 0, the flash is read normally */
|
|
|
|
int bypass;
|
|
|
|
int ro;
|
|
|
|
uint8_t cmd;
|
|
|
|
uint8_t status;
|
2012-10-30 11:45:11 +04:00
|
|
|
/* FIXME: implement array device properties */
|
|
|
|
uint16_t ident0;
|
|
|
|
uint16_t ident1;
|
|
|
|
uint16_t ident2;
|
|
|
|
uint16_t ident3;
|
|
|
|
uint16_t unlock_addr0;
|
|
|
|
uint16_t unlock_addr1;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
uint8_t cfi_table[0x4d];
|
2019-02-19 18:37:27 +03:00
|
|
|
QEMUTimer timer;
|
2021-03-09 18:24:50 +03:00
|
|
|
/*
|
|
|
|
* The device replicates the flash memory across its memory space. Emulate
|
2011-08-04 16:55:30 +04:00
|
|
|
* that by having a container (.mem) filled with an array of aliases
|
|
|
|
* (.mem_mappings) pointing to the flash memory (.orig_mem).
|
|
|
|
*/
|
|
|
|
MemoryRegion mem;
|
|
|
|
MemoryRegion *mem_mappings; /* array; one per mapping */
|
|
|
|
MemoryRegion orig_mem;
|
2021-03-10 02:16:56 +03:00
|
|
|
bool rom_mode;
|
2011-04-10 14:53:39 +04:00
|
|
|
int read_counter; /* used for lazy switch-back to rom mode */
|
2019-04-26 19:26:22 +03:00
|
|
|
int sectors_to_erase;
|
2019-04-26 19:26:23 +03:00
|
|
|
uint64_t erase_time_remaining;
|
|
|
|
unsigned long *sector_erase_map;
|
2012-10-30 11:45:11 +04:00
|
|
|
char *name;
|
2006-06-26 02:28:15 +04:00
|
|
|
void *storage;
|
|
|
|
};
|
|
|
|
|
2019-05-01 19:14:25 +03:00
|
|
|
/*
|
|
|
|
* Toggle status bit DQ7.
|
|
|
|
*/
|
|
|
|
static inline void toggle_dq7(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
pfl->status ^= 0x80;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set status bit DQ7 to bit 7 of value.
|
|
|
|
*/
|
|
|
|
static inline void set_dq7(PFlashCFI02 *pfl, uint8_t value)
|
|
|
|
{
|
|
|
|
pfl->status &= 0x7F;
|
|
|
|
pfl->status |= value & 0x80;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Toggle status bit DQ6.
|
|
|
|
*/
|
|
|
|
static inline void toggle_dq6(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
pfl->status ^= 0x40;
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:22 +03:00
|
|
|
/*
|
|
|
|
* Turn on DQ3.
|
|
|
|
*/
|
|
|
|
static inline void assert_dq3(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
pfl->status |= 0x08;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Turn off DQ3.
|
|
|
|
*/
|
|
|
|
static inline void reset_dq3(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
pfl->status &= ~0x08;
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:23 +03:00
|
|
|
/*
|
|
|
|
* Toggle status bit DQ2.
|
|
|
|
*/
|
|
|
|
static inline void toggle_dq2(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
pfl->status ^= 0x04;
|
|
|
|
}
|
|
|
|
|
2011-08-04 16:55:30 +04:00
|
|
|
/*
|
|
|
|
* Set up replicated mappings of the same region.
|
|
|
|
*/
|
2019-03-08 12:45:56 +03:00
|
|
|
static void pflash_setup_mappings(PFlashCFI02 *pfl)
|
2011-08-04 16:55:30 +04:00
|
|
|
{
|
2011-08-04 16:55:30 +04:00
|
|
|
unsigned i;
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr size = memory_region_size(&pfl->orig_mem);
|
2011-08-04 16:55:30 +04:00
|
|
|
|
2013-06-07 05:25:08 +04:00
|
|
|
memory_region_init(&pfl->mem, OBJECT(pfl), "pflash", pfl->mappings * size);
|
2011-08-04 16:55:30 +04:00
|
|
|
pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings);
|
|
|
|
for (i = 0; i < pfl->mappings; ++i) {
|
2013-06-07 05:25:08 +04:00
|
|
|
memory_region_init_alias(&pfl->mem_mappings[i], OBJECT(pfl),
|
|
|
|
"pflash-alias", &pfl->orig_mem, 0, size);
|
2011-08-04 16:55:30 +04:00
|
|
|
memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]);
|
|
|
|
}
|
2021-03-10 02:16:56 +03:00
|
|
|
pfl->rom_mode = true;
|
2011-08-04 16:55:30 +04:00
|
|
|
}
|
2011-08-25 23:39:18 +04:00
|
|
|
|
2021-03-10 02:27:18 +03:00
|
|
|
static void pflash_reset_state_machine(PFlashCFI02 *pfl)
|
2011-08-04 16:55:30 +04:00
|
|
|
{
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_reset(pfl->name);
|
2021-03-10 02:21:44 +03:00
|
|
|
pfl->cmd = 0x00;
|
|
|
|
pfl->wcycle = 0;
|
2021-03-10 02:27:18 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static void pflash_mode_read_array(PFlashCFI02 *pfl)
|
|
|
|
{
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_mode_read_array(pfl->name);
|
2021-03-10 02:27:18 +03:00
|
|
|
pflash_reset_state_machine(pfl);
|
2021-03-10 02:21:44 +03:00
|
|
|
pfl->rom_mode = true;
|
|
|
|
memory_region_rom_device_set_romd(&pfl->orig_mem, true);
|
2008-04-17 03:45:36 +04:00
|
|
|
}
|
|
|
|
|
2019-05-18 21:57:02 +03:00
|
|
|
static size_t pflash_regions_count(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
return pfl->cfi_table[0x2c];
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:23 +03:00
|
|
|
/*
|
|
|
|
* Returns the time it takes to erase the number of sectors scheduled for
|
|
|
|
* erasure based on CFI address 0x21 which is "Typical timeout per individual
|
|
|
|
* block erase 2^N ms."
|
|
|
|
*/
|
|
|
|
static uint64_t pflash_erase_time(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* If there are no sectors to erase (which can happen if all of the sectors
|
|
|
|
* to be erased are protected), then erase takes 100 us. Protected sectors
|
|
|
|
* aren't supported so this should never happen.
|
|
|
|
*/
|
|
|
|
return ((1ULL << pfl->cfi_table[0x21]) * pfl->sectors_to_erase) * SCALE_US;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Returns true if the device is currently in erase suspend mode.
|
|
|
|
*/
|
|
|
|
static inline bool pflash_erase_suspend_mode(PFlashCFI02 *pfl)
|
|
|
|
{
|
|
|
|
return pfl->erase_time_remaining > 0;
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:22 +03:00
|
|
|
static void pflash_timer(void *opaque)
|
2006-06-26 02:28:15 +04:00
|
|
|
{
|
2019-03-08 12:45:56 +03:00
|
|
|
PFlashCFI02 *pfl = opaque;
|
2006-06-26 02:28:15 +04:00
|
|
|
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_timer_expired(pfl->name, pfl->cmd);
|
2019-04-26 19:26:22 +03:00
|
|
|
if (pfl->cmd == 0x30) {
|
|
|
|
/*
|
|
|
|
* Sector erase. If DQ3 is 0 when the timer expires, then the 50
|
|
|
|
* us erase timeout has expired so we need to start the timer for the
|
|
|
|
* sector erase algorithm. Otherwise, the erase completed and we should
|
|
|
|
* go back to read array mode.
|
|
|
|
*/
|
|
|
|
if ((pfl->status & 0x08) == 0) {
|
|
|
|
assert_dq3(pfl);
|
2019-04-26 19:26:23 +03:00
|
|
|
uint64_t timeout = pflash_erase_time(pfl);
|
2019-04-26 19:26:22 +03:00
|
|
|
timer_mod(&pfl->timer,
|
|
|
|
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout);
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_erase_timeout(pfl->name, pfl->sectors_to_erase);
|
2019-04-26 19:26:22 +03:00
|
|
|
return;
|
|
|
|
}
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_erase_complete(pfl->name);
|
2019-04-26 19:26:23 +03:00
|
|
|
bitmap_zero(pfl->sector_erase_map, pfl->total_sectors);
|
2019-04-26 19:26:22 +03:00
|
|
|
pfl->sectors_to_erase = 0;
|
|
|
|
reset_dq3(pfl);
|
|
|
|
}
|
|
|
|
|
2006-06-26 02:28:15 +04:00
|
|
|
/* Reset flash */
|
2019-05-01 19:14:25 +03:00
|
|
|
toggle_dq7(pfl);
|
2006-06-26 02:28:15 +04:00
|
|
|
if (pfl->bypass) {
|
|
|
|
pfl->wcycle = 2;
|
2021-03-10 02:21:44 +03:00
|
|
|
pfl->cmd = 0;
|
2006-06-26 02:28:15 +04:00
|
|
|
} else {
|
2021-03-10 02:21:44 +03:00
|
|
|
pflash_mode_read_array(pfl);
|
2006-06-26 02:28:15 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-05-06 00:24:51 +03:00
|
|
|
/*
|
|
|
|
* Read data from flash.
|
|
|
|
*/
|
|
|
|
static uint64_t pflash_data_read(PFlashCFI02 *pfl, hwaddr offset,
|
|
|
|
unsigned int width)
|
|
|
|
{
|
|
|
|
uint8_t *p = (uint8_t *)pfl->storage + offset;
|
|
|
|
uint64_t ret = pfl->be ? ldn_be_p(p, width) : ldn_le_p(p, width);
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_data_read(pfl->name, offset, width, ret);
|
2019-05-06 00:24:51 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:23 +03:00
|
|
|
typedef struct {
|
|
|
|
uint32_t len;
|
|
|
|
uint32_t num;
|
|
|
|
} SectorInfo;
|
|
|
|
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
/*
|
|
|
|
* offset should be a byte offset of the QEMU device and _not_ a device
|
|
|
|
* offset.
|
|
|
|
*/
|
2019-04-26 19:26:23 +03:00
|
|
|
static SectorInfo pflash_sector_info(PFlashCFI02 *pfl, hwaddr offset)
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
{
|
|
|
|
assert(offset < pfl->chip_len);
|
|
|
|
hwaddr addr = 0;
|
2019-04-26 19:26:23 +03:00
|
|
|
uint32_t sector_num = 0;
|
2019-05-18 21:57:02 +03:00
|
|
|
for (int i = 0; i < pflash_regions_count(pfl); ++i) {
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
uint64_t region_size = (uint64_t)pfl->nb_blocs[i] * pfl->sector_len[i];
|
|
|
|
if (addr <= offset && offset < addr + region_size) {
|
2019-04-26 19:26:23 +03:00
|
|
|
return (SectorInfo) {
|
|
|
|
.len = pfl->sector_len[i],
|
|
|
|
.num = sector_num + (offset - addr) / pfl->sector_len[i],
|
|
|
|
};
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
}
|
2019-04-26 19:26:23 +03:00
|
|
|
sector_num += pfl->nb_blocs[i];
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
addr += region_size;
|
|
|
|
}
|
|
|
|
abort();
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:23 +03:00
|
|
|
/*
|
|
|
|
* Returns true if the offset refers to a flash sector that is currently being
|
|
|
|
* erased.
|
|
|
|
*/
|
|
|
|
static bool pflash_sector_is_erasing(PFlashCFI02 *pfl, hwaddr offset)
|
|
|
|
{
|
|
|
|
long sector_num = pflash_sector_info(pfl, offset).num;
|
|
|
|
return test_bit(sector_num, pfl->sector_erase_map);
|
|
|
|
}
|
|
|
|
|
2019-05-01 19:15:56 +03:00
|
|
|
static uint64_t pflash_read(void *opaque, hwaddr offset, unsigned int width)
|
2006-06-26 02:28:15 +04:00
|
|
|
{
|
2019-05-01 19:15:56 +03:00
|
|
|
PFlashCFI02 *pfl = opaque;
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr boff;
|
2019-05-01 19:15:56 +03:00
|
|
|
uint64_t ret;
|
2006-06-26 02:28:15 +04:00
|
|
|
|
2011-04-10 14:53:39 +04:00
|
|
|
/* Lazy reset to ROMD mode after a certain amount of read accesses */
|
|
|
|
if (!pfl->rom_mode && pfl->wcycle == 0 &&
|
|
|
|
++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) {
|
2021-03-10 02:21:44 +03:00
|
|
|
pflash_mode_read_array(pfl);
|
2008-06-09 04:20:13 +04:00
|
|
|
}
|
2008-04-17 03:45:36 +04:00
|
|
|
offset &= pfl->chip_len - 1;
|
2006-06-26 02:28:15 +04:00
|
|
|
boff = offset & 0xFF;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
if (pfl->width == 2) {
|
2006-06-26 02:28:15 +04:00
|
|
|
boff = boff >> 1;
|
Revert "hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit"
This reverts commit 3ae0343db69c379beb5750b4ed70794bbed51b85.
Stephen Checkoway noticed commit 3ae0343db69 is incorrect.
This commit state all parallel flashes are limited to 16-bit
accesses, however the x32 configuration exists in some models,
such the Cypress S29CL032J, which CFI Device Geometry Definition
announces:
CFI ADDR DATA
0x28,0x29 = 0x0003 (x32-only asynchronous interface)
Guests should not be affected by the previous change, because
QEMU does not announce itself as x32 capable:
/* Flash device interface (8 & 16 bits) */
pfl->cfi_table[0x28] = 0x02;
pfl->cfi_table[0x29] = 0x00;
Commit 3ae0343db69 does not restrict the bus to 16-bit accesses,
but restrict the implementation as 16-bit access max, so a guest
32-bit access will result in 2x 16-bit calls.
Now, we have 2 boards that register the flash device in 32-bit
access:
- PPC: taihu_405ep
The CFI id matches the S29AL008J that is a 1MB in x16, while
the code QEMU forces it to be 2MB, and checking Linux it expects
a 4MB flash.
- ARM: Digic4
While the comment says "Samsung K8P3215UQB 64M Bit (4Mx16)",
this flash is 32Mb (2MB). Also note the CFI id does not match
the comment.
To avoid unexpected side effect, we revert commit 3ae0343db69,
and will clean the board code later.
Reported-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-04 15:12:21 +03:00
|
|
|
} else if (pfl->width == 4) {
|
|
|
|
boff = boff >> 2;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
}
|
2006-06-26 02:28:15 +04:00
|
|
|
switch (pfl->cmd) {
|
|
|
|
default:
|
|
|
|
/* This should never happen : reset state & treat it as a read*/
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_read_unknown_state(pfl->name, pfl->cmd);
|
2021-03-10 02:27:18 +03:00
|
|
|
pflash_reset_state_machine(pfl);
|
2013-01-21 16:50:54 +04:00
|
|
|
/* fall through to the read code */
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x80: /* Erase (unlock) */
|
2006-06-26 02:28:15 +04:00
|
|
|
/* We accept reads during second unlock sequence... */
|
|
|
|
case 0x00:
|
2019-04-26 19:26:23 +03:00
|
|
|
if (pflash_erase_suspend_mode(pfl) &&
|
|
|
|
pflash_sector_is_erasing(pfl, offset)) {
|
|
|
|
/* Toggle bit 2, but not 6. */
|
|
|
|
toggle_dq2(pfl);
|
|
|
|
/* Status register read */
|
|
|
|
ret = pfl->status;
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_read_status(pfl->name, ret);
|
2019-04-26 19:26:23 +03:00
|
|
|
break;
|
|
|
|
}
|
2006-06-26 02:28:15 +04:00
|
|
|
/* Flash area read */
|
2019-05-06 00:24:51 +03:00
|
|
|
ret = pflash_data_read(pfl, offset, width);
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x90: /* flash ID read */
|
2006-06-26 02:28:15 +04:00
|
|
|
switch (boff) {
|
|
|
|
case 0x00:
|
|
|
|
case 0x01:
|
2012-10-30 11:45:11 +04:00
|
|
|
ret = boff & 0x01 ? pfl->ident1 : pfl->ident0;
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
case 0x02:
|
|
|
|
ret = 0x00; /* Pretend all sectors are unprotected */
|
|
|
|
break;
|
|
|
|
case 0x0E:
|
|
|
|
case 0x0F:
|
2012-10-30 11:45:11 +04:00
|
|
|
ret = boff & 0x01 ? pfl->ident3 : pfl->ident2;
|
2019-05-06 00:04:48 +03:00
|
|
|
if (ret != (uint8_t)-1) {
|
|
|
|
break;
|
2012-10-30 11:45:11 +04:00
|
|
|
}
|
2019-05-06 00:04:48 +03:00
|
|
|
/* Fall through to data read. */
|
2006-06-26 02:28:15 +04:00
|
|
|
default:
|
2019-05-06 00:24:51 +03:00
|
|
|
ret = pflash_data_read(pfl, offset, width);
|
2006-06-26 02:28:15 +04:00
|
|
|
}
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_read_done(pfl->name, boff, ret);
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x10: /* Chip Erase */
|
|
|
|
case 0x30: /* Sector Erase */
|
2019-04-26 19:26:23 +03:00
|
|
|
/* Toggle bit 2 during erase, but not program. */
|
|
|
|
toggle_dq2(pfl);
|
2019-07-11 15:52:46 +03:00
|
|
|
/* fall through */
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0xA0: /* Program */
|
2019-04-26 19:26:23 +03:00
|
|
|
/* Toggle bit 6 */
|
|
|
|
toggle_dq6(pfl);
|
2006-06-26 02:28:15 +04:00
|
|
|
/* Status register read */
|
|
|
|
ret = pfl->status;
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_read_status(pfl->name, ret);
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
case 0x98:
|
|
|
|
/* CFI query mode */
|
2018-04-05 02:32:38 +03:00
|
|
|
if (boff < sizeof(pfl->cfi_table)) {
|
2006-06-26 02:28:15 +04:00
|
|
|
ret = pfl->cfi_table[boff];
|
2018-04-05 02:32:38 +03:00
|
|
|
} else {
|
|
|
|
ret = 0;
|
|
|
|
}
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
}
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_io_read(pfl->name, offset, width, ret, pfl->cmd, pfl->wcycle);
|
2006-06-26 02:28:15 +04:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* update flash content on disk */
|
2019-05-01 19:15:56 +03:00
|
|
|
static void pflash_update(PFlashCFI02 *pfl, int offset, int size)
|
2006-06-26 02:28:15 +04:00
|
|
|
{
|
|
|
|
int offset_end;
|
2020-04-08 03:35:52 +03:00
|
|
|
int ret;
|
2014-10-07 15:59:18 +04:00
|
|
|
if (pfl->blk) {
|
2006-06-26 02:28:15 +04:00
|
|
|
offset_end = offset + size;
|
2016-05-06 19:26:38 +03:00
|
|
|
/* widen to sector boundaries */
|
|
|
|
offset = QEMU_ALIGN_DOWN(offset, BDRV_SECTOR_SIZE);
|
|
|
|
offset_end = QEMU_ALIGN_UP(offset_end, BDRV_SECTOR_SIZE);
|
2020-04-08 03:35:52 +03:00
|
|
|
ret = blk_pwrite(pfl->blk, offset, pfl->storage + offset,
|
2016-05-06 19:26:38 +03:00
|
|
|
offset_end - offset, 0);
|
2020-04-08 03:35:52 +03:00
|
|
|
if (ret < 0) {
|
|
|
|
/* TODO set error bit in status */
|
|
|
|
error_report("Could not update PFLASH: %s", strerror(-ret));
|
|
|
|
}
|
2006-06-26 02:28:15 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-04-26 19:26:22 +03:00
|
|
|
static void pflash_sector_erase(PFlashCFI02 *pfl, hwaddr offset)
|
|
|
|
{
|
2019-04-26 19:26:23 +03:00
|
|
|
SectorInfo sector_info = pflash_sector_info(pfl, offset);
|
|
|
|
uint64_t sector_len = sector_info.len;
|
2019-04-26 19:26:22 +03:00
|
|
|
offset &= ~(sector_len - 1);
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_sector_erase_start(pfl->name, pfl->width * 2, offset,
|
|
|
|
pfl->width * 2, offset + sector_len - 1);
|
2019-04-26 19:26:22 +03:00
|
|
|
if (!pfl->ro) {
|
|
|
|
uint8_t *p = pfl->storage;
|
|
|
|
memset(p + offset, 0xff, sector_len);
|
|
|
|
pflash_update(pfl, offset, sector_len);
|
|
|
|
}
|
|
|
|
set_dq7(pfl, 0x00);
|
|
|
|
++pfl->sectors_to_erase;
|
2019-04-26 19:26:23 +03:00
|
|
|
set_bit(sector_info.num, pfl->sector_erase_map);
|
2019-04-26 19:26:22 +03:00
|
|
|
/* Set (or reset) the 50 us timer for additional erase commands. */
|
|
|
|
timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 50000);
|
|
|
|
}
|
|
|
|
|
2019-05-01 19:15:56 +03:00
|
|
|
static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
|
|
|
|
unsigned int width)
|
2006-06-26 02:28:15 +04:00
|
|
|
{
|
2019-05-01 19:15:56 +03:00
|
|
|
PFlashCFI02 *pfl = opaque;
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr boff;
|
2006-06-26 02:28:15 +04:00
|
|
|
uint8_t *p;
|
|
|
|
uint8_t cmd;
|
|
|
|
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_io_write(pfl->name, offset, width, value, pfl->wcycle);
|
2007-04-16 11:14:26 +04:00
|
|
|
cmd = value;
|
2019-06-27 16:44:24 +03:00
|
|
|
if (pfl->cmd != 0xA0) {
|
2019-04-26 19:26:21 +03:00
|
|
|
/* Reset does nothing during chip erase and sector erase. */
|
|
|
|
if (cmd == 0xF0 && pfl->cmd != 0x10 && pfl->cmd != 0x30) {
|
2019-04-26 19:26:20 +03:00
|
|
|
if (pfl->wcycle == WCYCLE_AUTOSELECT_CFI) {
|
|
|
|
/* Return to autoselect mode. */
|
|
|
|
pfl->wcycle = 3;
|
|
|
|
pfl->cmd = 0x90;
|
|
|
|
return;
|
|
|
|
}
|
2019-06-27 16:44:24 +03:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
2007-04-16 11:14:26 +04:00
|
|
|
}
|
2008-04-17 03:45:36 +04:00
|
|
|
offset &= pfl->chip_len - 1;
|
2007-09-17 12:09:54 +04:00
|
|
|
|
2019-04-26 19:26:17 +03:00
|
|
|
boff = offset;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
if (pfl->width == 2) {
|
2006-06-26 02:28:15 +04:00
|
|
|
boff = boff >> 1;
|
Revert "hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit"
This reverts commit 3ae0343db69c379beb5750b4ed70794bbed51b85.
Stephen Checkoway noticed commit 3ae0343db69 is incorrect.
This commit state all parallel flashes are limited to 16-bit
accesses, however the x32 configuration exists in some models,
such the Cypress S29CL032J, which CFI Device Geometry Definition
announces:
CFI ADDR DATA
0x28,0x29 = 0x0003 (x32-only asynchronous interface)
Guests should not be affected by the previous change, because
QEMU does not announce itself as x32 capable:
/* Flash device interface (8 & 16 bits) */
pfl->cfi_table[0x28] = 0x02;
pfl->cfi_table[0x29] = 0x00;
Commit 3ae0343db69 does not restrict the bus to 16-bit accesses,
but restrict the implementation as 16-bit access max, so a guest
32-bit access will result in 2x 16-bit calls.
Now, we have 2 boards that register the flash device in 32-bit
access:
- PPC: taihu_405ep
The CFI id matches the S29AL008J that is a 1MB in x16, while
the code QEMU forces it to be 2MB, and checking Linux it expects
a 4MB flash.
- ARM: Digic4
While the comment says "Samsung K8P3215UQB 64M Bit (4Mx16)",
this flash is 32Mb (2MB). Also note the CFI id does not match
the comment.
To avoid unexpected side effect, we revert commit 3ae0343db69,
and will clean the board code later.
Reported-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-04 15:12:21 +03:00
|
|
|
} else if (pfl->width == 4) {
|
|
|
|
boff = boff >> 2;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
}
|
2019-04-26 19:26:17 +03:00
|
|
|
/* Only the least-significant 11 bits are used in most cases. */
|
|
|
|
boff &= 0x7FF;
|
2006-06-26 02:28:15 +04:00
|
|
|
switch (pfl->wcycle) {
|
|
|
|
case 0:
|
2008-04-17 03:58:02 +04:00
|
|
|
/* Set the device in I/O access mode if required */
|
2021-03-10 02:18:56 +03:00
|
|
|
if (pfl->rom_mode) {
|
|
|
|
pfl->rom_mode = false;
|
|
|
|
memory_region_rom_device_set_romd(&pfl->orig_mem, false);
|
|
|
|
}
|
2011-04-10 14:53:39 +04:00
|
|
|
pfl->read_counter = 0;
|
2006-06-26 02:28:15 +04:00
|
|
|
/* We're in read mode */
|
|
|
|
check_unlock0:
|
|
|
|
if (boff == 0x55 && cmd == 0x98) {
|
|
|
|
/* Enter CFI query mode */
|
2019-05-05 23:42:08 +03:00
|
|
|
pfl->wcycle = WCYCLE_CFI;
|
2006-06-26 02:28:15 +04:00
|
|
|
pfl->cmd = 0x98;
|
|
|
|
return;
|
|
|
|
}
|
2019-04-26 19:26:23 +03:00
|
|
|
/* Handle erase resume in erase suspend mode, otherwise reset. */
|
2019-05-18 22:22:03 +03:00
|
|
|
if (cmd == 0x30) { /* Erase Resume */
|
2019-04-26 19:26:23 +03:00
|
|
|
if (pflash_erase_suspend_mode(pfl)) {
|
|
|
|
/* Resume the erase. */
|
|
|
|
timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
|
|
|
|
pfl->erase_time_remaining);
|
|
|
|
pfl->erase_time_remaining = 0;
|
|
|
|
pfl->wcycle = 6;
|
|
|
|
pfl->cmd = 0x30;
|
|
|
|
set_dq7(pfl, 0x00);
|
|
|
|
assert_dq3(pfl);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
/* Ignore erase suspend. */
|
2019-05-18 22:22:03 +03:00
|
|
|
if (cmd == 0xB0) { /* Erase Suspend */
|
2019-04-26 19:26:23 +03:00
|
|
|
return;
|
|
|
|
}
|
2012-10-30 11:45:11 +04:00
|
|
|
if (boff != pfl->unlock_addr0 || cmd != 0xAA) {
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_unlock0_failed(pfl->name, boff,
|
|
|
|
cmd, pfl->unlock_addr0);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write(pfl->name, "unlock sequence started");
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
/* We started an unlock sequence */
|
|
|
|
check_unlock1:
|
2012-10-30 11:45:11 +04:00
|
|
|
if (boff != pfl->unlock_addr1 || cmd != 0x55) {
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_unlock1_failed(pfl->name, boff, cmd);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write(pfl->name, "unlock sequence done");
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
/* We finished an unlock sequence */
|
2012-10-30 11:45:11 +04:00
|
|
|
if (!pfl->bypass && boff != pfl->unlock_addr0) {
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_failed(pfl->name, boff, cmd);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
switch (cmd) {
|
|
|
|
case 0x20:
|
|
|
|
pfl->bypass = 1;
|
|
|
|
goto do_bypass;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x80: /* Erase */
|
|
|
|
case 0x90: /* Autoselect */
|
|
|
|
case 0xA0: /* Program */
|
2006-06-26 02:28:15 +04:00
|
|
|
pfl->cmd = cmd;
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_start(pfl->name, cmd);
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
default:
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_unknown(pfl->name, cmd);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
switch (pfl->cmd) {
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x80: /* Erase */
|
2006-06-26 02:28:15 +04:00
|
|
|
/* We need another unlock sequence */
|
|
|
|
goto check_unlock0;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0xA0: /* Program */
|
2019-04-26 19:26:23 +03:00
|
|
|
if (pflash_erase_suspend_mode(pfl) &&
|
|
|
|
pflash_sector_is_erasing(pfl, offset)) {
|
|
|
|
/* Ignore writes to erasing sectors. */
|
|
|
|
if (pfl->bypass) {
|
|
|
|
goto do_bypass;
|
|
|
|
}
|
|
|
|
goto reset_flash;
|
|
|
|
}
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_data_write(pfl->name, offset, width, value, 0);
|
2012-02-22 11:18:49 +04:00
|
|
|
if (!pfl->ro) {
|
2019-05-06 00:14:29 +03:00
|
|
|
p = (uint8_t *)pfl->storage + offset;
|
|
|
|
if (pfl->be) {
|
|
|
|
uint64_t current = ldn_be_p(p, width);
|
|
|
|
stn_be_p(p, width, current & value);
|
|
|
|
} else {
|
|
|
|
uint64_t current = ldn_le_p(p, width);
|
|
|
|
stn_le_p(p, width, current & value);
|
2010-03-29 23:23:55 +04:00
|
|
|
}
|
2019-05-06 00:14:29 +03:00
|
|
|
pflash_update(pfl, offset, width);
|
2006-06-26 02:28:15 +04:00
|
|
|
}
|
2019-05-01 19:14:25 +03:00
|
|
|
/*
|
|
|
|
* While programming, status bit DQ7 should hold the opposite
|
|
|
|
* value from how it was programmed.
|
|
|
|
*/
|
|
|
|
set_dq7(pfl, ~value);
|
2006-06-26 02:28:15 +04:00
|
|
|
/* Let's pretend write is immediate */
|
|
|
|
if (pfl->bypass)
|
|
|
|
goto do_bypass;
|
|
|
|
goto reset_flash;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x90: /* Autoselect */
|
2006-06-26 02:28:15 +04:00
|
|
|
if (pfl->bypass && cmd == 0x00) {
|
|
|
|
/* Unlock bypass reset */
|
|
|
|
goto reset_flash;
|
|
|
|
}
|
2019-04-26 19:26:20 +03:00
|
|
|
/*
|
|
|
|
* We can enter CFI query mode from autoselect mode, but we must
|
|
|
|
* return to autoselect mode after a reset.
|
|
|
|
*/
|
|
|
|
if (boff == 0x55 && cmd == 0x98) {
|
|
|
|
/* Enter autoselect CFI query mode */
|
|
|
|
pfl->wcycle = WCYCLE_AUTOSELECT_CFI;
|
|
|
|
pfl->cmd = 0x98;
|
|
|
|
return;
|
|
|
|
}
|
2019-07-19 15:40:48 +03:00
|
|
|
/* fall through */
|
2006-06-26 02:28:15 +04:00
|
|
|
default:
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_invalid(pfl->name, pfl->cmd);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
case 4:
|
|
|
|
switch (pfl->cmd) {
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0xA0: /* Program */
|
2011-04-28 19:20:38 +04:00
|
|
|
/* Ignore writes while flash data write is occurring */
|
2006-06-26 02:28:15 +04:00
|
|
|
/* As we suppose write is immediate, this should never happen */
|
|
|
|
return;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x80: /* Erase */
|
2006-06-26 02:28:15 +04:00
|
|
|
goto check_unlock1;
|
|
|
|
default:
|
|
|
|
/* Should never happen */
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_invalid_state(pfl->name, pfl->cmd, 5);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 5:
|
2019-04-26 19:26:23 +03:00
|
|
|
if (pflash_erase_suspend_mode(pfl)) {
|
|
|
|
/* Erasing is not supported in erase suspend mode. */
|
|
|
|
goto reset_flash;
|
|
|
|
}
|
2006-06-26 02:28:15 +04:00
|
|
|
switch (cmd) {
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x10: /* Chip Erase */
|
2012-10-30 11:45:11 +04:00
|
|
|
if (boff != pfl->unlock_addr0) {
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_chip_erase_invalid(pfl->name, offset);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
/* Chip erase */
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_chip_erase_start(pfl->name);
|
2012-02-22 11:18:49 +04:00
|
|
|
if (!pfl->ro) {
|
2019-05-18 15:45:35 +03:00
|
|
|
memset(pfl->storage, 0xff, pfl->chip_len);
|
2012-02-22 11:18:49 +04:00
|
|
|
pflash_update(pfl, 0, pfl->chip_len);
|
|
|
|
}
|
2019-05-01 19:14:25 +03:00
|
|
|
set_dq7(pfl, 0x00);
|
2019-04-26 19:26:24 +03:00
|
|
|
/* Wait the time specified at CFI address 0x22. */
|
2019-02-19 18:37:27 +03:00
|
|
|
timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
|
2019-04-26 19:26:24 +03:00
|
|
|
(1ULL << pfl->cfi_table[0x22]) * SCALE_MS);
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x30: /* Sector erase */
|
2019-04-26 19:26:22 +03:00
|
|
|
pflash_sector_erase(pfl, offset);
|
2006-06-26 02:28:15 +04:00
|
|
|
break;
|
|
|
|
default:
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_invalid_command(pfl->name, cmd);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
pfl->cmd = cmd;
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
switch (pfl->cmd) {
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x10: /* Chip Erase */
|
2006-06-26 02:28:15 +04:00
|
|
|
/* Ignore writes during chip erase */
|
|
|
|
return;
|
2019-05-18 22:22:03 +03:00
|
|
|
case 0x30: /* Sector erase */
|
2019-04-26 19:26:23 +03:00
|
|
|
if (cmd == 0xB0) {
|
|
|
|
/*
|
|
|
|
* If erase suspend happens during the erase timeout (so DQ3 is
|
|
|
|
* 0), then the device suspends erasing immediately. Set the
|
|
|
|
* remaining time to be the total time to erase. Otherwise,
|
|
|
|
* there is a maximum amount of time it can take to enter
|
|
|
|
* suspend mode. Let's ignore that and suspend immediately and
|
|
|
|
* set the remaining time to the actual time remaining on the
|
|
|
|
* timer.
|
|
|
|
*/
|
|
|
|
if ((pfl->status & 0x08) == 0) {
|
|
|
|
pfl->erase_time_remaining = pflash_erase_time(pfl);
|
|
|
|
} else {
|
|
|
|
int64_t delta = timer_expire_time_ns(&pfl->timer) -
|
|
|
|
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
|
|
|
/* Make sure we have a positive time remaining. */
|
|
|
|
pfl->erase_time_remaining = delta <= 0 ? 1 : delta;
|
|
|
|
}
|
|
|
|
reset_dq3(pfl);
|
|
|
|
timer_del(&pfl->timer);
|
2021-03-10 02:27:18 +03:00
|
|
|
pflash_reset_state_machine(pfl);
|
2019-04-26 19:26:23 +03:00
|
|
|
return;
|
|
|
|
}
|
2019-04-26 19:26:22 +03:00
|
|
|
/*
|
|
|
|
* If DQ3 is 0, additional sector erase commands can be
|
|
|
|
* written and anything else (other than an erase suspend) resets
|
|
|
|
* the device.
|
|
|
|
*/
|
|
|
|
if ((pfl->status & 0x08) == 0) {
|
|
|
|
if (cmd == 0x30) {
|
|
|
|
pflash_sector_erase(pfl, offset);
|
|
|
|
} else {
|
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* Ignore writes during the actual erase. */
|
2006-06-26 02:28:15 +04:00
|
|
|
return;
|
|
|
|
default:
|
|
|
|
/* Should never happen */
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write_invalid_state(pfl->name, pfl->cmd, 6);
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
break;
|
2019-05-05 23:42:08 +03:00
|
|
|
/* Special values for CFI queries */
|
|
|
|
case WCYCLE_CFI:
|
2019-04-26 19:26:20 +03:00
|
|
|
case WCYCLE_AUTOSELECT_CFI:
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write(pfl->name, "invalid write in CFI query mode");
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
default:
|
|
|
|
/* Should never happen */
|
2021-02-16 17:27:18 +03:00
|
|
|
trace_pflash_write(pfl->name, "invalid write state (wc 7)");
|
2006-06-26 02:28:15 +04:00
|
|
|
goto reset_flash;
|
|
|
|
}
|
|
|
|
pfl->wcycle++;
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* Reset flash */
|
|
|
|
reset_flash:
|
|
|
|
pfl->bypass = 0;
|
2021-03-10 02:27:18 +03:00
|
|
|
pflash_reset_state_machine(pfl);
|
2006-06-26 02:28:15 +04:00
|
|
|
return;
|
|
|
|
|
|
|
|
do_bypass:
|
|
|
|
pfl->wcycle = 2;
|
|
|
|
pfl->cmd = 0;
|
|
|
|
}
|
|
|
|
|
2019-05-01 19:15:56 +03:00
|
|
|
static const MemoryRegionOps pflash_cfi02_ops = {
|
|
|
|
.read = pflash_read,
|
|
|
|
.write = pflash_write,
|
2018-06-15 16:57:13 +03:00
|
|
|
.valid.min_access_size = 1,
|
|
|
|
.valid.max_access_size = 4,
|
2011-08-04 16:55:30 +04:00
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
2006-06-26 02:28:15 +04:00
|
|
|
};
|
|
|
|
|
2021-03-10 02:16:01 +03:00
|
|
|
static void pflash_cfi02_fill_cfi_table(PFlashCFI02 *pfl, int nb_regions)
|
|
|
|
{
|
|
|
|
/* Hardcoded CFI table (mostly from SG29 Spansion flash) */
|
|
|
|
const uint16_t pri_ofs = 0x40;
|
|
|
|
/* Standard "QRY" string */
|
|
|
|
pfl->cfi_table[0x10] = 'Q';
|
|
|
|
pfl->cfi_table[0x11] = 'R';
|
|
|
|
pfl->cfi_table[0x12] = 'Y';
|
|
|
|
/* Command set (AMD/Fujitsu) */
|
|
|
|
pfl->cfi_table[0x13] = 0x02;
|
|
|
|
pfl->cfi_table[0x14] = 0x00;
|
|
|
|
/* Primary extended table address */
|
|
|
|
pfl->cfi_table[0x15] = pri_ofs;
|
|
|
|
pfl->cfi_table[0x16] = pri_ofs >> 8;
|
|
|
|
/* Alternate command set (none) */
|
|
|
|
pfl->cfi_table[0x17] = 0x00;
|
|
|
|
pfl->cfi_table[0x18] = 0x00;
|
|
|
|
/* Alternate extended table (none) */
|
|
|
|
pfl->cfi_table[0x19] = 0x00;
|
|
|
|
pfl->cfi_table[0x1A] = 0x00;
|
|
|
|
/* Vcc min */
|
|
|
|
pfl->cfi_table[0x1B] = 0x27;
|
|
|
|
/* Vcc max */
|
|
|
|
pfl->cfi_table[0x1C] = 0x36;
|
|
|
|
/* Vpp min (no Vpp pin) */
|
|
|
|
pfl->cfi_table[0x1D] = 0x00;
|
|
|
|
/* Vpp max (no Vpp pin) */
|
|
|
|
pfl->cfi_table[0x1E] = 0x00;
|
|
|
|
/* Timeout per single byte/word write (128 ms) */
|
|
|
|
pfl->cfi_table[0x1F] = 0x07;
|
|
|
|
/* Timeout for min size buffer write (NA) */
|
|
|
|
pfl->cfi_table[0x20] = 0x00;
|
|
|
|
/* Typical timeout for block erase (512 ms) */
|
|
|
|
pfl->cfi_table[0x21] = 0x09;
|
|
|
|
/* Typical timeout for full chip erase (4096 ms) */
|
|
|
|
pfl->cfi_table[0x22] = 0x0C;
|
|
|
|
/* Reserved */
|
|
|
|
pfl->cfi_table[0x23] = 0x01;
|
|
|
|
/* Max timeout for buffer write (NA) */
|
|
|
|
pfl->cfi_table[0x24] = 0x00;
|
|
|
|
/* Max timeout for block erase */
|
|
|
|
pfl->cfi_table[0x25] = 0x0A;
|
|
|
|
/* Max timeout for chip erase */
|
|
|
|
pfl->cfi_table[0x26] = 0x0D;
|
|
|
|
/* Device size */
|
|
|
|
pfl->cfi_table[0x27] = ctz32(pfl->chip_len);
|
|
|
|
/* Flash device interface (8 & 16 bits) */
|
|
|
|
pfl->cfi_table[0x28] = 0x02;
|
|
|
|
pfl->cfi_table[0x29] = 0x00;
|
|
|
|
/* Max number of bytes in multi-bytes write */
|
|
|
|
/*
|
|
|
|
* XXX: disable buffered write as it's not supported
|
|
|
|
* pfl->cfi_table[0x2A] = 0x05;
|
|
|
|
*/
|
|
|
|
pfl->cfi_table[0x2A] = 0x00;
|
|
|
|
pfl->cfi_table[0x2B] = 0x00;
|
|
|
|
/* Number of erase block regions */
|
|
|
|
pfl->cfi_table[0x2c] = nb_regions;
|
|
|
|
/* Erase block regions */
|
|
|
|
for (int i = 0; i < nb_regions; ++i) {
|
|
|
|
uint32_t sector_len_per_device = pfl->sector_len[i];
|
|
|
|
pfl->cfi_table[0x2d + 4 * i] = pfl->nb_blocs[i] - 1;
|
|
|
|
pfl->cfi_table[0x2e + 4 * i] = (pfl->nb_blocs[i] - 1) >> 8;
|
|
|
|
pfl->cfi_table[0x2f + 4 * i] = sector_len_per_device >> 8;
|
|
|
|
pfl->cfi_table[0x30 + 4 * i] = sector_len_per_device >> 16;
|
|
|
|
}
|
|
|
|
assert(0x2c + 4 * nb_regions < pri_ofs);
|
|
|
|
|
|
|
|
/* Extended */
|
|
|
|
pfl->cfi_table[0x00 + pri_ofs] = 'P';
|
|
|
|
pfl->cfi_table[0x01 + pri_ofs] = 'R';
|
|
|
|
pfl->cfi_table[0x02 + pri_ofs] = 'I';
|
|
|
|
|
|
|
|
/* Extended version 1.0 */
|
|
|
|
pfl->cfi_table[0x03 + pri_ofs] = '1';
|
|
|
|
pfl->cfi_table[0x04 + pri_ofs] = '0';
|
|
|
|
|
|
|
|
/* Address sensitive unlock required. */
|
|
|
|
pfl->cfi_table[0x05 + pri_ofs] = 0x00;
|
|
|
|
/* Erase suspend to read/write. */
|
|
|
|
pfl->cfi_table[0x06 + pri_ofs] = 0x02;
|
|
|
|
/* Sector protect not supported. */
|
|
|
|
pfl->cfi_table[0x07 + pri_ofs] = 0x00;
|
|
|
|
/* Temporary sector unprotect not supported. */
|
|
|
|
pfl->cfi_table[0x08 + pri_ofs] = 0x00;
|
|
|
|
|
|
|
|
/* Sector protect/unprotect scheme. */
|
|
|
|
pfl->cfi_table[0x09 + pri_ofs] = 0x00;
|
|
|
|
|
|
|
|
/* Simultaneous operation not supported. */
|
|
|
|
pfl->cfi_table[0x0a + pri_ofs] = 0x00;
|
|
|
|
/* Burst mode not supported. */
|
|
|
|
pfl->cfi_table[0x0b + pri_ofs] = 0x00;
|
|
|
|
/* Page mode not supported. */
|
|
|
|
pfl->cfi_table[0x0c + pri_ofs] = 0x00;
|
|
|
|
assert(0x0c + pri_ofs < ARRAY_SIZE(pfl->cfi_table));
|
|
|
|
}
|
|
|
|
|
2013-07-01 14:18:29 +04:00
|
|
|
static void pflash_cfi02_realize(DeviceState *dev, Error **errp)
|
2006-06-26 02:28:15 +04:00
|
|
|
{
|
2020-07-07 19:50:33 +03:00
|
|
|
ERRP_GUARD();
|
2019-03-08 12:45:59 +03:00
|
|
|
PFlashCFI02 *pfl = PFLASH_CFI02(dev);
|
2009-08-21 08:57:38 +04:00
|
|
|
int ret;
|
2006-06-26 02:28:15 +04:00
|
|
|
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
if (pfl->uniform_sector_len == 0 && pfl->sector_len[0] == 0) {
|
hw/block/pflash_cfi*.c: fix confusing assert fail message
The patch is to fix the confusing assert fail message caused by
un-initialized device structure (from bite sized tasks).
The bug can be reproduced by
./qemu-system-x86_64 -nographic -device cfi.pflash01
The CFI hardware is dynamically loaded by QOM realizing mechanism,
however the realizing function in pflash_cfi01_realize function
requires the device being initialized manually before calling, like
./qemu-system-x86_64 -nographic
-device cfi.pflash01,num-blocks=1024,sector-length=4096,name=testcard
Once the initializing parameters are left off in the command, it will
leave the device structure not initialized, which makes
pflash_cfi01_realize try to realize a zero-volume card, causing
/mnt/EXT_volume/projects/qemu/qemu-dev/exec.c:1378:
find_ram_offset: Assertion `size != 0\' failed.
Through my test, at least the flash device's block-number, sector-length
and its name is needed for pflash_cfi01_realize to behave correctly. So
I think the new asserts are needed to hint the QEMU user to specify
the device's parameters correctly.
Signed-off-by: Ziyue Yang <skiver.cloud.yzy@gmail.com>
Message-Id: <1481810693-13733-1-git-send-email-skiver.cloud.yzy@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Ziyue Yang <yzylivezh@hotmail.com>
2016-12-15 17:04:53 +03:00
|
|
|
error_setg(errp, "attribute \"sector-length\" not specified or zero.");
|
|
|
|
return;
|
|
|
|
}
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
if (pfl->uniform_nb_blocs == 0 && pfl->nb_blocs[0] == 0) {
|
hw/block/pflash_cfi*.c: fix confusing assert fail message
The patch is to fix the confusing assert fail message caused by
un-initialized device structure (from bite sized tasks).
The bug can be reproduced by
./qemu-system-x86_64 -nographic -device cfi.pflash01
The CFI hardware is dynamically loaded by QOM realizing mechanism,
however the realizing function in pflash_cfi01_realize function
requires the device being initialized manually before calling, like
./qemu-system-x86_64 -nographic
-device cfi.pflash01,num-blocks=1024,sector-length=4096,name=testcard
Once the initializing parameters are left off in the command, it will
leave the device structure not initialized, which makes
pflash_cfi01_realize try to realize a zero-volume card, causing
/mnt/EXT_volume/projects/qemu/qemu-dev/exec.c:1378:
find_ram_offset: Assertion `size != 0\' failed.
Through my test, at least the flash device's block-number, sector-length
and its name is needed for pflash_cfi01_realize to behave correctly. So
I think the new asserts are needed to hint the QEMU user to specify
the device's parameters correctly.
Signed-off-by: Ziyue Yang <skiver.cloud.yzy@gmail.com>
Message-Id: <1481810693-13733-1-git-send-email-skiver.cloud.yzy@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Ziyue Yang <yzylivezh@hotmail.com>
2016-12-15 17:04:53 +03:00
|
|
|
error_setg(errp, "attribute \"num-blocks\" not specified or zero.");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (pfl->name == NULL) {
|
|
|
|
error_setg(errp, "attribute \"name\" not specified.");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
int nb_regions;
|
|
|
|
pfl->chip_len = 0;
|
2019-04-26 19:26:23 +03:00
|
|
|
pfl->total_sectors = 0;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
for (nb_regions = 0; nb_regions < PFLASH_MAX_ERASE_REGIONS; ++nb_regions) {
|
|
|
|
if (pfl->nb_blocs[nb_regions] == 0) {
|
|
|
|
break;
|
|
|
|
}
|
2019-04-26 19:26:23 +03:00
|
|
|
pfl->total_sectors += pfl->nb_blocs[nb_regions];
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
uint64_t sector_len_per_device = pfl->sector_len[nb_regions];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The size of each flash sector must be a power of 2 and it must be
|
|
|
|
* aligned at the same power of 2.
|
|
|
|
*/
|
|
|
|
if (sector_len_per_device & 0xff ||
|
|
|
|
sector_len_per_device >= (1 << 24) ||
|
|
|
|
!is_power_of_2(sector_len_per_device))
|
|
|
|
{
|
|
|
|
error_setg(errp, "unsupported configuration: "
|
|
|
|
"sector length[%d] per device = %" PRIx64 ".",
|
|
|
|
nb_regions, sector_len_per_device);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (pfl->chip_len & (sector_len_per_device - 1)) {
|
|
|
|
error_setg(errp, "unsupported configuration: "
|
|
|
|
"flash region %d not correctly aligned.",
|
|
|
|
nb_regions);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pfl->chip_len += (uint64_t)pfl->sector_len[nb_regions] *
|
|
|
|
pfl->nb_blocs[nb_regions];
|
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t uniform_len = (uint64_t)pfl->uniform_nb_blocs *
|
|
|
|
pfl->uniform_sector_len;
|
|
|
|
if (nb_regions == 0) {
|
|
|
|
nb_regions = 1;
|
|
|
|
pfl->nb_blocs[0] = pfl->uniform_nb_blocs;
|
|
|
|
pfl->sector_len[0] = pfl->uniform_sector_len;
|
|
|
|
pfl->chip_len = uniform_len;
|
2019-04-26 19:26:23 +03:00
|
|
|
pfl->total_sectors = pfl->uniform_nb_blocs;
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
} else if (uniform_len != 0 && uniform_len != pfl->chip_len) {
|
|
|
|
error_setg(errp, "\"num-blocks\"*\"sector-length\" "
|
|
|
|
"different from \"num-blocks0\"*\'sector-length0\" + ... + "
|
|
|
|
"\"num-blocks3\"*\"sector-length3\"");
|
|
|
|
return;
|
|
|
|
}
|
2012-10-30 11:45:11 +04:00
|
|
|
|
2019-05-01 19:15:56 +03:00
|
|
|
memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl),
|
|
|
|
&pflash_cfi02_ops, pfl, pfl->name,
|
2020-07-07 19:50:33 +03:00
|
|
|
pfl->chip_len, errp);
|
|
|
|
if (*errp) {
|
2014-09-09 09:27:57 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2011-08-04 16:55:30 +04:00
|
|
|
pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem);
|
2017-01-24 15:43:31 +03:00
|
|
|
|
|
|
|
if (pfl->blk) {
|
|
|
|
uint64_t perm;
|
2021-01-18 15:34:47 +03:00
|
|
|
pfl->ro = !blk_supports_write_perm(pfl->blk);
|
2017-01-24 15:43:31 +03:00
|
|
|
perm = BLK_PERM_CONSISTENT_READ | (pfl->ro ? 0 : BLK_PERM_WRITE);
|
|
|
|
ret = blk_set_perm(pfl->blk, perm, BLK_PERM_ALL, errp);
|
|
|
|
if (ret < 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pfl->ro = 0;
|
|
|
|
}
|
|
|
|
|
2014-10-07 15:59:18 +04:00
|
|
|
if (pfl->blk) {
|
2019-05-18 15:45:35 +03:00
|
|
|
if (!blk_check_size_and_read_all(pfl->blk, pfl->storage,
|
|
|
|
pfl->chip_len, errp)) {
|
2013-07-01 14:18:29 +04:00
|
|
|
vmstate_unregister_ram(&pfl->orig_mem, DEVICE(pfl));
|
|
|
|
return;
|
2009-08-21 08:57:38 +04:00
|
|
|
}
|
2006-06-26 02:28:15 +04:00
|
|
|
}
|
2012-02-22 11:18:49 +04:00
|
|
|
|
2019-04-26 19:26:17 +03:00
|
|
|
/* Only 11 bits are used in the comparison. */
|
|
|
|
pfl->unlock_addr0 &= 0x7FF;
|
|
|
|
pfl->unlock_addr1 &= 0x7FF;
|
|
|
|
|
2019-04-26 19:26:23 +03:00
|
|
|
/* Allocate memory for a bitmap for sectors being erased. */
|
|
|
|
pfl->sector_erase_map = bitmap_new(pfl->total_sectors);
|
|
|
|
|
2011-08-04 16:55:30 +04:00
|
|
|
pflash_setup_mappings(pfl);
|
2013-07-01 14:18:29 +04:00
|
|
|
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);
|
2012-02-22 11:18:49 +04:00
|
|
|
|
2019-02-19 18:37:27 +03:00
|
|
|
timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl);
|
2006-06-26 02:28:15 +04:00
|
|
|
pfl->status = 0;
|
2019-05-18 21:21:28 +03:00
|
|
|
|
2021-03-10 02:16:01 +03:00
|
|
|
pflash_cfi02_fill_cfi_table(pfl, nb_regions);
|
2012-10-30 11:45:11 +04:00
|
|
|
}
|
|
|
|
|
2021-03-10 19:51:02 +03:00
|
|
|
static void pflash_cfi02_reset(DeviceState *dev)
|
|
|
|
{
|
|
|
|
PFlashCFI02 *pfl = PFLASH_CFI02(dev);
|
|
|
|
|
|
|
|
pflash_reset_state_machine(pfl);
|
|
|
|
}
|
|
|
|
|
2012-10-30 11:45:11 +04:00
|
|
|
static Property pflash_cfi02_properties[] = {
|
2019-03-08 12:45:56 +03:00
|
|
|
DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk),
|
hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.
The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.
If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-04-26 19:26:19 +03:00
|
|
|
DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, uniform_nb_blocs, 0),
|
|
|
|
DEFINE_PROP_UINT32("sector-length", PFlashCFI02, uniform_sector_len, 0),
|
|
|
|
DEFINE_PROP_UINT32("num-blocks0", PFlashCFI02, nb_blocs[0], 0),
|
|
|
|
DEFINE_PROP_UINT32("sector-length0", PFlashCFI02, sector_len[0], 0),
|
|
|
|
DEFINE_PROP_UINT32("num-blocks1", PFlashCFI02, nb_blocs[1], 0),
|
|
|
|
DEFINE_PROP_UINT32("sector-length1", PFlashCFI02, sector_len[1], 0),
|
|
|
|
DEFINE_PROP_UINT32("num-blocks2", PFlashCFI02, nb_blocs[2], 0),
|
|
|
|
DEFINE_PROP_UINT32("sector-length2", PFlashCFI02, sector_len[2], 0),
|
|
|
|
DEFINE_PROP_UINT32("num-blocks3", PFlashCFI02, nb_blocs[3], 0),
|
|
|
|
DEFINE_PROP_UINT32("sector-length3", PFlashCFI02, sector_len[3], 0),
|
2019-03-08 12:45:56 +03:00
|
|
|
DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0),
|
|
|
|
DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0),
|
|
|
|
DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0),
|
|
|
|
DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0),
|
|
|
|
DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0),
|
|
|
|
DEFINE_PROP_UINT16("id2", PFlashCFI02, ident2, 0),
|
|
|
|
DEFINE_PROP_UINT16("id3", PFlashCFI02, ident3, 0),
|
|
|
|
DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0),
|
|
|
|
DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0),
|
|
|
|
DEFINE_PROP_STRING("name", PFlashCFI02, name),
|
2012-10-30 11:45:11 +04:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
qdev: Unrealize must not fail
Devices may have component devices and buses.
Device realization may fail. Realization is recursive: a device's
realize() method realizes its components, and device_set_realized()
realizes its buses (which should in turn realize the devices on that
bus, except bus_set_realized() doesn't implement that, yet).
When realization of a component or bus fails, we need to roll back:
unrealize everything we realized so far. If any of these unrealizes
failed, the device would be left in an inconsistent state. Must not
happen.
device_set_realized() lets it happen: it ignores errors in the roll
back code starting at label child_realize_fail.
Since realization is recursive, unrealization must be recursive, too.
But how could a partly failed unrealize be rolled back? We'd have to
re-realize, which can fail. This design is fundamentally broken.
device_set_realized() does not roll back at all. Instead, it keeps
unrealizing, ignoring further errors.
It can screw up even for a device with no buses: if the lone
dc->unrealize() fails, it still unregisters vmstate, and calls
listeners' unrealize() callback.
bus_set_realized() does not roll back either. Instead, it stops
unrealizing.
Fortunately, no unrealize method can fail, as we'll see below.
To fix the design error, drop parameter @errp from all the unrealize
methods.
Any unrealize method that uses @errp now needs an update. This leads
us to unrealize() methods that can fail. Merely passing it to another
unrealize method cannot cause failure, though. Here are the ones that
do other things with @errp:
* virtio_serial_device_unrealize()
Fails when qbus_set_hotplug_handler() fails, but still does all the
other work. On failure, the device would stay realized with its
resources completely gone. Oops. Can't happen, because
qbus_set_hotplug_handler() can't actually fail here. Pass
&error_abort to qbus_set_hotplug_handler() instead.
* hw/ppc/spapr_drc.c's unrealize()
Fails when object_property_del() fails, but all the other work is
already done. On failure, the device would stay realized with its
vmstate registration gone. Oops. Can't happen, because
object_property_del() can't actually fail here. Pass &error_abort
to object_property_del() instead.
* spapr_phb_unrealize()
Fails and bails out when remove_drcs() fails, but other work is
already done. On failure, the device would stay realized with some
of its resources gone. Oops. remove_drcs() fails only when
chassis_from_bus()'s object_property_get_uint() fails, and it can't
here. Pass &error_abort to remove_drcs() instead.
Therefore, no unrealize method can fail before this patch.
device_set_realized()'s recursive unrealization via bus uses
object_property_set_bool(). Can't drop @errp there, so pass
&error_abort.
We similarly unrealize with object_property_set_bool() elsewhere,
always ignoring errors. Pass &error_abort instead.
Several unrealize methods no longer handle errors from other unrealize
methods: virtio_9p_device_unrealize(),
virtio_input_device_unrealize(), scsi_qdev_unrealize(), ...
Much of the deleted error handling looks wrong anyway.
One unrealize methods no longer ignore such errors:
usb_ehci_pci_exit().
Several realize methods no longer ignore errors when rolling back:
v9fs_device_realize_common(), pci_qdev_unrealize(),
spapr_phb_realize(), usb_qdev_realize(), vfio_ccw_realize(),
virtio_device_realize().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200505152926.18877-17-armbru@redhat.com>
2020-05-05 18:29:24 +03:00
|
|
|
static void pflash_cfi02_unrealize(DeviceState *dev)
|
2019-02-19 18:37:27 +03:00
|
|
|
{
|
2019-03-08 12:45:59 +03:00
|
|
|
PFlashCFI02 *pfl = PFLASH_CFI02(dev);
|
2019-02-19 18:37:27 +03:00
|
|
|
timer_del(&pfl->timer);
|
2019-04-26 19:26:23 +03:00
|
|
|
g_free(pfl->sector_erase_map);
|
2019-02-19 18:37:27 +03:00
|
|
|
}
|
|
|
|
|
2012-10-30 11:45:11 +04:00
|
|
|
static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
2013-07-01 14:18:29 +04:00
|
|
|
dc->realize = pflash_cfi02_realize;
|
2021-03-10 19:51:02 +03:00
|
|
|
dc->reset = pflash_cfi02_reset;
|
2019-02-19 18:37:27 +03:00
|
|
|
dc->unrealize = pflash_cfi02_unrealize;
|
2020-01-10 18:30:32 +03:00
|
|
|
device_class_set_props(dc, pflash_cfi02_properties);
|
2014-12-07 21:20:45 +03:00
|
|
|
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
|
2012-10-30 11:45:11 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo pflash_cfi02_info = {
|
2019-03-08 12:45:59 +03:00
|
|
|
.name = TYPE_PFLASH_CFI02,
|
2012-10-30 11:45:11 +04:00
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
2019-03-08 12:45:56 +03:00
|
|
|
.instance_size = sizeof(PFlashCFI02),
|
2012-10-30 11:45:11 +04:00
|
|
|
.class_init = pflash_cfi02_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void pflash_cfi02_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&pflash_cfi02_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(pflash_cfi02_register_types)
|
|
|
|
|
2019-03-08 12:45:56 +03:00
|
|
|
PFlashCFI02 *pflash_cfi02_register(hwaddr base,
|
2019-03-08 12:46:09 +03:00
|
|
|
const char *name,
|
2019-03-08 12:45:56 +03:00
|
|
|
hwaddr size,
|
|
|
|
BlockBackend *blk,
|
2019-03-08 12:46:10 +03:00
|
|
|
uint32_t sector_len,
|
2019-03-08 12:45:56 +03:00
|
|
|
int nb_mappings, int width,
|
|
|
|
uint16_t id0, uint16_t id1,
|
|
|
|
uint16_t id2, uint16_t id3,
|
|
|
|
uint16_t unlock_addr0,
|
|
|
|
uint16_t unlock_addr1,
|
|
|
|
int be)
|
2012-10-30 11:45:11 +04:00
|
|
|
{
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 08:31:58 +03:00
|
|
|
DeviceState *dev = qdev_new(TYPE_PFLASH_CFI02);
|
2012-10-30 11:45:11 +04:00
|
|
|
|
2015-03-09 21:17:26 +03:00
|
|
|
if (blk) {
|
qdev: Make qdev_prop_set_drive() match the other helpers
qdev_prop_set_drive() can fail. None of the other qdev_prop_set_FOO()
can; they abort on error.
To clean up this inconsistency, rename qdev_prop_set_drive() to
qdev_prop_set_drive_err(), and create a qdev_prop_set_drive() that
aborts on error.
Coccinelle script to update callers:
@ depends on !(file in "hw/core/qdev-properties-system.c")@
expression dev, name, value;
symbol error_abort;
@@
- qdev_prop_set_drive(dev, name, value, &error_abort);
+ qdev_prop_set_drive(dev, name, value);
@@
expression dev, name, value, errp;
@@
- qdev_prop_set_drive(dev, name, value, errp);
+ qdev_prop_set_drive_err(dev, name, value, errp);
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200622094227.1271650-14-armbru@redhat.com>
2020-06-22 12:42:24 +03:00
|
|
|
qdev_prop_set_drive(dev, "drive", blk);
|
2012-10-30 11:45:11 +04:00
|
|
|
}
|
2020-05-11 23:52:46 +03:00
|
|
|
assert(QEMU_IS_ALIGNED(size, sector_len));
|
2019-03-08 12:46:10 +03:00
|
|
|
qdev_prop_set_uint32(dev, "num-blocks", size / sector_len);
|
2012-10-30 11:45:11 +04:00
|
|
|
qdev_prop_set_uint32(dev, "sector-length", sector_len);
|
|
|
|
qdev_prop_set_uint8(dev, "width", width);
|
|
|
|
qdev_prop_set_uint8(dev, "mappings", nb_mappings);
|
|
|
|
qdev_prop_set_uint8(dev, "big-endian", !!be);
|
|
|
|
qdev_prop_set_uint16(dev, "id0", id0);
|
|
|
|
qdev_prop_set_uint16(dev, "id1", id1);
|
|
|
|
qdev_prop_set_uint16(dev, "id2", id2);
|
|
|
|
qdev_prop_set_uint16(dev, "id3", id3);
|
|
|
|
qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0);
|
|
|
|
qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1);
|
|
|
|
qdev_prop_set_string(dev, "name", name);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 08:32:34 +03:00
|
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
2012-10-30 11:45:11 +04:00
|
|
|
|
2013-07-01 14:18:28 +04:00
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
|
2019-03-08 12:45:59 +03:00
|
|
|
return PFLASH_CFI02(dev);
|
2006-06-26 02:28:15 +04:00
|
|
|
}
|