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Use the PRC status bit to detect when an XHCI port reset is complete (issue #31).
Some controllers do not set the PR status bit immediately after it's written, so polling that to detect when the reset is complete is unsafe.
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@ -60,7 +60,7 @@
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#define XHCI_PORT_SC_PLS 0x000001e0 // Port Link State
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#define XHCI_PORT_SC_PP 0x00000200 // Port Power
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#define XHCI_PORT_SC_PS 0x00003c00 // Port Speed
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#define XHCI_PORT_SC_PRSC 0x00200000 // Port Reset
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#define XHCI_PORT_SC_PRC 0x00200000 // Port Reset Change
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#define XHCI_PORT_SC_PS_OFFSET 10 // first bit of Port Speed
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@ -472,8 +472,8 @@ static int get_xhci_device_speed(xhci_op_regs_t *op_regs, int port_idx)
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static bool reset_xhci_port(xhci_op_regs_t *op_regs, int port_idx)
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{
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write32(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PP | XHCI_PORT_SC_PR);
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return wait_until_clr(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PR, 1000*MILLISEC);
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write32(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PP | XHCI_PORT_SC_PR | XHCI_PORT_SC_PRC);
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return wait_until_set(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PRC, 1000*MILLISEC);
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}
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static void disable_xhci_port(xhci_op_regs_t *op_regs, int port_idx)
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