From 95c49848c8e9519975851f6c9f15ae3a6b4f85b9 Mon Sep 17 00:00:00 2001 From: Martin Whitaker Date: Sat, 2 Apr 2022 09:28:34 +0100 Subject: [PATCH] Use the PRC status bit to detect when an XHCI port reset is complete (issue #31). Some controllers do not set the PR status bit immediately after it's written, so polling that to detect when the reset is complete is unsafe. --- system/xhci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/system/xhci.c b/system/xhci.c index dfa4273..ea5981f 100644 --- a/system/xhci.c +++ b/system/xhci.c @@ -60,7 +60,7 @@ #define XHCI_PORT_SC_PLS 0x000001e0 // Port Link State #define XHCI_PORT_SC_PP 0x00000200 // Port Power #define XHCI_PORT_SC_PS 0x00003c00 // Port Speed -#define XHCI_PORT_SC_PRSC 0x00200000 // Port Reset +#define XHCI_PORT_SC_PRC 0x00200000 // Port Reset Change #define XHCI_PORT_SC_PS_OFFSET 10 // first bit of Port Speed @@ -472,8 +472,8 @@ static int get_xhci_device_speed(xhci_op_regs_t *op_regs, int port_idx) static bool reset_xhci_port(xhci_op_regs_t *op_regs, int port_idx) { - write32(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PP | XHCI_PORT_SC_PR); - return wait_until_clr(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PR, 1000*MILLISEC); + write32(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PP | XHCI_PORT_SC_PR | XHCI_PORT_SC_PRC); + return wait_until_set(&op_regs->port_regs[port_idx].sc, XHCI_PORT_SC_PRC, 1000*MILLISEC); } static void disable_xhci_port(xhci_op_regs_t *op_regs, int port_idx)