2018-04-11 05:44:28 +03:00
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// Copyright (c) 2015-2016 The Khronos Group Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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2018-09-03 07:14:20 +03:00
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#ifndef SOURCE_INSTRUCTION_H_
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#define SOURCE_INSTRUCTION_H_
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2018-04-11 05:44:28 +03:00
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#include <cstdint>
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#include <vector>
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2018-09-03 07:14:20 +03:00
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#include "source/latest_version_spirv_header.h"
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2018-04-11 05:44:28 +03:00
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#include "spirv-tools/libspirv.h"
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// Describes an instruction.
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struct spv_instruction_t {
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// Normally, both opcode and extInstType contain valid data.
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// However, when the assembler parses !<number> as the first word in
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// an instruction and opcode and extInstType are invalid.
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SpvOp opcode;
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spv_ext_inst_type_t extInstType;
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// The Id of the result type, if this instruction has one. Zero otherwise.
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uint32_t resultTypeId;
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// The instruction, as a sequence of 32-bit words.
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// For a regular instruction the opcode and word count are combined
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// in words[0], as described in the SPIR-V spec.
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// Otherwise, the first token was !<number>, and that number appears
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// in words[0]. Subsequent elements are the result of parsing
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// tokens in the alternate parsing mode as described in syntax.md.
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std::vector<uint32_t> words;
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};
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// Appends a word to an instruction, without checking for overflow.
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inline void spvInstructionAddWord(spv_instruction_t* inst, uint32_t value) {
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inst->words.push_back(value);
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}
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2018-09-03 07:14:20 +03:00
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#endif // SOURCE_INSTRUCTION_H_
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