2015-06-21 18:33:46 +03:00
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/*
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Simple DirectMedia Layer
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2022-01-03 20:40:00 +03:00
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Copyright (C) 1997-2022 Sam Lantinga <slouken@libsdl.org>
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2015-06-21 18:33:46 +03:00
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any damages
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arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it
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freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you must not
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claim that you wrote the original software. If you use this software
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in a product, an acknowledgment in the product documentation would be
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appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and must not be
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misrepresented as being the original software.
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3. This notice may not be removed or altered from any source distribution.
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*/
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/**
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* \file SDL_cpuinfo.h
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*
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* CPU feature detection for SDL.
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*/
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2016-11-21 08:34:54 +03:00
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#ifndef SDL_cpuinfo_h_
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#define SDL_cpuinfo_h_
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2015-06-21 18:33:46 +03:00
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2022-11-27 07:43:38 +03:00
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#include <SDL3/SDL_stdinc.h>
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2015-06-21 18:33:46 +03:00
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2022-11-27 07:43:38 +03:00
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#include <SDL3/begin_code.h>
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2015-06-21 18:33:46 +03:00
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/* Set up for C function definitions, even when using C++ */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* This is a guess for the cacheline size used for padding.
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* Most x86 processors have a 64 byte cache line.
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* The 64-bit PowerPC processors have a 128 byte cache line.
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* We'll use the larger value to be generally safe.
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*/
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#define SDL_CACHELINE_SIZE 128
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/**
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2021-03-21 21:18:39 +03:00
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* Get the number of CPU cores available.
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*
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* \returns the total number of logical CPU cores. On CPUs that include
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* technologies such as hyperthreading, the number of logical cores
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* may be more than the number of physical cores.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC int SDLCALL SDL_GetCPUCount(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine the L1 cache line size of the CPU.
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*
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* This is useful for determining multi-threaded structure padding or SIMD
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* prefetch sizes.
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*
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* \returns the L1 cache line size of the CPU, in bytes.
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2015-06-21 18:33:46 +03:00
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC int SDLCALL SDL_GetCPUCacheLineSize(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has the RDTSC instruction.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has the RDTSC instruction or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasRDTSC(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has AltiVec features.
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*
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2021-07-15 00:07:04 +03:00
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* This always returns false on CPUs that aren't using PowerPC instruction
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* sets.
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2021-03-21 21:18:39 +03:00
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*
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* \returns SDL_TRUE if the CPU has AltiVec features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasAltiVec(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has MMX features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has MMX features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasMMX(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has 3DNow! features.
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*
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* This always returns false on CPUs that aren't using AMD instruction sets.
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*
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* \returns SDL_TRUE if the CPU has 3DNow! features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_Has3DNow(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has SSE features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has SSE features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has SSE2 features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has SSE2 features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE2(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has SSE3 features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has SSE3 features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE3(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has SSE4.1 features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has SSE4.1 features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE41(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has SSE4.2 features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has SSE4.2 features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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*
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2021-03-21 21:18:39 +03:00
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasSSE42(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has AVX features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has AVX features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-03-21 21:18:39 +03:00
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*
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX2
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasAVX(void);
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has AVX2 features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has AVX2 features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-03-21 21:18:39 +03:00
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*
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* \sa SDL_Has3DNow
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* \sa SDL_HasAltiVec
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* \sa SDL_HasAVX
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* \sa SDL_HasMMX
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* \sa SDL_HasRDTSC
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* \sa SDL_HasSSE
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* \sa SDL_HasSSE2
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* \sa SDL_HasSSE3
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* \sa SDL_HasSSE41
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* \sa SDL_HasSSE42
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2015-06-21 18:33:46 +03:00
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*/
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extern DECLSPEC SDL_bool SDLCALL SDL_HasAVX2(void);
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2018-05-21 18:35:42 +03:00
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/**
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2021-03-21 21:18:39 +03:00
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* Determine whether the CPU has AVX-512F (foundation) features.
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*
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* This always returns false on CPUs that aren't using Intel instruction sets.
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*
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* \returns SDL_TRUE if the CPU has AVX-512F features or SDL_FALSE if not.
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*
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2022-11-23 01:40:14 +03:00
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* \since This function is available since SDL 3.0.0.
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2021-10-27 04:36:05 +03:00
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|
*
|
2021-03-21 21:18:39 +03:00
|
|
|
* \sa SDL_HasAVX
|
2018-05-21 18:35:42 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC SDL_bool SDLCALL SDL_HasAVX512F(void);
|
|
|
|
|
2019-10-25 04:12:08 +03:00
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Determine whether the CPU has ARM SIMD (ARMv6) features.
|
|
|
|
*
|
|
|
|
* This is different from ARM NEON, which is a different instruction set.
|
|
|
|
*
|
|
|
|
* This always returns false on CPUs that aren't using ARM instruction sets.
|
|
|
|
*
|
|
|
|
* \returns SDL_TRUE if the CPU has ARM SIMD features or SDL_FALSE if not.
|
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2021-10-27 04:36:05 +03:00
|
|
|
*
|
2021-03-21 21:18:39 +03:00
|
|
|
* \sa SDL_HasNEON
|
2019-10-25 04:12:08 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC SDL_bool SDLCALL SDL_HasARMSIMD(void);
|
|
|
|
|
2016-11-17 09:15:16 +03:00
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Determine whether the CPU has NEON (ARM SIMD) features.
|
|
|
|
*
|
|
|
|
* This always returns false on CPUs that aren't using ARM instruction sets.
|
|
|
|
*
|
|
|
|
* \returns SDL_TRUE if the CPU has ARM NEON features or SDL_FALSE if not.
|
2021-10-27 04:36:05 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2016-11-17 09:15:16 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC SDL_bool SDLCALL SDL_HasNEON(void);
|
|
|
|
|
2022-05-31 14:10:05 +03:00
|
|
|
/**
|
|
|
|
* Determine whether the CPU has LSX (LOONGARCH SIMD) features.
|
|
|
|
*
|
2022-06-06 18:51:04 +03:00
|
|
|
* This always returns false on CPUs that aren't using LOONGARCH instruction
|
|
|
|
* sets.
|
2022-05-31 14:10:05 +03:00
|
|
|
*
|
2022-06-06 18:51:04 +03:00
|
|
|
* \returns SDL_TRUE if the CPU has LOONGARCH LSX features or SDL_FALSE if
|
|
|
|
* not.
|
2022-05-31 14:10:05 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2022-05-31 14:10:05 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC SDL_bool SDLCALL SDL_HasLSX(void);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Determine whether the CPU has LASX (LOONGARCH SIMD) features.
|
|
|
|
*
|
2022-06-06 18:51:04 +03:00
|
|
|
* This always returns false on CPUs that aren't using LOONGARCH instruction
|
|
|
|
* sets.
|
2022-05-31 14:10:05 +03:00
|
|
|
*
|
2022-06-06 18:51:04 +03:00
|
|
|
* \returns SDL_TRUE if the CPU has LOONGARCH LASX features or SDL_FALSE if
|
|
|
|
* not.
|
2022-05-31 14:10:05 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2022-05-31 14:10:05 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC SDL_bool SDLCALL SDL_HasLASX(void);
|
|
|
|
|
2015-06-21 18:33:46 +03:00
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Get the amount of RAM configured in the system.
|
|
|
|
*
|
2022-07-29 16:24:05 +03:00
|
|
|
* \returns the amount of RAM configured in the system in MiB.
|
2021-03-21 21:18:39 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2015-06-21 18:33:46 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC int SDLCALL SDL_GetSystemRAM(void);
|
|
|
|
|
2019-06-09 00:54:37 +03:00
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Report the alignment this system needs for SIMD allocations.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
|
|
|
* This will return the minimum number of bytes to which a pointer must be
|
2021-07-15 00:07:04 +03:00
|
|
|
* aligned to be compatible with SIMD instructions on the current machine. For
|
|
|
|
* example, if the machine supports SSE only, it will return 16, but if it
|
|
|
|
* supports AVX-512F, it'll return 64 (etc). This only reports values for
|
2021-03-21 21:18:39 +03:00
|
|
|
* instruction sets SDL knows about, so if your SDL build doesn't have
|
|
|
|
* SDL_HasAVX512F(), then it might return 16 for the SSE support it sees and
|
|
|
|
* not 64 for the AVX-512 instructions that exist but SDL doesn't know about.
|
|
|
|
* Plan accordingly.
|
|
|
|
*
|
2021-07-15 00:07:04 +03:00
|
|
|
* \returns the alignment in bytes needed for available, known SIMD
|
|
|
|
* instructions.
|
2021-10-27 04:36:05 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2019-06-09 00:54:37 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC size_t SDLCALL SDL_SIMDGetAlignment(void);
|
|
|
|
|
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Allocate memory in a SIMD-friendly way.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
|
|
|
* This will allocate a block of memory that is suitable for use with SIMD
|
2021-07-15 00:07:04 +03:00
|
|
|
* instructions. Specifically, it will be properly aligned and padded for the
|
|
|
|
* system's supported vector instructions.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
2021-07-15 00:07:04 +03:00
|
|
|
* The memory returned will be padded such that it is safe to read or write an
|
|
|
|
* incomplete vector at the end of the memory block. This can be useful so you
|
|
|
|
* don't have to drop back to a scalar fallback at the end of your SIMD
|
|
|
|
* processing loop to deal with the final elements without overflowing the
|
|
|
|
* allocated buffer.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
2021-07-15 00:07:04 +03:00
|
|
|
* You must free this memory with SDL_FreeSIMD(), not free() or SDL_free() or
|
|
|
|
* delete[], etc.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
2021-07-15 00:07:04 +03:00
|
|
|
* Note that SDL will only deal with SIMD instruction sets it is aware of; for
|
|
|
|
* example, SDL 2.0.8 knows that SSE wants 16-byte vectors (SDL_HasSSE()), and
|
|
|
|
* AVX2 wants 32 bytes (SDL_HasAVX2()), but doesn't know that AVX-512 wants
|
|
|
|
* 64. To be clear: if you can't decide to use an instruction set with an
|
|
|
|
* SDL_Has*() function, don't use that instruction set with memory allocated
|
|
|
|
* through here.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
|
|
|
* SDL_AllocSIMD(0) will return a non-NULL pointer, assuming the system isn't
|
2021-03-21 21:18:39 +03:00
|
|
|
* out of memory, but you are not allowed to dereference it (because you only
|
|
|
|
* own zero bytes of that buffer).
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
2021-03-21 21:18:39 +03:00
|
|
|
* \param len The length, in bytes, of the block to allocate. The actual
|
|
|
|
* allocated block might be larger due to padding, etc.
|
2021-09-28 20:03:06 +03:00
|
|
|
* \returns a pointer to the newly-allocated block, NULL if out of memory.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2021-10-27 04:36:05 +03:00
|
|
|
*
|
2022-05-11 19:04:23 +03:00
|
|
|
* \sa SDL_SIMDGetAlignment
|
2020-06-11 19:03:33 +03:00
|
|
|
* \sa SDL_SIMDRealloc
|
2019-06-09 00:54:37 +03:00
|
|
|
* \sa SDL_SIMDFree
|
|
|
|
*/
|
|
|
|
extern DECLSPEC void * SDLCALL SDL_SIMDAlloc(const size_t len);
|
|
|
|
|
2020-06-11 19:03:33 +03:00
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Reallocate memory obtained from SDL_SIMDAlloc
|
2020-06-11 19:03:33 +03:00
|
|
|
*
|
|
|
|
* It is not valid to use this function on a pointer from anything but
|
2021-03-21 21:18:39 +03:00
|
|
|
* SDL_SIMDAlloc(). It can't be used on pointers from malloc, realloc,
|
|
|
|
* SDL_malloc, memalign, new[], etc.
|
|
|
|
*
|
|
|
|
* \param mem The pointer obtained from SDL_SIMDAlloc. This function also
|
|
|
|
* accepts NULL, at which point this function is the same as
|
|
|
|
* calling SDL_SIMDAlloc with a NULL pointer.
|
|
|
|
* \param len The length, in bytes, of the block to allocated. The actual
|
|
|
|
* allocated block might be larger due to padding, etc. Passing 0
|
|
|
|
* will return a non-NULL pointer, assuming the system isn't out of
|
|
|
|
* memory.
|
2021-07-14 21:15:30 +03:00
|
|
|
* \returns a pointer to the newly-reallocated block, NULL if out of memory.
|
2020-06-11 19:03:33 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2021-10-27 04:36:05 +03:00
|
|
|
*
|
2022-05-11 19:04:23 +03:00
|
|
|
* \sa SDL_SIMDGetAlignment
|
2020-06-11 19:03:33 +03:00
|
|
|
* \sa SDL_SIMDAlloc
|
|
|
|
* \sa SDL_SIMDFree
|
|
|
|
*/
|
2020-10-13 05:20:00 +03:00
|
|
|
extern DECLSPEC void * SDLCALL SDL_SIMDRealloc(void *mem, const size_t len);
|
2020-06-11 19:03:33 +03:00
|
|
|
|
2019-06-09 00:54:37 +03:00
|
|
|
/**
|
2021-03-21 21:18:39 +03:00
|
|
|
* Deallocate memory obtained from SDL_SIMDAlloc
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
|
|
|
* It is not valid to use this function on a pointer from anything but
|
2021-03-21 21:18:39 +03:00
|
|
|
* SDL_SIMDAlloc() or SDL_SIMDRealloc(). It can't be used on pointers from
|
|
|
|
* malloc, realloc, SDL_malloc, memalign, new[], etc.
|
2019-06-09 00:54:37 +03:00
|
|
|
*
|
|
|
|
* However, SDL_SIMDFree(NULL) is a legal no-op.
|
|
|
|
*
|
2021-03-21 21:18:39 +03:00
|
|
|
* The memory pointed to by `ptr` is no longer valid for access upon return,
|
2021-07-15 00:07:04 +03:00
|
|
|
* and may be returned to the system or reused by a future allocation. The
|
|
|
|
* pointer passed to this function is no longer safe to dereference once this
|
|
|
|
* function returns, and should be discarded.
|
2021-03-21 21:18:39 +03:00
|
|
|
*
|
2021-07-15 00:07:04 +03:00
|
|
|
* \param ptr The pointer, returned from SDL_SIMDAlloc or SDL_SIMDRealloc, to
|
|
|
|
* deallocate. NULL is a legal no-op.
|
2021-03-21 21:18:39 +03:00
|
|
|
*
|
2022-11-23 01:40:14 +03:00
|
|
|
* \since This function is available since SDL 3.0.0.
|
2021-10-27 04:36:05 +03:00
|
|
|
*
|
2019-06-09 00:54:37 +03:00
|
|
|
* \sa SDL_SIMDAlloc
|
2020-06-11 19:03:33 +03:00
|
|
|
* \sa SDL_SIMDRealloc
|
2019-06-09 00:54:37 +03:00
|
|
|
*/
|
|
|
|
extern DECLSPEC void SDLCALL SDL_SIMDFree(void *ptr);
|
|
|
|
|
2015-06-21 18:33:46 +03:00
|
|
|
/* Ends C function definitions when using C++ */
|
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
#endif
|
2022-11-27 07:43:38 +03:00
|
|
|
#include <SDL3/close_code.h>
|
2015-06-21 18:33:46 +03:00
|
|
|
|
2016-11-21 08:34:54 +03:00
|
|
|
#endif /* SDL_cpuinfo_h_ */
|
2015-06-21 18:33:46 +03:00
|
|
|
|
|
|
|
/* vi: set ts=4 sw=4 expandtab: */
|