cc61e5d5d5
CPU code no longer assume that floatx80 register is 16-byte aligned
287 lines
6.1 KiB
C++
287 lines
6.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: flag_ctrl.cc,v 1.16 2004-07-02 20:24:47 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void
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BX_CPU_C::SAHF(bxInstruction_c *i)
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{
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set_SF((AH & 0x80) >> 7);
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set_ZF((AH & 0x40) >> 6);
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set_AF((AH & 0x10) >> 4);
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set_CF(AH & 0x01);
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set_PF((AH & 0x04) >> 2);
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}
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void
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BX_CPU_C::LAHF(bxInstruction_c *i)
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{
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AH = (get_SF() ? 0x80 : 0) |
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(get_ZF() ? 0x40 : 0) |
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(get_AF() ? 0x10 : 0) |
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(get_PF() ? 0x04 : 0) |
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(0x02) |
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(get_CF() ? 0x01 : 0);
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}
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void
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BX_CPU_C::CLC(bxInstruction_c *i)
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{
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set_CF(0);
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}
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void
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BX_CPU_C::STC(bxInstruction_c *i)
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{
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set_CF(1);
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}
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void
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BX_CPU_C::CLI(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 2
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if (protected_mode()) {
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if (CPL > BX_CPU_THIS_PTR get_IOPL ()) {
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//BX_INFO(("CLI: CPL > IOPL")); /* ??? */
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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}
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#if BX_CPU_LEVEL >= 3
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else if (v8086_mode()) {
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if (BX_CPU_THIS_PTR get_IOPL () != 3) {
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//BX_INFO(("CLI: IOPL != 3")); /* ??? */
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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}
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#endif
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#endif
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BX_CPU_THIS_PTR clear_IF ();
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}
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void
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BX_CPU_C::STI(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 2
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if (protected_mode()) {
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if (CPL > BX_CPU_THIS_PTR get_IOPL ()) {
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//BX_INFO(("STI: CPL > IOPL")); /* ??? */
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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}
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#if BX_CPU_LEVEL >= 3
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else if (v8086_mode()) {
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if (BX_CPU_THIS_PTR get_IOPL () != 3) {
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//BX_INFO(("STI: IOPL != 3")); /* ??? */
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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}
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#endif
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#endif
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if (!BX_CPU_THIS_PTR get_IF ()) {
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BX_CPU_THIS_PTR assert_IF ();
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BX_CPU_THIS_PTR inhibit_mask |= BX_INHIBIT_INTERRUPTS;
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BX_CPU_THIS_PTR async_event = 1;
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}
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}
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void
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BX_CPU_C::CLD(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR clear_DF ();
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}
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void
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BX_CPU_C::STD(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR assert_DF ();
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}
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void
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BX_CPU_C::CMC(bxInstruction_c *i)
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{
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set_CF( !get_CF() );
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}
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void
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BX_CPU_C::PUSHF_Fv(bxInstruction_c *i)
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{
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if (v8086_mode() && (BX_CPU_THIS_PTR get_IOPL ()<3)) {
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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#if BX_CPU_LEVEL >= 3
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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if (i->os32L()) {
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push_64(read_eflags() & 0x00fcffff);
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}
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else
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{
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Bit16u flags16 = read_flags();
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write_virtual_word(BX_SEG_REG_SS, RSP-2, &flags16);
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RSP -= 2;
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}
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}
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else
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#endif
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if (i->os32L()) {
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push_32(read_eflags() & 0x00fcffff);
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}
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else
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#endif
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{
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push_16(read_flags());
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}
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}
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void
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BX_CPU_C::POPF_Fv(bxInstruction_c *i)
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{
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Bit32u changeMask = 0x004dd5;
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Bit32u flags32;
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#if BX_CPU_LEVEL >= 3
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if (protected_mode()) {
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64) {
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Bit64u flags64;
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if (i->os32L()) {
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pop_64(&flags64);
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flags32 = flags64;
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changeMask |= 0x240000; // ID,AC
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if (CPL==0)
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changeMask |= (3<<12); // IOPL
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if (CPL <= BX_CPU_THIS_PTR get_IOPL())
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changeMask |= (1<<9); // IF
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}
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else
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{
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Bit16u flags16;
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read_virtual_word(BX_SEG_REG_SS, RSP, &flags16);
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RSP += 2;
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flags32 = flags16;
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if (CPL==0)
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changeMask |= (3<<12); // IOPL
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if (CPL <= BX_CPU_THIS_PTR get_IOPL())
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changeMask |= (1<<9); // IF
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}
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}
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else
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#endif // #if BX_SUPPORT_X86_64
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if (i->os32L()) {
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pop_32(&flags32);
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changeMask |= 0x240000; // ID,AC
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if (CPL==0)
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changeMask |= (3<<12); // IOPL
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if (CPL <= BX_CPU_THIS_PTR get_IOPL())
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changeMask |= (1<<9); // IF
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}
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else
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#endif // BX_CPU_LEVEL >= 3
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{
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Bit16u flags16;
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pop_16(&flags16);
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flags32 = flags16;
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if (CPL==0)
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changeMask |= (3<<12); // IOPL
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if (CPL <= BX_CPU_THIS_PTR get_IOPL())
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changeMask |= (1<<9); // IF
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}
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// Protected-mode: VIP/VIF cleared, VM unaffected.
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// Does this happen for 16 bit case? fixme!
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flags32 &= ~( (1<<20) | (1<<19) ); // Clear VIP/VIF
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}
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else if (v8086_mode()) {
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if (BX_CPU_THIS_PTR get_IOPL() < 3) {
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exception(BX_GP_EXCEPTION, 0, 0);
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return;
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}
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if (i->os32L()) {
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pop_32(&flags32);
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changeMask |= 0x240000; // ID,AC
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}
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else {
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Bit16u flags16;
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pop_16(&flags16);
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flags32 = flags16;
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}
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// v8086-mode: VM,RF,IOPL,VIP,VIF are unaffected.
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changeMask |= (1<<9); // IF
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}
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else { // Real-mode
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if (i->os32L()) {
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pop_32(&flags32);
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changeMask |= 0x243200; // ID,AC,IOPL,IF
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}
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else { /* 16 bit opsize */
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Bit16u flags16;
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pop_16(&flags16);
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flags32 = flags16;
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changeMask |= 0x3200; // IOPL,IF
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}
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// Real-mode: VIP/VIF cleared, VM unaffected.
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flags32 &= ~( (1<<20) | (1<<19) ); // Clear VIP/VIF
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}
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writeEFlags(flags32, changeMask);
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}
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void
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BX_CPU_C::SALC(bxInstruction_c *i)
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{
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if ( get_CF() ) {
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AL = 0xff;
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}
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else {
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AL = 0x00;
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}
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}
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