f9bd2b74be
2. Fixed bug [ 989478 ] I-Cache and undefined Instruktions The L4 microkernel uses an undefined instruction to trap for a special requests into the kernel (LOCK NOP). The handler fixes this up and gives the user a special code page with syscall stubs. If you're not using the I-Cache optimization everthing works find on bochs. But if you enable the I-Cache (--enable-icache), then the undefined opcode exception is thrown only once for ever virtual address it occurs. See the demodisk of the L4KA::pistachio (http://www.l4ka.org/projects/pistachio/download.php). In this case the pingpong benchmark of this demo is of interest. Everything runs fine until the program tries to spawn a new task for its measurements. This new task shares the code of the creating program. But the new task stops executing at the undefined instruction explained above and no exception is thrown.
475 lines
11 KiB
C++
Executable File
475 lines
11 KiB
C++
Executable File
/////////////////////////////////////////////////////////////////////////
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// Copyright (C) 2004 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#include "softfloatx80.h"
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#include "softfloat-specialize.h"
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extern float_status_t FPU_pre_exception_handling(Bit16u control_word);
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/* D9 F0 */
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void BX_CPU_C::F2XM1(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 result = f2xm1(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("F2XM1: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F1 */
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void BX_CPU_C::FYL2X(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0, 1);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 result = fyl2x(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FYL2X: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F2 */
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void BX_CPU_C::FPTAN(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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clear_C2();
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if (! IS_TAG_EMPTY(-1) || IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Overflow);
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/* The masked response */
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if (BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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BX_WRITE_FPU_REGISTER_AND_TAG(floatx80_default_nan, FPU_Tag_Special, 0);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REGISTER_AND_TAG(floatx80_default_nan, FPU_Tag_Special, 0);
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}
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return;
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}
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extern const floatx80 Const_1;
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 y = BX_READ_FPU_REG(0);
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if (ftan(y, status) == -1)
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{
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FPU_PARTIAL_STATUS |= FPU_SW_C2;
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return;
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}
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if (floatx80_is_nan(y))
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{
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if (! BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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{
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BX_WRITE_FPU_REGISTER_AND_TAG(y, FPU_Tag_Special, 0);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REGISTER_AND_TAG(y, FPU_Tag_Special, 0);
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}
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return;
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}
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(y, 0);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REGISTER_AND_TAG(Const_1, FPU_Tag_Valid, 0);
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#else
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BX_INFO(("FPTAN: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F3 */
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void BX_CPU_C::FPATAN(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0, 1);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 result = fpatan(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FPATAN: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F4 */
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void BX_CPU_C::FXTRACT(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (! IS_TAG_EMPTY(-1) || IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Overflow);
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/* The masked response */
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if (BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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BX_WRITE_FPU_REGISTER_AND_TAG(floatx80_default_nan, FPU_Tag_Special, 0);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REGISTER_AND_TAG(floatx80_default_nan, FPU_Tag_Special, 0);
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}
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = floatx80_extract(a, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(b, 0); // exponent
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(a, 0); // fraction
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#else
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BX_INFO(("FXTRACT: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F5 */
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void BX_CPU_C::FPREM1(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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Bit64u quotient;
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = BX_READ_FPU_REG(1);
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floatx80 result = floatx80_ieee754_remainder(a, b, quotient, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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int cc = 0;
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if (quotient == (Bit64u) -1) cc = FPU_SW_C2;
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else
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{
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if (quotient & 1) cc |= FPU_SW_C1;
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if (quotient & 2) cc |= FPU_SW_C3;
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if (quotient & 4) cc |= FPU_SW_C0;
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}
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setcc(cc);
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FPREM1: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F8 */
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void BX_CPU_C::FPREM(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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Bit64u quotient;
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = BX_READ_FPU_REG(1);
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floatx80 result = floatx80_remainder(a, b, quotient, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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int cc = 0;
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if (quotient == (Bit64u) -1) cc = FPU_SW_C2;
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else
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{
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if (quotient & 1) cc |= FPU_SW_C1;
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if (quotient & 2) cc |= FPU_SW_C3;
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if (quotient & 4) cc |= FPU_SW_C0;
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}
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setcc(cc);
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FPREM: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 F9 */
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void BX_CPU_C::FYL2XP1(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0, 1);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 result = fyl2xp1(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FYL2XP1: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 FB */
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void BX_CPU_C::FSINCOS(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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clear_C2();
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if (! IS_TAG_EMPTY(-1) || IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Overflow);
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/* The masked response */
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if (BX_CPU_THIS_PTR the_i387.is_IA_masked())
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{
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BX_WRITE_FPU_REGISTER_AND_TAG(floatx80_default_nan, FPU_Tag_Special, 0);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REGISTER_AND_TAG(floatx80_default_nan, FPU_Tag_Special, 0);
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}
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 y = BX_READ_FPU_REG(0);
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floatx80 sin_y, cos_y;
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if (fsincos(y, &sin_y, &cos_y, status) == -1)
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{
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FPU_PARTIAL_STATUS |= FPU_SW_C2;
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return;
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}
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(sin_y, 0);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(cos_y, 0);
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#else
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BX_INFO(("FSINCOS: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 FD */
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void BX_CPU_C::FSCALE(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(1))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_scale(BX_READ_FPU_REG(0), BX_READ_FPU_REG(1), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FSCALE: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 FE */
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void BX_CPU_C::FSIN(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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clear_C2();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 y = BX_READ_FPU_REG(0);
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if (fsin(y, status) == -1)
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{
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FPU_PARTIAL_STATUS |= FPU_SW_C2;
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return;
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}
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(y, 0);
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#else
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BX_INFO(("FSIN: required FPU, configure --enable-fpu"));
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#endif
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}
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/* D9 FF */
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void BX_CPU_C::FCOS(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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clear_C2();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word() | FPU_PR_80_BITS);
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floatx80 y = BX_READ_FPU_REG(0);
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if (fcos(y, status) == -1)
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{
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FPU_PARTIAL_STATUS |= FPU_SW_C2;
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return;
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}
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_WRITE_FPU_REG(y, 0);
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#else
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BX_INFO(("FCOS: required FPU, configure --enable-fpu"));
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#endif
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}
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