569 lines
16 KiB
C++
569 lines
16 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011-2014 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_AVX
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bx_address BX_CPP_AttrRegparmN(2) BX_CPU_C::BxResolveGatherD(bxInstruction_c *i, unsigned element)
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{
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Bit32s index = BX_READ_AVX_REG(i->sibIndex()).vmm32s(element);
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if (i->as64L())
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return (BX_READ_64BIT_REG(i->sibBase()) + (((Bit64s) index) << i->sibScale()) + i->displ32s());
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else
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return (Bit32u) (BX_READ_32BIT_REG(i->sibBase()) + (index << i->sibScale()) + i->displ32s());
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}
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bx_address BX_CPP_AttrRegparmN(2) BX_CPU_C::BxResolveGatherQ(bxInstruction_c *i, unsigned element)
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{
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Bit64s index = BX_READ_AVX_REG(i->sibIndex()).vmm64s(element);
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if (i->as64L())
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return (BX_READ_64BIT_REG(i->sibBase()) + (index << i->sibScale()) + i->displ32s());
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else
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return (Bit32u) (BX_READ_32BIT_REG(i->sibBase()) + (index << i->sibScale()) + i->displ32s());
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERDPS_VpsHps(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("%s: incorrect source operands", i->getIaOpcodeNameShort()));
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exception(BX_UD_EXCEPTION, 0);
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}
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BxPackedYmmRegister *mask = &BX_YMM_REG(i->src2()), *dest = &BX_YMM_REG(i->dst());
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// index size = 32, element_size = 32, max vector size = 256
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// num_elements:
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// 128 bit => 4
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// 256 bit => 8
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unsigned n, num_elements = DWORD_ELEMENTS(i->getVL());
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for (n=0; n < num_elements; n++) {
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if (mask->ymm32u(n) & 0x80000000)
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mask->ymm32u(n) = 0xffffffff;
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else
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mask->ymm32u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0; n < 8; n++)
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{
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if (n >= num_elements) {
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mask->ymm32u(n) = 0;
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dest->ymm32u(n) = 0;
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continue;
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}
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if (mask->ymm32u(n)) {
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dest->ymm32u(n) = read_virtual_dword(i->seg(), BxResolveGatherD(i, n));
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}
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mask->ymm32u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_CLEAR_AVX_HIGH256(i->dst());
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BX_CLEAR_AVX_HIGH256(i->src2());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERQPS_VpsHps(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("%s: incorrect source operands", i->getIaOpcodeNameShort()));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 64, element_size = 32, max vector size = 256
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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BxPackedYmmRegister *mask = &BX_YMM_REG(i->src2()), *dest = &BX_YMM_REG(i->dst());
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unsigned n, num_elements = QWORD_ELEMENTS(i->getVL());
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for (n=0; n < num_elements; n++) {
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if (mask->ymm32u(n) & 0x80000000)
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mask->ymm32u(n) = 0xffffffff;
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else
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mask->ymm32u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0; n < 4; n++)
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{
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if (n >= num_elements) {
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mask->ymm32u(n) = 0;
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dest->ymm32u(n) = 0;
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continue;
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}
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if (mask->ymm32u(n)) {
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dest->ymm32u(n) = read_virtual_dword(i->seg(), BxResolveGatherQ(i, n));
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}
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mask->ymm32u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_CLEAR_AVX_HIGH128(i->dst());
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BX_CLEAR_AVX_HIGH128(i->src2());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERDPD_VpdHpd(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("%s: incorrect source operands", i->getIaOpcodeNameShort()));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 32, element_size = 64, max vector size = 256
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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BxPackedYmmRegister *mask = &BX_YMM_REG(i->src2()), *dest = &BX_YMM_REG(i->dst());
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unsigned n, num_elements = QWORD_ELEMENTS(i->getVL());
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for (n=0; n < num_elements; n++) {
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if (mask->ymm64u(n) & BX_CONST64(0x8000000000000000))
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mask->ymm64u(n) = BX_CONST64(0xffffffffffffffff);
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else
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mask->ymm64u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (unsigned n=0; n < 4; n++)
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{
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if (n >= num_elements) {
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mask->ymm64u(n) = 0;
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dest->ymm64u(n) = 0;
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continue;
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}
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if (mask->ymm64u(n)) {
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dest->ymm64u(n) = read_virtual_qword(i->seg(), BxResolveGatherD(i, n));
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}
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mask->ymm64u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_CLEAR_AVX_HIGH256(i->dst());
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BX_CLEAR_AVX_HIGH256(i->src2());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERQPD_VpdHpd(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->src2() || i->sibIndex() == i->dst() || i->src2() == i->dst()) {
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BX_ERROR(("VGATHERQPD_VpdHpd: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 64, element_size = 64, max vector size = 256
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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BxPackedYmmRegister *mask = &BX_YMM_REG(i->src2()), *dest = &BX_YMM_REG(i->dst());
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unsigned n, num_elements = QWORD_ELEMENTS(i->getVL());
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for (n=0; n < num_elements; n++) {
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if (mask->ymm64u(n) & BX_CONST64(0x8000000000000000))
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mask->ymm64u(n) = BX_CONST64(0xffffffffffffffff);
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else
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mask->ymm64u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0; n < 4; n++)
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{
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if (n >= num_elements) {
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mask->ymm64u(n) = 0;
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dest->ymm64u(n) = 0;
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continue;
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}
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if (mask->ymm64u(n)) {
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dest->ymm64u(n) = read_virtual_qword(i->seg(), BxResolveGatherQ(i, n));
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}
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mask->ymm64u(n) = 0;
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_CLEAR_AVX_HIGH256(i->dst());
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BX_CLEAR_AVX_HIGH256(i->src2());
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BX_NEXT_INSTR(i);
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}
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#if BX_SUPPORT_EVEX
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERDPS_MASK_VpsVSib(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->dst()) {
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BX_ERROR(("%s: incorrect source operands", i->getIaOpcodeNameShort()));
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exception(BX_UD_EXCEPTION, 0);
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}
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BxPackedAvxRegister *dest = &BX_AVX_REG(i->dst());
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Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
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// index size = 32, element_size = 32, max vector size = 512
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// num_elements:
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// 128 bit => 4
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// 256 bit => 8
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// 512 bit => 16
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unsigned n, len = i->getVL(), num_elements = DWORD_ELEMENTS(len);
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
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{
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if (opmask & mask) {
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dest->vmm32u(n) = read_virtual_dword(i->seg(), BxResolveGatherD(i, n));
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opmask &= ~mask;
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BX_WRITE_OPMASK(i->opmask(), opmask);
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}
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_WRITE_OPMASK(i->opmask(), 0);
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BX_CLEAR_AVX_REGZ(i->dst(), len);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERQPS_MASK_VpsVSib(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->dst()) {
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BX_ERROR(("%s: incorrect source operands", i->getIaOpcodeNameShort()));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 64, element_size = 32, max vector size = 512
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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// 512 bit => 8
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BxPackedAvxRegister *dest = &BX_AVX_REG(i->dst());
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Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
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unsigned n, len = i->getVL(), num_elements = QWORD_ELEMENTS(len);
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
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{
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if (opmask & mask) {
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dest->vmm32u(n) = read_virtual_dword(i->seg(), BxResolveGatherQ(i, n));
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opmask &= ~mask;
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BX_WRITE_OPMASK(i->opmask(), opmask);
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}
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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// ensure correct upper part clearing of the destination register
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if (len == BX_VL128) dest->vmm64u(1) = 0;
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else len--;
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BX_WRITE_OPMASK(i->opmask(), 0);
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BX_CLEAR_AVX_REGZ(i->dst(), len);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERDPD_MASK_VpdVSib(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->dst()) {
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BX_ERROR(("%s: incorrect source operands", i->getIaOpcodeNameShort()));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 32, element_size = 64, max vector size = 512
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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// 512 bit => 8
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BxPackedAvxRegister *dest = &BX_AVX_REG(i->dst());
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Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
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unsigned n, len = i->getVL(), num_elements = QWORD_ELEMENTS(len);
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
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{
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if (opmask & mask) {
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dest->vmm64u(n) = read_virtual_qword(i->seg(), BxResolveGatherD(i, n));
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opmask &= ~mask;
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BX_WRITE_OPMASK(i->opmask(), opmask);
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}
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_WRITE_OPMASK(i->opmask(), 0);
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BX_CLEAR_AVX_REGZ(i->dst(), len);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VGATHERQPD_MASK_VpdVSib(bxInstruction_c *i)
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{
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if (i->sibIndex() == i->dst()) {
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BX_ERROR(("VGATHERQPD_VpdHpd: incorrect source operands"));
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exception(BX_UD_EXCEPTION, 0);
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}
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// index size = 64, element_size = 64, max vector size = 512
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// num_elements:
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// 128 bit => 2
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// 256 bit => 4
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// 512 bit => 8
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BxPackedAvxRegister *dest = &BX_AVX_REG(i->dst());
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Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
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unsigned n, len = i->getVL(), num_elements = QWORD_ELEMENTS(len);
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
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{
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if (opmask & mask) {
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dest->vmm64u(n) = read_virtual_qword(i->seg(), BxResolveGatherQ(i, n));
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opmask &= ~mask;
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BX_WRITE_OPMASK(i->opmask(), opmask);
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}
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_WRITE_OPMASK(i->opmask(), 0);
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BX_CLEAR_AVX_REGZ(i->dst(), len);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VSCATTERDPS_MASK_VSibVps(bxInstruction_c *i)
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{
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BxPackedAvxRegister *src = &BX_AVX_REG(i->src());
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Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
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// index size = 32, element_size = 32, max vector size = 512
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// num_elements:
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// 128 bit => 4
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// 256 bit => 8
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// 512 bit => 16
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unsigned n, num_elements = DWORD_ELEMENTS(i->getVL());
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#if BX_SUPPORT_ALIGNMENT_CHECK
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unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
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BX_CPU_THIS_PTR alignment_check_mask = 0;
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#endif
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for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
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{
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if (opmask & mask) {
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write_virtual_dword(i->seg(), BxResolveGatherD(i, n), src->vmm32u(n));
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opmask &= ~mask;
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BX_WRITE_OPMASK(i->opmask(), opmask);
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}
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}
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#if BX_SUPPORT_ALIGNMENT_CHECK
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BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
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#endif
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BX_WRITE_OPMASK(i->opmask(), 0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VSCATTERQPS_MASK_VSibVps(bxInstruction_c *i)
|
|
{
|
|
BxPackedAvxRegister *src = &BX_AVX_REG(i->src());
|
|
Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
|
|
|
|
// index size = 64, element_size = 32, max vector size = 512
|
|
// num_elements:
|
|
// 128 bit => 2
|
|
// 256 bit => 4
|
|
// 512 bit => 8
|
|
|
|
unsigned n, num_elements = QWORD_ELEMENTS(i->getVL());
|
|
|
|
#if BX_SUPPORT_ALIGNMENT_CHECK
|
|
unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
|
|
BX_CPU_THIS_PTR alignment_check_mask = 0;
|
|
#endif
|
|
|
|
for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
|
|
{
|
|
if (opmask & mask) {
|
|
write_virtual_dword(i->seg(), BxResolveGatherQ(i, n), src->vmm32u(n));
|
|
opmask &= ~mask;
|
|
BX_WRITE_OPMASK(i->opmask(), opmask);
|
|
}
|
|
}
|
|
|
|
#if BX_SUPPORT_ALIGNMENT_CHECK
|
|
BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
|
|
#endif
|
|
|
|
BX_WRITE_OPMASK(i->opmask(), 0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VSCATTERDPD_MASK_VSibVpd(bxInstruction_c *i)
|
|
{
|
|
BxPackedAvxRegister *src = &BX_AVX_REG(i->src());
|
|
Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
|
|
|
|
// index size = 32, element_size = 64, max vector size = 512
|
|
// num_elements:
|
|
// 128 bit => 2
|
|
// 256 bit => 4
|
|
// 512 bit => 8
|
|
|
|
unsigned n, num_elements = QWORD_ELEMENTS(i->getVL());
|
|
|
|
#if BX_SUPPORT_ALIGNMENT_CHECK
|
|
unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
|
|
BX_CPU_THIS_PTR alignment_check_mask = 0;
|
|
#endif
|
|
|
|
for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
|
|
{
|
|
if (opmask & mask) {
|
|
write_virtual_qword(i->seg(), BxResolveGatherD(i, n), src->vmm64u(n));
|
|
opmask &= ~mask;
|
|
BX_WRITE_OPMASK(i->opmask(), opmask);
|
|
}
|
|
}
|
|
|
|
#if BX_SUPPORT_ALIGNMENT_CHECK
|
|
BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
|
|
#endif
|
|
|
|
BX_WRITE_OPMASK(i->opmask(), 0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VSCATTERQPD_MASK_VSibVpd(bxInstruction_c *i)
|
|
{
|
|
BxPackedAvxRegister *src = &BX_AVX_REG(i->src());
|
|
Bit64u opmask = BX_READ_OPMASK(i->opmask()), mask;
|
|
|
|
// index size = 64, element_size = 64, max vector size = 512
|
|
// num_elements:
|
|
// 128 bit => 2
|
|
// 256 bit => 4
|
|
// 512 bit => 8
|
|
|
|
unsigned n, num_elements = QWORD_ELEMENTS(i->getVL());
|
|
|
|
#if BX_SUPPORT_ALIGNMENT_CHECK
|
|
unsigned save_alignment_check_mask = BX_CPU_THIS_PTR alignment_check_mask;
|
|
BX_CPU_THIS_PTR alignment_check_mask = 0;
|
|
#endif
|
|
|
|
for (n=0, mask = 0x1; n < num_elements; n++, mask <<= 1)
|
|
{
|
|
if (opmask & mask) {
|
|
write_virtual_qword(i->seg(), BxResolveGatherQ(i, n), src->vmm64u(n));
|
|
opmask &= ~mask;
|
|
BX_WRITE_OPMASK(i->opmask(), opmask);
|
|
}
|
|
}
|
|
|
|
#if BX_SUPPORT_ALIGNMENT_CHECK
|
|
BX_CPU_THIS_PTR alignment_check_mask = save_alignment_check_mask;
|
|
#endif
|
|
|
|
BX_WRITE_OPMASK(i->opmask(), 0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#endif // BX_SUPPORT_EVEX
|
|
|
|
#endif
|