For APIC-access VM exits and for VM exits caused by:
- EPT violations
- EPT misconfigurations
- page-modification log-full events or
- SPP-related events
the value saved depends on whether the VM exit occurred during delivery of an event through the IDT ...
also handle RFlags saved if VMEXIT was caused directly by an event that would normally be delivered through the IDT
should fix#215
First step into implementing UINTR - User Level Interrupts ISA extension
To be continued
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Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
CET 'change' some x86 behavior
For example EPTP[7] become not-reserved and write to it not fail anymore
VMX doesn't check error code for CP exception if CET is enabled
These behaviors these changed even when CET was not compiled in
from Fixes in VM Entry Checks for Guest Segment Registers #51
Correction in checks for Code Segment (CS):
Previously, the DPL of CS was incorrectly compared with its own RPL.
According to Intel SDM, Vol. 3C, Chapter 27.3.1.2, for non-conforming code segments (type 9 or 11), the DPL of CS should be equal to the DPL of SS.
And for conforming code segments (type 13 or 15), the DPL of CS cannot be greater than the DPL of SS.
This way VMCS is not accessed multiple times which is important for some usages
Fixes in VM Entry Checks for Guest Segment Registers #51
Correction in Type range checks for DS, ES, FS, GS:
The original code erroneously applied the check for types less than 11, excluding types equal to 11.
This is not in accordance with Intel SDM, Vol. 3C, Chapter 27.3.1.2, which states that the check should include types equal to or less than 11.
This fix corrects this by including types equal to or less than 11 in the check.
* Fix that the blocking by SMI bit is set
The blocking by SMI bit of the guest interruptibility state VMCS should
not be set unless the VM-exit ends in SMM. This only happens under the
dual-monitor treatment, which is not implemented in Bochs.
* Remove trailing whitespaces
- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
This enable better compiler optimizations and reduce binary size
Only missing items (to be added soon):
- Supervisor Shadow Stack EPT Control is not implemented yet
- SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet