minor coding style modifications
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431b3215fd
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097c8f13b9
@ -76,16 +76,16 @@ int apic_bus_deliver_interrupt(Bit8u vector, apic_dest_t dest, Bit8u delivery_mo
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// logical destination mode
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if(dest == 0) return 0;
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bool interrupt_delivered = 0;
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bool interrupt_delivered = false;
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for (int i=0; i<BX_NUM_LOCAL_APICS; i++) {
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if(BX_CPU_APIC(i)->match_logical_addr(dest)) {
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BX_CPU_APIC(i)->deliver(vector, delivery_mode, trig_mode);
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interrupt_delivered = 1;
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interrupt_delivered = true;
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}
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}
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return interrupt_delivered;
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return (int) interrupt_delivered;
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}
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}
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@ -935,13 +935,13 @@ void bx_local_apic_c::print_status(void)
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bool bx_local_apic_c::match_logical_addr(apic_dest_t address)
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{
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bool match = 0;
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bool match = false;
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#if BX_CPU_LEVEL >= 6
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if (mode == BX_APIC_X2APIC_MODE) {
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// only cluster model supported in x2apic mode
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if (address == 0xffffffff) // // broadcast all
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return 1;
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return true;
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if ((address & 0xffff0000) == (ldr & 0xffff0000))
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match = ((address & ldr & 0x0000ffff) != 0);
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return match;
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@ -957,7 +957,7 @@ bool bx_local_apic_c::match_logical_addr(apic_dest_t address)
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else if (dest_format == 0) {
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// cluster model
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if (address == 0xff) // broadcast all
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return 1;
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return true;
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if ((unsigned)(address & 0xf0) == (unsigned)(ldr & 0xf0))
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match = ((address & ldr & 0x0f) != 0);
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@ -655,7 +655,7 @@ int BX_CPU_C::check_entry_PAE(const char *s, Bit64u entry, Bit64u reserved, unsi
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if (entry & PAGE_DIRECTORY_NX_BIT) {
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if (rw == BX_EXECUTE) {
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BX_DEBUG(("PAE %s: non-executable page fault occurred", s));
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*nx_fault = 1;
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*nx_fault = true;
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}
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}
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@ -690,7 +690,7 @@ bx_phy_address BX_CPU_C::translate_linear_long_mode(bx_address laddr, Bit32u &lp
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Bit64u entry[4];
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BxMemtype entry_memtype[4] = { 0 };
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bool nx_fault = 0;
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bool nx_fault = false;
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int leaf;
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Bit64u offset_mask = BX_CONST64(0x0000ffffffffffff);
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@ -984,7 +984,7 @@ bx_phy_address BX_CPU_C::translate_linear_PAE(bx_address laddr, Bit32u &lpf_mask
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bx_phy_address entry_addr[2];
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Bit64u entry[2];
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BxMemtype entry_memtype[2] = { 0 };
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bool nx_fault = 0;
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bool nx_fault = false;
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int leaf;
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lpf_mask = 0xfff;
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@ -1641,7 +1641,7 @@ bx_phy_address BX_CPU_C::nested_walk_long_mode(bx_phy_address guest_paddr, unsig
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bx_phy_address entry_addr[4];
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Bit64u entry[4];
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BxMemtype entry_memtype[4] = { BX_MEMTYPE_INVALID };
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bool nx_fault = 0;
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bool nx_fault = false;
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int leaf;
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SVM_CONTROLS *ctrls = &BX_CPU_THIS_PTR vmcb.ctrls;
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@ -1705,7 +1705,7 @@ bx_phy_address BX_CPU_C::nested_walk_PAE(bx_phy_address guest_paddr, unsigned rw
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bx_phy_address entry_addr[2];
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Bit64u entry[2];
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BxMemtype entry_memtype[2] = { BX_MEMTYPE_INVALID };
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bool nx_fault = 0;
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bool nx_fault = false;
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int leaf;
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unsigned combined_access = BX_COMBINED_ACCESS_WRITE | BX_COMBINED_ACCESS_USER;
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@ -220,10 +220,10 @@ static unsigned smram_map[SMRAM_FIELD_LAST];
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void BX_CPU_C::init_SMRAM(void)
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{
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static bool smram_map_ready = 0;
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static bool smram_map_ready = false;
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if (smram_map_ready) return;
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smram_map_ready = 1;
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smram_map_ready = true;
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smram_map[SMRAM_FIELD_SMBASE_OFFSET] = SMRAM_TRANSLATE(0x7f00);
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smram_map[SMRAM_FIELD_SMM_REVISION_ID] = SMRAM_TRANSLATE(0x7efc);
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@ -402,7 +402,7 @@ bool BX_CPU_C::SvmEnterLoadCheckGuestState(void)
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SVM_GUEST_STATE guest;
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Bit32u tmp;
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unsigned n;
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bool paged_real_mode = 0;
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bool paged_real_mode = false;
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guest.eflags = vmcb_read32(SVM_GUEST_RFLAGS);
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guest.rip = vmcb_read64(SVM_GUEST_RIP);
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@ -486,7 +486,7 @@ bool BX_CPU_C::SvmEnterLoadCheckGuestState(void)
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if (! guest.cr0.get_PE() && guest.cr0.get_PG()) {
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// special case : entering paged real mode
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BX_DEBUG(("VMRUN: entering paged real mode"));
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paged_real_mode = 1;
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paged_real_mode = true;
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guest.cr0.val32 &= ~BX_CR0_PG_MASK;
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}
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}
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@ -894,7 +894,7 @@ void BX_CPU_C::SvmInterceptMSR(unsigned op, Bit32u msr)
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BX_ASSERT(op == BX_READ || op == BX_WRITE);
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bool vmexit = 1;
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bool vmexit = true;
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int msr_map_offset = -1;
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if (msr <= 0x1fff) msr_map_offset = 0;
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@ -131,9 +131,9 @@ void BX_CPU_C::init_VMCS(void)
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init_vmx_capabilities();
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static bool vmcs_map_ready = 0;
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static bool vmcs_map_ready = false;
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if (vmcs_map_ready) return;
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vmcs_map_ready = 1;
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vmcs_map_ready = true;
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// disable not supported encodings
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for (unsigned type=0; type<16; type++) {
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@ -206,19 +206,19 @@ void BX_CPU_C::VMexit_Event(unsigned type, unsigned vector, Bit16u errcode, bool
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if (! BX_CPU_THIS_PTR in_vmx_guest) return;
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VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
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bool vmexit = 0;
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bool vmexit = false;
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VMX_vmexit_reason reason = VMX_VMEXIT_EXCEPTION_NMI;
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switch(type) {
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case BX_EXTERNAL_INTERRUPT:
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reason = VMX_VMEXIT_EXTERNAL_INTERRUPT;
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if (PIN_VMEXIT(VMX_VM_EXEC_CTRL1_EXTERNAL_INTERRUPT_VMEXIT))
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vmexit = 1;
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vmexit = true;
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break;
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case BX_NMI:
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if (PIN_VMEXIT(VMX_VM_EXEC_CTRL1_NMI_EXITING))
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vmexit = 1;
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vmexit = true;
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break;
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case BX_PRIVILEGED_SOFTWARE_INTERRUPT:
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@ -322,32 +322,32 @@ void BX_CPP_AttrRegparmN(2) BX_CPU_C::VMexit_MSR(unsigned op, Bit32u msr)
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{
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BX_ASSERT(BX_CPU_THIS_PTR in_vmx_guest);
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bool vmexit = 0;
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if (! VMEXIT(VMX_VM_EXEC_CTRL2_MSR_BITMAPS)) vmexit = 1;
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bool vmexit = false;
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if (! VMEXIT(VMX_VM_EXEC_CTRL2_MSR_BITMAPS)) vmexit = true;
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else {
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VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
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Bit8u field;
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if (msr >= BX_VMX_HI_MSR_START) {
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if (msr > BX_VMX_HI_MSR_END) vmexit = 1;
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if (msr > BX_VMX_HI_MSR_END) vmexit = true;
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else {
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// check MSR-HI bitmaps
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bx_phy_address pAddr = vm->msr_bitmap_addr + ((msr - BX_VMX_HI_MSR_START) >> 3) + 1024 + ((op == VMX_VMEXIT_RDMSR) ? 0 : 2048);
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access_read_physical(pAddr, 1, &field);
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BX_NOTIFY_PHY_MEMORY_ACCESS(pAddr, 1, MEMTYPE(resolve_memtype(pAddr)), BX_READ, BX_MSR_BITMAP_ACCESS, &field);
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if (field & (1 << (msr & 7)))
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vmexit = 1;
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vmexit = true;
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}
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}
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else {
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if (msr > BX_VMX_LO_MSR_END) vmexit = 1;
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if (msr > BX_VMX_LO_MSR_END) vmexit = true;
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else {
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// check MSR-LO bitmaps
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bx_phy_address pAddr = vm->msr_bitmap_addr + (msr >> 3) + ((op == VMX_VMEXIT_RDMSR) ? 0 : 2048);
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access_read_physical(pAddr, 1, &field);
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BX_NOTIFY_PHY_MEMORY_ACCESS(pAddr, 1, MEMTYPE(resolve_memtype(pAddr)), BX_READ, BX_MSR_BITMAP_ACCESS, &field);
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if (field & (1 << (msr & 7)))
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vmexit = 1;
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vmexit = true;
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}
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}
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}
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@ -368,11 +368,11 @@ void BX_CPP_AttrRegparmN(3) BX_CPU_C::VMexit_IO(bxInstruction_c *i, unsigned por
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BX_ASSERT(BX_CPU_THIS_PTR in_vmx_guest);
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BX_ASSERT(port <= 0xFFFF);
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bool vmexit = 0;
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bool vmexit = false;
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if (VMEXIT(VMX_VM_EXEC_CTRL2_IO_BITMAPS)) {
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// always VMEXIT on port "wrap around" case
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if ((port + len) > 0x10000) vmexit = 1;
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if ((port + len) > 0x10000) vmexit = true;
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else {
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Bit8u bitmap[2];
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bx_phy_address pAddr;
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@ -402,10 +402,10 @@ void BX_CPP_AttrRegparmN(3) BX_CPU_C::VMexit_IO(bxInstruction_c *i, unsigned por
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combined_bitmap = (combined_bitmap << 8) | bitmap[0];
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unsigned mask = ((1 << len) - 1) << (port & 7);
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if (combined_bitmap & mask) vmexit = 1;
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if (combined_bitmap & mask) vmexit = true;
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}
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}
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else if (VMEXIT(VMX_VM_EXEC_CTRL2_IO_VMEXIT)) vmexit = 1;
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else if (VMEXIT(VMX_VM_EXEC_CTRL2_IO_VMEXIT)) vmexit = true;
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if (vmexit) {
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BX_DEBUG(("VMEXIT: I/O port 0x%04x", port));
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@ -520,13 +520,13 @@ Bit32u BX_CPP_AttrRegparmN(2) BX_CPU_C::VMexit_LMSW(bxInstruction_c *i, Bit32u m
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VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
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Bit32u mask = vm->vm_cr0_mask & 0xF; /* LMSW affects only low 4 bits */
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bool vmexit = 0;
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bool vmexit = false;
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if ((mask & msw & 0x1) != 0 && (vm->vm_cr0_read_shadow & 0x1) == 0)
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vmexit = 1;
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vmexit = true;
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if ((mask & vm->vm_cr0_read_shadow & 0xE) != (mask & msw & 0xE))
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vmexit = 1;
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vmexit = true;
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if (vmexit) {
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BX_DEBUG(("VMEXIT: CR0 write by LMSW of value 0x%04x", msw));
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@ -1053,7 +1053,7 @@ VMX_error_code BX_CPU_C::VMenterLoadCheckHostState(void)
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{
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VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
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VMCS_HOST_STATE *host_state = &vm->host_state;
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bool x86_64_host = 0, x86_64_guest = 0;
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bool x86_64_host = false, x86_64_guest = false;
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//
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// VM Host State Checks Related to Address-Space Size
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@ -1061,11 +1061,11 @@ VMX_error_code BX_CPU_C::VMenterLoadCheckHostState(void)
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Bit32u vmexit_ctrls = vm->vmexit_ctrls;
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if (vmexit_ctrls & VMX_VMEXIT_CTRL1_HOST_ADDR_SPACE_SIZE) {
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x86_64_host = 1;
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x86_64_host = true;
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}
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Bit32u vmentry_ctrls = vm->vmentry_ctrls;
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if (vmentry_ctrls & VMX_VMENTRY_CTRL1_X86_64_GUEST) {
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x86_64_guest = 1;
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x86_64_guest = true;
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}
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#if BX_SUPPORT_X86_64
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@ -1339,16 +1339,16 @@ Bit32u BX_CPU_C::VMenterLoadCheckGuestState(Bit64u *qualification)
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return VMX_VMEXIT_VMENTRY_FAILURE_GUEST_STATE;
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}
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bool v8086_guest = 0;
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bool v8086_guest = false;
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if (guest.rflags & EFlagsVMMask)
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v8086_guest = 1;
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v8086_guest = true;
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bool x86_64_guest = 0; // can't be 1 if X86_64 is not supported (checked before)
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bool x86_64_guest = false; // can't be 1 if X86_64 is not supported (checked before)
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Bit32u vmentry_ctrls = vm->vmentry_ctrls;
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#if BX_SUPPORT_X86_64
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if (vmentry_ctrls & VMX_VMENTRY_CTRL1_X86_64_GUEST) {
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BX_DEBUG(("VMENTER to x86-64 guest"));
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x86_64_guest = 1;
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x86_64_guest = true;
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}
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#endif
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@ -1388,9 +1388,9 @@ Bit32u BX_CPU_C::VMenterLoadCheckGuestState(Bit64u *qualification)
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}
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#if BX_SUPPORT_VMX >= 2
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bool real_mode_guest = 0;
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bool real_mode_guest = false;
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if (! (guest.cr0 & BX_CR0_PE_MASK))
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real_mode_guest = 1;
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real_mode_guest = true;
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#endif
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guest.cr3 = VMread_natural(VMCS_GUEST_CR3);
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@ -2188,7 +2188,7 @@ void BX_CPU_C::VMenterInjectEvents(void)
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}
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}
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bool is_INT = 0;
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bool is_INT = false;
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switch(type) {
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case BX_EXTERNAL_INTERRUPT:
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case BX_HARDWARE_EXCEPTION:
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@ -2206,12 +2206,12 @@ void BX_CPU_C::VMenterInjectEvents(void)
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case BX_PRIVILEGED_SOFTWARE_INTERRUPT:
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BX_CPU_THIS_PTR EXT = 1;
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is_INT = 1;
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is_INT = true;
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break;
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case BX_SOFTWARE_INTERRUPT:
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case BX_SOFTWARE_EXCEPTION:
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is_INT = 1;
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is_INT = true;
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break;
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default:
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@ -2484,14 +2484,14 @@ void BX_CPU_C::VMexitSaveGuestState(void)
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void BX_CPU_C::VMexitLoadHostState(void)
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{
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VMCS_HOST_STATE *host_state = &BX_CPU_THIS_PTR vmcs.host_state;
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bool x86_64_host = 0;
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bool x86_64_host = false;
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BX_CPU_THIS_PTR tsc_offset = 0;
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#if BX_SUPPORT_X86_64
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Bit32u vmexit_ctrls = BX_CPU_THIS_PTR vmcs.vmexit_ctrls;
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if (vmexit_ctrls & VMX_VMEXIT_CTRL1_HOST_ADDR_SPACE_SIZE) {
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BX_DEBUG(("VMEXIT to x86-64 host"));
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x86_64_host = 1;
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x86_64_host = true;
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}
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#if BX_SUPPORT_VMX >= 2
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