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550 Commits

Author SHA1 Message Date
Stanislav Shwartsman
dfef46e311 removed unused variables 2004-03-10 20:39:47 +00:00
Stanislav Shwartsman
58a7652aea fixed problems in BCD instructions 2004-03-10 20:14:56 +00:00
Stanislav Shwartsman
8484a03394 Fixed BCD instructions to be suitable with Intel docs 2004-03-09 20:45:17 +00:00
Stanislav Shwartsman
f50f664b10 * fixed convert float2int SSE instructions (bugfix in softfloat lib) 
* set default .bochssrc IPS to 10M
 2004-03-08 05:29:14 +00:00
Stanislav Shwartsman
97135a723f floatx80 bugfixes 2004-03-05 11:39:10 +00:00
Stanislav Shwartsman
f5316dad70 fixed bug in HADDPD/HSUBPD instructions 2004-03-05 09:19:58 +00:00
Stanislav Shwartsman
652d4ca24f wouldn't elliminate aligment for now 2004-03-03 21:15:19 +00:00
Stanislav Shwartsman
1706beda30 fixed bug in floatx80_class function 
mmx code optimizations
 2004-03-03 21:09:08 +00:00
Stanislav Shwartsman
f552a1c861 Apply patches: 
907163 ctrl_xfer8 clean/speed up   2004-02-29 14:32 nobody psychosmurf
907161 clean/speed up of io.cc   2004-02-29 14:31 nobody psychosmurf
 2004-03-02 20:48:48 +00:00
Stanislav Shwartsman
6b565750b7 port changes in softfloat to main trunk 2004-02-28 09:46:46 +00:00
Stanislav Shwartsman
3f7c794b26 commit patch 
899972 data xfer performance patch V 2.0.4   2004-02-18 15:38 nobody psychosmur
 2004-02-26 19:17:40 +00:00
Stanislav Shwartsman
c2959f7685 added floatx80_compares for future use with FPU code 
fixed floatx80 prototypes
 2004-02-25 19:18:56 +00:00
Stanislav Shwartsman
9d7d634ebc add these files to main trunk later 2004-02-21 14:48:42 +00:00
Stanislav Shwartsman
adbdde37e9 merge with latest CVS 2004-02-21 14:40:39 +00:00
Stanislav Shwartsman
320ae34cb9 Fix compile error 2004-02-18 05:22:07 +00:00
Stanislav Shwartsman
c3066a44bb added functions to softfloat for future fpu implementation 2004-02-17 21:59:24 +00:00
Christophe Bothamy
e17995f5db - host asms in a specific file 
- add msvcc host asm instructions, patch by suzu
 2004-02-15 17:57:45 +00:00
Stanislav Shwartsman
cc7b85ae7e just update release dates 2004-02-13 21:27:45 +00:00
Stanislav Shwartsman
196aee98d7 Fix for FWAIT instruction 2004-02-12 21:34:28 +00:00
Christophe Bothamy
45bd1edfbf - apply patch #894595 MSR_APICBASE always returns APIC ADDRESS 0 
by Kangmo Kim
 2004-02-12 00:56:21 +00:00
Christophe Bothamy
82429b5ac5 - fixes for booting OS/2 by Dmitri Froloff 
- v8086 priveleged instruction processing bug (was also reported by
  LightCone Aug  7 2003)
  - exception process bug (was reported by Diego Henriquez Sat Nov 15
  01:16:51 CET 2003)
  - segment validation with IRET instruction
  - CS segment not present exception processing with IRET
 2004-02-11 23:47:55 +00:00
Stanislav Shwartsman
75bbf3bc5f remove duplicated include 2004-02-11 20:04:34 +00:00
Daniel Gimpelevich
5366cc369e Added Brian Huffman's Sound for OSX code with a couple of tweaks. 2004-02-09 22:23:53 +00:00
Daniel Gimpelevich
126971af49 Made to compile on MacOS9 2004-02-06 22:28:00 +00:00
Stanislav Shwartsman
c84deba786 * FNOP instruction checks for pending FPU exceptions 
* prepared softfloatx80 code for future use with FPU
 2004-02-06 12:45:43 +00:00
Christophe Bothamy
4a22763b3a - fix sign comparison whenchecking io address in the tss io bitmap 2004-02-03 02:03:24 +00:00
Stanislav Shwartsman
dd38f0b021 fixed performance bug 
aligment field changed from 32bit (unsigned) to 8bit (unsigned char) as it should be
 2004-02-01 20:19:52 +00:00
Stanislav Shwartsman
ecdbf40aac fixed compilation error for case when 3dnow! enabled and sse not 2004-01-31 17:13:05 +00:00
Stanislav Shwartsman
77cb1436fb fix bug 2004-01-31 15:11:41 +00:00
Stanislav Shwartsman
9120961241 update checking for pending FPU exceptions code 2004-01-31 13:43:26 +00:00
Michael Brown
d1922bc835 Changed #ifdef MAGIC_BREAKPOINT to #if BX_MAGIC_BREAKPOINT and added a 
configure script option --enable-magic-breakpoints (enabled by default).

Documented the instruction required to trigger the magic breakpoint
(xchgw %bx,%bx).
 2004-01-29 17:49:03 +00:00
Christophe Bothamy
be57f55969 - fix FWAIT instruction acording to intel specs 
NM exception is raised only when cr0.mp and cr0.ts are set
 2004-01-18 16:42:05 +00:00
Daniel Gimpelevich
ae66bb33c0 Applied Russ Cox's CPU panic debug patch from Oct 2003. 2004-01-17 08:36:29 +00:00
Stanislav Shwartsman
49c6fd55e4 Remove redundant ifdefs 2004-01-10 19:45:53 +00:00
Stanislav Shwartsman
f3730cd784 Implemented two last SSE instructions RSQRTSS and RSQRTPS 
MSDEV workspaces updated with new file
CPUID will detect and CPU will execute FXSAVE/FXRSTOR instructions when cpu-level-hacked=6 and not only when cpu-level=6
 2003-12-31 17:35:43 +00:00
Stanislav Shwartsman
2dae51fc3f Fixed compilation error 2003-12-30 23:14:47 +00:00
Stanislav Shwartsman
52d75d7aed Fast table-based implementation of reciprocal (RCPSS/RCPPS) 
This implemntation is much more clear than old one.
RSQRTSS/RSQRTPS coming soon.
 2003-12-30 23:06:59 +00:00
Christophe Bothamy
e7e0b40bd1 - remove calculation on cr3 in dtranslate_linear, one of the most called functions (patch by Conn Clark) 2003-12-30 22:12:45 +00:00
Christophe Bothamy
e3bec02532 - fix bug preventing x86-64 detection 2003-12-30 14:14:28 +00:00
Stanislav Shwartsman
6fe8e9260b remove redundant CPU LEVEL checks for x86-64 2003-12-29 21:47:36 +00:00
Daniel Gimpelevich
fb80d47dbf *** empty log message *** 2003-12-29 21:24:35 +00:00
Stanislav Shwartsman
be9c0aeeec Enable FXSAVE/FXRESTOR instructions for BX_HACKED_CPU_LEVEL=6 also 2003-12-29 21:23:46 +00:00
Stanislav Shwartsman
b770d809d3 Clearify disagnostic messages. 
Remove redundant cpu level checks for x86-64
 2003-12-29 21:20:58 +00:00
Stanislav Shwartsman
7deb9491da Fixed compilation error for FPU disabled case 2003-12-29 20:26:05 +00:00
Daniel Gimpelevich
68fd1dc95b cleanup optimizations & fix compile error 2003-12-29 07:28:28 +00:00
Stanislav Shwartsman
fd60a984a0 Instructions that should not check pending FPU exceptions 2003-12-28 18:58:15 +00:00
Stanislav Shwartsman
0eb71999db Added missed 287 opcodes which should be executed as NOP in 387+ 2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
9ccb363ec3 bochs style decode/execute of FPU instructions. 
With this coding style each instruction could be implemented separatelly even not together with current Bochs FPU emulator.
Step-by-step I am going to transfer all FPU instructions from current Bochs FPU emulator to new style and remove an old bugged emulator.
Anyway, now I could implement all currently missed FPU instructions without hacking wm-fpu-emu.
 2003-12-27 13:50:06 +00:00
Stanislav Shwartsman
ab6b9c7dcb New table-based disassembler: 
* Fully supports
	* MMX/XMM/3DNOW instruction sets
	* FPU instruction
	* SSE3 extensions
 currently only 16/32 bit mode bug anyway, it is much better that old one ;)
 2003-12-24 20:32:59 +00:00
Daniel Gimpelevich
fff74a6f83 Fixed incompatibility with gcc3.3, I think. 2003-11-28 15:07:29 +00:00