Stanislav Shwartsman
e2f4eff91a
fixed compilation of instrumentation examples with debugger OFF
2023-04-06 22:18:01 +03:00
Stanislav Shwartsman
1e4f1624c8
remove trailing whitespace from source files
2022-08-23 21:46:04 +03:00
Stanislav Shwartsman
1bf18b8aae
! CPUID: Added TigerLake CPU definition (features CET and CLWB support)
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- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
This enable better compiler optimizations and reduce binary size
2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
22774a0534
support for AT&T (GAS) disasm style in new disassembler
2021-01-02 11:12:23 +00:00
Stanislav Shwartsman
6e2541daa6
CET: DS Seg override is kept for CET Endranch suppress hint even if overridden by other prefixes later
2020-02-21 19:38:23 +00:00
Stanislav Shwartsman
f90e5f4f44
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
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Only missing items (to be added soon):
- Supervisor Shadow Stack EPT Control is not implemented yet
- SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
eb009ddd00
fixed VPACKSSDW/VPACKUSDW opcodes - allow broadcast
2019-12-13 12:53:48 +00:00
Stanislav Shwartsman
3da93728b3
split some opcode reference tables in new decoder between x86-64 and 32 for better perf
2019-02-17 21:22:54 +00:00
Stanislav Shwartsman
773f1b7e42
cleanup return value of all instruction handlers
2018-02-16 07:57:32 +00:00
Stanislav Shwartsman
8a311515dd
correctly decode VPEXTRB/W/D/Q - these opcodes allowed to be with VEX.L=0 only
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fixed disasm module compilation with no AVX enabled
remove duplicate opcode handlers
2017-12-13 19:51:25 +00:00
Stanislav Shwartsman
c8d9aeb377
mark blocks of code which not supposed to be compiled for stand-alone bochs cpu decoder
2017-11-27 20:25:04 +00:00
Stanislav Shwartsman
596b3b6eb8
reduce CPU dependencies from fetchdecode module
2017-11-25 20:20:34 +00:00
Stanislav Shwartsman
8261a91ce9
implemented GFNI instructions
2017-10-21 19:57:12 +00:00
Stanislav Shwartsman
5439647254
small change to extract ia_opcodes.h from instr.h to dedicated file. this would remove compilation dep of all files on ia_opcodes.h (now called ia_opcdes.def). regenerating dep ober all files in Makefiles.in
2017-10-19 21:27:25 +00:00
Stanislav Shwartsman
8664f8f21e
add vex.w into bxInstruction to be used in disasm
2017-01-28 19:25:30 +00:00
Stanislav Shwartsman
6761495f7e
second step if Bochs decoder refactoring: extracted assign_srcs code to separate methods
2016-07-05 20:42:25 +00:00
Stanislav Shwartsman
7a34f00f99
extracted fetchdecode into separated folder under cpu and also out of BX_CPU_C class into stand-alone module. Next step: wrap it up nicely and define clear interace to CPU model to minimize dependencies. Ideally I need fetchdecode to not include CPU at all
2016-06-12 21:23:48 +00:00
