Stanislav Shwartsman
|
773f1b7e42
|
cleanup return value of all instruction handlers
|
2018-02-16 07:57:32 +00:00 |
|
Stanislav Shwartsman
|
8a311515dd
|
correctly decode VPEXTRB/W/D/Q - these opcodes allowed to be with VEX.L=0 only
fixed disasm module compilation with no AVX enabled
remove duplicate opcode handlers
|
2017-12-13 19:51:25 +00:00 |
|
Stanislav Shwartsman
|
c8d9aeb377
|
mark blocks of code which not supposed to be compiled for stand-alone bochs cpu decoder
|
2017-11-27 20:25:04 +00:00 |
|
Stanislav Shwartsman
|
596b3b6eb8
|
reduce CPU dependencies from fetchdecode module
|
2017-11-25 20:20:34 +00:00 |
|
Stanislav Shwartsman
|
8261a91ce9
|
implemented GFNI instructions
|
2017-10-21 19:57:12 +00:00 |
|
Stanislav Shwartsman
|
5439647254
|
small change to extract ia_opcodes.h from instr.h to dedicated file. this would remove compilation dep of all files on ia_opcodes.h (now called ia_opcdes.def). regenerating dep ober all files in Makefiles.in
|
2017-10-19 21:27:25 +00:00 |
|
Stanislav Shwartsman
|
8664f8f21e
|
add vex.w into bxInstruction to be used in disasm
|
2017-01-28 19:25:30 +00:00 |
|
Stanislav Shwartsman
|
6761495f7e
|
second step if Bochs decoder refactoring: extracted assign_srcs code to separate methods
|
2016-07-05 20:42:25 +00:00 |
|
Stanislav Shwartsman
|
7a34f00f99
|
extracted fetchdecode into separated folder under cpu and also out of BX_CPU_C class into stand-alone module. Next step: wrap it up nicely and define clear interace to CPU model to minimize dependencies. Ideally I need fetchdecode to not include CPU at all
|
2016-06-12 21:23:48 +00:00 |
|