Commit Graph

37 Commits

Author SHA1 Message Date
Bryce Denney
d614265f58 - check in a (commented out) debugging option controlled by BX_INSTR_SPY.
To enable, set the #define to 1.
2001-09-26 15:19:56 +00:00
Bryce Denney
4073d65f4d - apply patch [ #455014 ] CR0 bug in 80486, described as:
> In the register CR0, when the bit PM is enabled, the bit 4 is 0
  > when should be 1.
  Another fix from an anonymous donor.
2001-09-19 17:36:54 +00:00
Bryce Denney
fd7e7ee86c - added debugger command "info fpu" which prints all FPU registers
in an output format similar to gdb (when you do info all-registers).
  Also, if you do "info all" you get the CPU registers and the FPU
  registers.
- added bx_cpu_c method called fpu_print_regs, which is implemented
  in wmFPUemu_glue.cc
2001-09-15 06:55:14 +00:00
Bryce Denney
f04e6fe346 - apply VPATH patch from Edouard G. Parmelan, posted to list on September 1 2001-09-14 04:19:08 +00:00
Bryce Denney
ad11335293 - remove space after line continuation character.
Thanks to Martijn Boekhorst <Martijn@boekhorst.net> for pointing it out.
2001-09-11 23:32:14 +00:00
Todd T.Fries
28885e4973 some INFO->DEBUG/ERROR cleanups 2001-08-31 16:06:32 +00:00
Todd T.Fries
cd9733391b AtheOS triggers this, move to debug 2001-08-24 21:02:37 +00:00
Bryce Denney
284178479b - apply patch "patch.ifdef-paging-tlb" 2001-08-10 18:42:24 +00:00
Bryce Denney
c0bd506231 - apply patch [ #439314 ] [Patch] Exception 1 (debug) on HALT
by thomas.petazzoni@meridon.com.  Bryce introduced this bug in
  revision 1.9 when split the code into separate #ifdefs for single
  CPU and multiple CPU.  Comments on the patch are:
  > The following patch addresses a bug concerning the exception 1 (debug)
  > which is being raised during HALT under certain conditions.  It
  > appears only on recent versions (1.2.1 or last CVS), and not on
  > version 2000-0104.
2001-07-08 14:36:36 +00:00
Bryce Denney
3d29d5d614 - add instrumentation macros for begin and end opcode. These are usually
defined to be empty, so there should be no effect except for instrumentation
2001-06-28 19:45:44 +00:00
Todd T.Fries
4f1c151520 Move Init $ to ::init() 2001-06-27 20:27:49 +00:00
Todd T.Fries
a06b031dcf setprefix -> put 2001-06-27 19:16:01 +00:00
Todd T.Fries
12985edb26 setprefix now uses a variable length name as a string for an argument 2001-06-19 21:36:09 +00:00
Bryce Denney
c8ae6c4aa9 - set logging prefix and type in the constructor 2001-06-16 04:27:22 +00:00
Todd T.Fries
61d13559e9 tweaks here and there, show ne2k mac, shorten BX_ messages by removing redundant strings, etc 2001-06-13 16:53:58 +00:00
Bryce Denney
f822257511 - there were cases where BX_APIC_SUPPORT were used and others where
BX_SUPPORT_APIC were used.  To follow the pattern used by other
  names like this, I changed them all to BX_SUPPORT_APIC.
  Thanks to Tom Lindström for chasing this down!
2001-06-12 13:07:43 +00:00
Bryce Denney
565fa8ea8e - another speed boost: when not using SMP, use
BX_CPU_C bx_cpu;
     BX_MEM_C bx_mem;
  and when more than one processor, use
     BX_CPU_C    *bx_cpu_array[BX_SMP_PROCESSORS];
     BX_MEM_C    *bx_mem_array[BX_ADDRESS_SPACES];
  The changeover is controlled by BX_SMP_PROCESSORS, but there are only
  a few code changes since nearly all code uses the BX_CPU(n) and BX_MEM(n)
  macros.
- This turns out to make a 10% speed difference!  With this revision,
  the CVS version now gets 95% of the performance of the 3/25/2000
  snapshot, which I've been using as my baseline.
2001-06-05 17:35:08 +00:00
Bryce Denney
b01b9109a6 - the SMP merge has reduced performance of even one processor, so this
is the first attempt to regain the performance of pre-SMP bochs
  (1.1.2).  When simulating only one processor, stay in cpu_loop forever
  as pre-SMP versions did.  The overhead of returning from cpu_loop over
  and over was slowing us down.
2001-06-05 15:56:19 +00:00
Todd T.Fries
2bbb1ef8eb strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC}
don't need it, moved the output of it into the general io functions.
saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 18:56:02 +00:00
Todd T.Fries
e291dd17d4 demote BX_INFO to BX_ERROR 2001-05-25 22:17:51 +00:00
Todd T.Fries
9ebd237408 more output cleanup 2001-05-25 18:44:38 +00:00
Todd T.Fries
0b613932ac remove redundant 2001-05-25 15:06:45 +00:00
Todd T.Fries
34a4fa7c67 demote INFO/PANIC to DEBUG to silence a number of w98 verbosity by default 2001-05-25 14:25:25 +00:00
Bryce Denney
49664f7503 - parts of the SMP merge apparantly broke the debugger and this revision
tries to fix it.  The shortcuts to register names such as AX and DL are
  #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR.
  When BX_USE_CPU_SMF=1, this works fine.  (This is what bochs used for
  a long time, and nobody used the SMF=0 mode at all.)  To make SMP bochs
  work, I had to get SMF=0 mode working for the CPU so that there could
  be an array of cpus.

  When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which
  only works within methods of BX_CPU_C.  Code outside of BX_CPU_C must
  reference BX_CPU(num) instead.
- to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are
  now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined.  This is
  only done in the cpu/*.cc code.
2001-05-24 18:46:34 +00:00
Bryce Denney
26cf93f455 - fixed stupid bug in my RDTSC code, which made the TSD bit
(time stamp disable) not work correctly
2001-05-24 18:03:14 +00:00
Todd T.Fries
cd01453c9d cleanup output 2001-05-23 19:36:55 +00:00
Bryce Denney
3503104390 - configure turns on APIC when cpu level > 5
- now the APIC feature bit is really controlled by cpu level and
  BX_APIC_SUPPORT, so it won't go on at the wrong time.
2001-05-23 15:54:05 +00:00
Bryce Denney
e61d00351f - merged BRANCH-smp-bochs into main branch. For details see comments
in BRANCH-smp-bochs revisions.
- The general task was to make multiple CPU's which communicate
  through their APICs.  So instead of BX_CPU and BX_MEM, we now have
  BX_CPU(x) and BX_MEM(y).  For an SMP simulation you have several
  processors in a shared memory space, so there might be processors
  BX_CPU(0..3) but only one memory space BX_MEM(0).  For cosimulation,
  you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with
  BX_MEM(1).  WARNING: Cosimulation is almost certainly broken by the
  SMP changes.
- to simulate multiple CPUs, you have to give each CPU time to execute
  in turn.  This is currently implemented using debugger guards.  The
  cpu loop steps one CPU for a few instructions, then steps the
  next CPU for a few instructions, etc.
- there is some limited support in the debugger for two CPUs, for
  example printing information from each CPU when single stepping.
2001-05-23 08:16:07 +00:00
Bryce Denney
d7d75a7bdc - changed some messages from BX_INFO to BX_DEBUG so that they wouldn't
show up by default.
2001-05-22 18:48:31 +00:00
Bryce Denney
aab41a611e - SLDT in real mode produces undefined opcode exception. Changed BX_PANIC
to BX_ERROR under these circumstances.
2001-05-17 20:05:17 +00:00
Todd T.Fries
a628039f5f report undefined opcode if not implemented instead of panicing for RDTSC 2001-05-16 17:27:01 +00:00
Todd T.Fries
3c7414a418 error and undefined opcode + typo with BX_INFO in code only used on i386's 2001-05-16 16:50:04 +00:00
Bryce Denney
1d2cd83408 - Double fault patch from Thomas Petazzoni <thomas.petazzoni@ifrance.com>,
sourceforge patch #423726.  He writes:
  > you'll find as attachment a little patch which make
  > bochs support the double fault. currently, when 2 pages
  > fault occur, bochs does not generate a double fault (as
  > the Intel documentation says) but do
  > generate a other page fault, which make a triple fault,
  > and bochs will exit.
  >
  > this very little patch make bochs support this double
  > fault, which is
  > used in our OS in order to dynamically increse kernel
  > level stacks.
2001-05-15 15:29:33 +00:00
Todd T.Fries
bdb89cd364 merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.

In general this provides a generic interface for logging.

logfunctions:: is a class that is inherited by some classes, and also
.   allocated as a standalone global called 'genlog'.  All logging uses
.   one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
.   class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
.   respectively.
.
.   An example usage:
.     BX_INFO(("Hello, World!\n"));

iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance.  It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf().  At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.

More cleanup is coming, but this works for now.  If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.

Comments, bugs, flames, to me: todd@fries.net
2001-05-15 14:49:57 +00:00
Bryce Denney
a6fef54678 - update copyright dates to 2001 for all mandrake headers
- for bochs files with other header, replaced with current mandrake header
2001-04-10 02:20:02 +00:00
Bryce Denney
4e04f4cb58 - change all inline declarations to one of two macros: BX_C_INLINE or
BX_CPP_INLINE.  Then in config.h.in you can define these two as you
  wish.
2001-04-10 02:10:09 +00:00
cvs
beff63eb32 - entered original Bochs snapshot bochs-2000_0325a.tar.gz from
ftp.bochs.com
2001-04-10 01:04:59 +00:00