Commit Graph

55 Commits

Author SHA1 Message Date
Stanislav Shwartsman
8044a2bda6 rename i->execute field in the instruction
move victim cache lookup into cache lookup so traces could be linked with victim cache hits directly
2012-09-04 15:45:05 +00:00
Stanislav Shwartsman
c41cbe6d56 Link traces over taken branch optimization which makes handlers chaining even more efficient.
I observed 5% speedup in all disk images over 2.6pre1.
The change is safe (passed all regressions) and I will be glad to make it into Bochs 2.6!
2012-08-21 19:58:41 +00:00
Stanislav Shwartsman
25ffaeeea8 fixed VMX issue + small code reorg 2012-03-13 15:18:21 +00:00
Stanislav Shwartsman
f81589c5d6 Don't allow traces longer than cpu_loop can execute 2011-09-21 20:28:29 +00:00
Stanislav Shwartsman
13feb0772a - 10% emulation speedup with handlers chaining optimization implemented. The
feature is enabled by default when configure with --enable-all-optimizations
    option, to disable handlers chaining speedups configure with
        --disable-handlers-chaining
2011-08-21 14:31:08 +00:00
Stanislav Shwartsman
f8e4e7f16b clean up/fixed instrumentation examples + removed old 2-years old configure options check (deprecated) 2011-07-23 19:58:38 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation.
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
29e3f6e762 remove trace cache disabled mode from the code. next step going to be - introducing new optimization features based on trace cache 2011-06-01 20:34:04 +00:00
Volker Ruppert
c78026a9a2 - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
bee5940167 fixed compilation err with trace cache off 2011-04-03 03:43:38 +00:00
Stanislav Shwartsman
4de76b0571 introduced victim cache for a trace cache structure.
Allows to significantly  cut trace cache miss latenct and find data in victim cahe instead of redoding it 
8 entries VC in parallel with direct map 64K entries
2011-03-25 23:06:34 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
5915d92775 very small optimizations + indent 2011-01-25 20:59:26 +00:00
Stanislav Shwartsman
f1821fa3bf SMC invalidation only for traces that were really affected by SMC store 2011-01-23 15:54:54 +00:00
Stanislav Shwartsman
d5ec286b3f fix for SMC detection for page split 2011-01-15 22:14:44 +00:00
Stanislav Shwartsman
906805bb68 fix SMC detection when trace cache is not compiled in 2011-01-15 17:08:07 +00:00
Stanislav Shwartsman
f4cd9b8ac9 flush only required entries on SMC 2011-01-12 19:53:47 +00:00
Stanislav Shwartsman
fcdadabbc4 Rewritten SMC handling, removed pageWriteStamp, now trace fetch chck only for pAddr 2011-01-12 18:49:11 +00:00
Stanislav Shwartsman
fe0685c7f9 fine granular SMC detection (128b granularity used)
significant reduction (>80%) of false SMC flushes
2011-01-04 16:17:20 +00:00
Stanislav Shwartsman
f2a87171c1 Fixed BX_INSTR_OPCODE callback, now its implementation closer to original definition.
New, updated definition of the callback:

	void bx_instr_opcode(unsigned cpu, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64);

The  callback  is  called  each  time, when Bochs completes  to  decode  a new
instruction.  Through  this callback function Bochs could provide an opcode of
the instruction, opcode length and an execution mode (16/32/64).

Please note, that Bochs uses translation  caches so each simulated instruction
might be executed multiple times but decoded only once.
2010-09-27 15:29:36 +00:00
Stanislav Shwartsman
3dfcfd0ccd Split shift opcodes | optimize SAR opcode 2010-05-18 07:28:05 +00:00
Stanislav Shwartsman
49934bc853 cache page split instructions
next step - cache page split traces
2010-05-08 08:30:04 +00:00
Stanislav Shwartsman
cffe32dd2c remove unused param from exception() call 2010-03-14 15:51:27 +00:00
Stanislav Shwartsman
bc7f9d4ced move boundaryFetch to another file 2010-02-13 10:35:51 +00:00
Stanislav Shwartsman
11b7f83a93 rename trace ilen to tlen 2010-02-13 09:41:51 +00:00
Stanislav Shwartsman
30c9eef6f9 small optimization 2009-12-21 13:38:06 +00:00
Stanislav Shwartsman
8fbcfa6b39 Fixed SMC detection with trace cache disabled 2009-12-16 12:32:51 +00:00
Stanislav Shwartsman
2defc78bac cleanups 2009-11-29 21:01:26 +00:00
Stanislav Shwartsman
896457e437 cleanup 2009-11-05 16:51:06 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
722d489ad9 Fix SMC detection optimization 2009-03-24 16:04:47 +00:00
Stanislav Shwartsman
e5be60be64 Fixed lazy flags bug I added in one of my prev merges
ICACHE code reorganization
2009-03-22 21:12:35 +00:00
Stanislav Shwartsman
888000e7d4 Fixed compilation err with trace cache disabled 2009-03-22 06:09:18 +00:00
Stanislav Shwartsman
4470c6a1c8 make ICACHE always enabled option and deprecate it in the configure script
Trace cache still can be turned off
2009-03-13 18:48:08 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
d12e1fc290 Fixed CPU runway after pressing reset button 2008-11-13 22:58:54 +00:00
Stanislav Shwartsman
577c8c7969 another way to do the same optimization 2008-10-08 20:40:26 +00:00
Stanislav Shwartsman
3d97374ce8 Some fixes for functionality 2008-09-24 10:39:35 +00:00
Stanislav Shwartsman
0966fe8621 Fix corruption when executing WBINVD in SMP 2008-09-23 17:33:18 +00:00
Stanislav Shwartsman
fa49bd17dc Fixed small performance bug in HandleAsyncEvent 2008-08-12 19:25:42 +00:00
Stanislav Shwartsman
8fff36b6e3 Save some time in redundant tracing 2008-07-17 17:28:25 +00:00
Stanislav Shwartsman
6f7d39e832 Speedup port read to memory methods 2008-07-13 13:24:36 +00:00
Stanislav Shwartsman
607900dd4d very small cleeanup 2008-06-12 16:40:53 +00:00
Stanislav Shwartsman
06e3615239 Reduce trace cache memory footprint using naive memory pool trace allocation 2008-05-04 05:37:36 +00:00
Stanislav Shwartsman
08f958f458 Fixed pageWriteStampTable to handle BIOS code as well - increased the table to all 4G instead of allocated memory size
Avoid checking of pageWriteStamp in the heart of cpu loop with trace cache - now decWriteStamp will post stopTraceExecution event if it hits code page
2008-03-29 21:01:25 +00:00
Stanislav Shwartsman
64bfbb32b5 Inline icache lookup code - speedup of 3% according to my measurements 2008-03-06 20:22:24 +00:00
Stanislav Shwartsman
e6d75f61ee Simplify icache entry calculation 2008-03-03 16:22:31 +00:00
Stanislav Shwartsman
65df050a21 Fixed compilation warning 2008-03-03 15:34:03 +00:00
Stanislav Shwartsman
946b7a369d Added const to fetchPtr in cpu functions 2008-03-03 15:16:46 +00:00
Stanislav Shwartsman
2172e96654 small trace/iacache cleanups, always allow speculative tracing for trace cache 2008-03-03 14:35:36 +00:00