Stanislav Shwartsman
7bf51e48db
Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
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Fixed fetch mode mask initialization (bug report 1400027 Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
2006-01-16 19:22:28 +00:00
Alexander Krisak
99fae60a0e
Small icache optimization
2005-12-13 14:18:34 +00:00
Stanislav Shwartsman
64ba97210b
INVD/WBINVD should flush caches and TLB
2005-10-18 18:07:52 +00:00
Stanislav Shwartsman
b192b2af9b
Optimize pageWriteStamp checking
2005-08-10 18:18:57 +00:00
Stanislav Shwartsman
47442d437a
Speedup ICAche decWriteStamp operation. The main idea for this speedup was given by h.johansson.
2005-06-16 20:28:27 +00:00
Stanislav Shwartsman
1755589376
Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions.
2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
3074078297
Added CVS version header to all the files.
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One more small change in APIC
2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
bf0fc24cd5
Fixed icache uncompetability with physical addresses > mem.len
2004-11-19 09:39:30 +00:00
Stanislav Shwartsman
645e04860e
For now : disable fetching from physical address 0xFFFFFFF0 after #RESET
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because ICACHE do not support physical address > mem.len.
This is the first part of the fix, the rest coming soon
2004-11-18 23:16:36 +00:00
Stanislav Shwartsman
71c1275b21
dos2unix
2004-11-14 19:39:01 +00:00
Stanislav Shwartsman
7b62a6e206
Fix reset registers in CPU for #RESET signal
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Extract ICACHE from cpu.h to separate icache.h
2004-11-14 19:29:34 +00:00
