Stanislav Shwartsman
13feb0772a
- 10% emulation speedup with handlers chaining optimization implemented. The
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feature is enabled by default when configure with --enable-all-optimizations
option, to disable handlers chaining speedups configure with
--disable-handlers-chaining
2011-08-21 14:31:08 +00:00
Stanislav Shwartsman
4a3209ae31
Increase cpu param length (exceeded with new icount variable)
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CHECK_MAX_INSTRUCTIONS is not needed for debugger anymore.
Next step: eliminate it for SMP as well and remove cpu_loop parameter.
2011-08-17 20:00:51 +00:00
Stanislav Shwartsman
b69f728246
Fixed internal debugger part of the bug:
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#3312237 stepN command might be not working properly
The problem still can be exists for SMP.
2011-08-17 19:51:32 +00:00
Stanislav Shwartsman
041605f718
fixed corner case issue with SMP
2011-07-11 17:29:54 +00:00
Stanislav Shwartsman
432bf97197
was playing with SMP and debugger
2011-07-09 22:17:16 +00:00
Stanislav Shwartsman
92c4bd6f2b
forgot to merge file
2011-07-08 14:07:45 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
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Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
909e750549
Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao)
2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
beafa7c88b
improved x86 hw code bp handling
2011-06-24 13:38:34 +00:00
Stanislav Shwartsman
29e3f6e762
remove trace cache disabled mode from the code. next step going to be - introducing new optimization features based on trace cache
2011-06-01 20:34:04 +00:00
Stanislav Shwartsman
ee3f9e36cb
Implemented Supervisor Mode Execution Protection (SMEP)
2011-05-29 16:28:26 +00:00
Stanislav Shwartsman
6e79fdfb1e
optimize data hw breakpoint
2011-04-09 05:12:28 +00:00
Stanislav Shwartsman
4de76b0571
introduced victim cache for a trace cache structure.
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Allows to significantly cut trace cache miss latenct and find data in victim cahe instead of redoding it
8 entries VC in parallel with direct map 64K entries
2011-03-25 23:06:34 +00:00
Stanislav Shwartsman
dd36d3c754
fixed code breakpoint hit
2011-03-24 19:06:58 +00:00
Stanislav Shwartsman
31dd6a70db
small cleanups
2011-03-20 21:16:45 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
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many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
96312698f6
fixed typo
2011-03-15 20:31:49 +00:00
Stanislav Shwartsman
63fe52f601
accessors for DR6 and DR7 fields
2011-03-15 20:20:15 +00:00
Stanislav Shwartsman
acb83acfa7
Fixed decoding of CRC32 instr
2011-02-26 20:43:11 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
498b591452
quick code reorg that gives 3% speedup
2011-01-26 11:48:13 +00:00
Stanislav Shwartsman
f1821fa3bf
SMC invalidation only for traces that were really affected by SMC store
2011-01-23 15:54:54 +00:00
Stanislav Shwartsman
fcdadabbc4
Rewritten SMC handling, removed pageWriteStamp, now trace fetch chck only for pAddr
2011-01-12 18:49:11 +00:00
Stanislav Shwartsman
f2a87171c1
Fixed BX_INSTR_OPCODE callback, now its implementation closer to original definition.
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New, updated definition of the callback:
void bx_instr_opcode(unsigned cpu, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64);
The callback is called each time, when Bochs completes to decode a new
instruction. Through this callback function Bochs could provide an opcode of
the instruction, opcode length and an execution mode (16/32/64).
Please note, that Bochs uses translation caches so each simulated instruction
might be executed multiple times but decoded only once.
2010-09-27 15:29:36 +00:00
Stanislav Shwartsman
f3980b522f
bugfux
2010-06-02 05:44:12 +00:00
Stanislav Shwartsman
b2dffd9258
undo incorrect change for ia32_feature_control msr init
2010-05-23 05:32:00 +00:00
Stanislav Shwartsman
d8b1d60239
when in HLT run time faster for single cpu
2010-05-22 10:17:58 +00:00
Stanislav Shwartsman
c9f0779199
cleanup
2010-04-20 06:14:55 +00:00
Stanislav Shwartsman
b9be4fcd3e
fix
2010-04-19 11:09:35 +00:00
Stanislav Shwartsman
87ad43d25a
handle DMA when halted as well
2010-04-02 17:15:14 +00:00
Stanislav Shwartsman
4400edc746
fix for 2795115 NX fault could be missed
2010-03-23 19:58:20 +00:00
Stanislav Shwartsman
da656bf93d
optimization for paging disable mode + preparing for future
2010-03-19 17:00:05 +00:00
Stanislav Shwartsman
79466dffe2
apic virtualization + vmx fixes
2010-03-16 14:51:20 +00:00
Stanislav Shwartsman
cffe32dd2c
remove unused param from exception() call
2010-03-14 15:51:27 +00:00
Stanislav Shwartsman
ae005b5e32
fix
2010-03-07 09:22:20 +00:00
Stanislav Shwartsman
bc7f9d4ced
move boundaryFetch to another file
2010-02-13 10:35:51 +00:00
Stanislav Shwartsman
11b7f83a93
rename trace ilen to tlen
2010-02-13 09:41:51 +00:00
Stanislav Shwartsman
d8718ae92a
allow instrumentation to change i->execute (1% total slowdown is the price)
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patch from @SF
2010-01-24 12:48:42 +00:00
Stanislav Shwartsman
30c9eef6f9
small optimization
2009-12-21 13:38:06 +00:00
Stanislav Shwartsman
bd60e0264c
change Copyright to Bochs Project
2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
2defc78bac
cleanups
2009-11-29 21:01:26 +00:00
Stanislav Shwartsman
22d2630e0d
gcc more likes this construction
2009-11-05 16:06:57 +00:00
Stanislav Shwartsman
40821d996e
bugfix
2009-10-31 20:16:21 +00:00
Stanislav Shwartsman
6f0db17b08
fixed #DB on rpeat instructions
2009-10-30 09:13:19 +00:00
Stanislav Shwartsman
aac4e85884
optimization
2009-10-24 11:24:21 +00:00
Stanislav Shwartsman
1518579e34
fixed for code bp
2009-10-19 19:59:10 +00:00
Stanislav Shwartsman
b19da50414
bugfix
2009-08-07 05:55:45 +00:00
Stanislav Shwartsman
d7eb001223
small optimization
2009-06-09 15:23:28 +00:00
Stanislav Shwartsman
efc413d2b4
VMX fixes
2009-05-21 10:39:40 +00:00
Stanislav Shwartsman
6fe6da5f25
small fixes
2009-05-07 12:00:02 +00:00