Stanislav Shwartsman
5eb781e45f
cleanup after cpu features interface rework
2014-08-31 19:22:41 +00:00
Stanislav Shwartsman
816f5cc2d7
fixed massive code duplication
2014-07-03 06:40:42 +00:00
Stanislav Shwartsman
776cabf4fe
move canonical check of high part of page split access to another function to fix code duplication
2013-12-21 21:56:55 +00:00
Stanislav Shwartsman
a85a9081b7
use shorter opcode names in the debug prints (skip the BX_IA_ prefix)
2013-12-02 20:06:59 +00:00
Stanislav Shwartsman
d082c6a0f9
implemented avx-512 masked load instructions
2013-11-30 18:37:25 +00:00
Stanislav Shwartsman
2357dc5ccc
Fixed number of invocations of the BX_INSTR_LIN_ACCESS instrumentation callback in cpu/access32.cc, cpu/access64.cc and cpu/paging.cc specify the BX_READ memory access type where BX_RW really applies.
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SF Patch #1335 by Mateusz Jurczyk
2013-07-24 18:54:18 +00:00
Stanislav Shwartsman
53d14c01b5
correctly signal bit 12 (nmi unblocking by iret) in vmx interruption info. todo: find how to implement it clean way
2013-03-06 21:11:23 +00:00
Stanislav Shwartsman
40669115e1
use different formatter for printing phy address in paging dbg messages
2013-02-14 19:30:59 +00:00
Stanislav Shwartsman
64df073617
implemented virtualization exception feature
2013-01-28 16:30:25 +00:00
Stanislav Shwartsman
d38fce8218
preparation for future extension in translate_linear - I would like to return data to caller through tlbEntry
2013-01-27 19:27:30 +00:00
Stanislav Shwartsman
4bed791ccb
Added year 2013 to Copyright in all files already modified in new year
2013-01-19 20:45:03 +00:00
Stanislav Shwartsman
05d36f0acc
fixed performance bug in smap/smep fix - tlb never had user executable page permission
2013-01-19 20:14:44 +00:00
Stanislav Shwartsman
eda28b95f4
unfortunately this change is rquired to make SMAP and SMEP features to work.
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I observed ~5% emulation slowdown ... thinking about possible mitigations
this fixes TLB issue with SMAP and SMEP features.
these features introduce a new behavior when page can be inaccessible by System (CPL=0).
Current behavior is accessBits was not supporting it but legacy (from Bochs 2.3.6) was.
The wrong behavior can be observed if user access a user page and system access the same page later.
user access is fine and pass SMEP/SMA checks and stores the translation in TLB.
the system access will hit the TLB and nobody could detect that system cannot access that page.
2013-01-16 17:28:20 +00:00
Stanislav Shwartsman
574b69c81e
fixed MSDEV warnings
2012-11-27 15:40:45 +00:00
Stanislav Shwartsman
8a01ee1661
implemented SVM decode assists. some is still missing - coming soon
2012-11-02 07:46:50 +00:00
Stanislav Shwartsman
744001e35e
Implemented VMX APIC Registers Virtualization and VMX Virtual Interrupt Delivery emulation
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Bugfix: VMX: VmEntry should do TPR Virtualization (TPR Shadow + APIC Access Virtualization case is affected) and even could possibly cause TPR Threshold VMEXIT
2012-10-26 18:43:53 +00:00
Stanislav Shwartsman
2f3c7ff8e4
implemented SMAP (Supervisor Mode Access Protection) from [Intel Architecture Instruction Set Extensions Programming Reference] rev14
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fixed enabling of ADX extensions in generic CPUID when enabled through .bochsrc
Small code cleanups on the way to implementation of APIC Registers Virtualization features disclosed in recent Intel SDM rev043
2012-09-10 15:22:26 +00:00
Stanislav Shwartsman
e0729e32b8
fixed bug 3548108 VMEXIT instruction length Not always getting updated
2012-07-26 16:03:26 +00:00
Stanislav Shwartsman
3415f7bb0f
add XD bit to page attributes print
2012-06-28 10:59:30 +00:00
Stanislav Shwartsman
515d8b5c25
add new instrumentation callbacks for physical memory access from CPU
2012-06-18 11:41:26 +00:00
Stanislav Shwartsman
171d400bd8
GATHER: update gather mask handling to match latest Intel SDM definition
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Fixes in x86 HW breakpoint handling
2012-06-06 14:01:45 +00:00
Stanislav Shwartsman
f528290652
fixed bug EPT Access Dirty support
2012-05-27 19:17:13 +00:00
Stanislav Shwartsman
39c14ef0d1
Implemented EPT A/D extensions support.
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Bochs is fully aligned with the latest published revision of
Intel Architecture Manual (revision 043) now.
2012-05-02 18:11:39 +00:00
Stanislav Shwartsman
279c61dc67
updated + fixed instrumentation example for instr histogram, code cleanup in the cpu
2012-03-28 21:11:19 +00:00
Stanislav Shwartsman
3ca29cbdf3
stack direct access optimization - 5% emu speedup to all 32-bit guests, for 64-bit guests speedup is less because they have less stack accesses
2012-03-25 11:54:32 +00:00
Stanislav Shwartsman
b5a33e82ac
fixed a lot of code duplication in debugging/instrumentation of mem access
2012-03-20 18:26:04 +00:00
Stanislav Shwartsman
c52d97cb7f
fixed comments in paging.cc
2012-02-28 22:39:33 +00:00
Stanislav Shwartsman
f48317affc
SVM: Added EXITINFO2 write on VMEXIT (missed in prev commit)
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Added phenom_8650_toliman <AMD Phenom X3 8650 (Toliman)> comment into .bochsrc example with all other supported CPU configs.
Added missed SVM definitions into Toliman CPUDB module
2012-02-19 20:15:23 +00:00
Stanislav Shwartsman
92376fb693
svm updates
2012-02-19 12:16:58 +00:00
Stanislav Shwartsman
c2670b40d5
small cleanup in paging code
2012-02-15 19:49:35 +00:00
Stanislav Shwartsman
bb7a648d91
Major commit !
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Implemented SVN nested paging support - the Virtual Box boots perfectly with Nested Paging guest !
A lot of code duplication was added for now - major cleanup will follow later.
! Added AMD Phenom X3 8650 (Toliman) configuration to the CPUDB - this configuration has Nested Paging enabled.
Some CPUID modules rework done to enable Toliman configuration.
Ckean up 'executable' attribute from all CPU source files.
2012-02-13 23:29:01 +00:00
Stanislav Shwartsman
813fe4e6b9
reduce code duplication - continue preparing for nested paging implementation
2012-02-13 20:06:04 +00:00
Stanislav Shwartsman
4d0a5c1b07
- VMX: EPT misconfiguration should always take priority above EPT permissions violation (translate_guest_physical corner case bug)
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- VMX: EPT reserved bits set should cause EPT misconfiguration and not EPT violation
- VMX: EPT walk for guest CR3 address should be considered as 'page walk'
2012-02-12 21:30:22 +00:00
Stanislav Shwartsman
0b5f798af1
re-commit changes from SVN rev11026 which were accidentially undo'ed by last Volker's commit
2012-02-12 19:13:57 +00:00
Volker Ruppert
de94b08a1a
- class bx_list_c now contains a chained list of parameters. Removed the now
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obsolete maxsize parameter from all lists.
2012-02-12 18:43:20 +00:00
Stanislav Shwartsman
855d2adece
cleanups in paging code
2012-02-12 16:09:35 +00:00
Stanislav Shwartsman
fa182e96b5
for future nested paging: under NP PDPTR CACHE will contain NP PDPTR entries
2012-02-10 20:39:46 +00:00
Stanislav Shwartsman
457c56c822
fixup for EPT paging
2012-01-22 18:39:15 +00:00
Stanislav Shwartsman
fc6712e3a3
undo part of prev paging commit
2012-01-19 20:01:32 +00:00
Stanislav Shwartsman
12afed23a1
small fix and cleanups in paging code
2012-01-19 06:38:22 +00:00
Stanislav Shwartsman
9461797886
added extra param to debugger phy access callback + cleanup in vmexit functions
2012-01-17 21:50:15 +00:00
Stanislav Shwartsman
f4b49633d4
paging code rework (cont)
2012-01-17 18:20:55 +00:00
Stanislav Shwartsman
0d64a6cb92
fixed paging bug in previous commit
2012-01-16 15:26:25 +00:00
Stanislav Shwartsman
7d641450ec
remove param from check_entry_PAE function - it is always the same for all calls
2012-01-15 20:25:39 +00:00
Stanislav Shwartsman
c7cb99787e
rework in paging code before nested paging implementation for SVM - step 2
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optimize TLB flush code
2012-01-15 19:38:00 +00:00
Stanislav Shwartsman
4db23355cd
rework in paging code before nested paging implementation for SVM - step 1
2012-01-15 17:54:13 +00:00
Stanislav Shwartsman
edfff5bf44
fixed VMX+EPT VirtualBox failures
2012-01-06 10:30:07 +00:00
Stanislav Shwartsman
e2ff4bc6d4
clear exitinfo1/2 fields in SVM on VMENTER
2012-01-05 22:23:05 +00:00
Stanislav Shwartsman
0a14f08f16
completing SVM coding, missed - CPUID, extended APIC
2011-12-28 16:12:28 +00:00
Stanislav Shwartsman
7f5f917a34
more SVM implementation
2011-12-27 19:42:11 +00:00