Stanislav Shwartsman
1e4f1624c8
remove trailing whitespace from source files
2022-08-23 21:46:04 +03:00
ughoavgfhw
b8f38eb8d3
Fix two bugs around monitor/mwait
...
MONITOR relies on tickle_read_virtual to set the physical address, but it was
only doing so on TLB miss. So a MONITOR with a TLB hit would arm the most
recently accessed address instead of the requested one.
TLB invalidations disarmed the monitoring range, but didn't wake a CPU that
had already MWAIT-ed. Any instruction that invalidated TLB entries on other
CPUs could have caused an MWAIT-ing CPU to never wake.
2022-07-13 21:51:15 -05:00
Stanislav Shwartsman
1bf18b8aae
! CPUID: Added TigerLake CPU definition (features CET and CLWB support)
...
- CPU code refactor, remove uses of bx_bool datatype and use C++ classic bool instead.
This enable better compiler optimizations and reduce binary size
2021-01-30 08:35:35 +00:00
Stanislav Shwartsman
f90e5f4f44
Add initial implementation of the CET (Control Flow Enforcement Technology) emulation according to SDM071
...
Only missing items (to be added soon):
- Supervisor Shadow Stack EPT Control is not implemented yet
- SMM placing for SSP
Currently have to be added manually to some CPUID model, for example to ICL-U
To enable configure with --enable-cet
2019-12-20 07:42:07 +00:00
Stanislav Shwartsman
4b66fecaad
split Bochs CPU TLB to DTLB and ITLB to avoid aliasing conflicts between them. ~5% speedup measured
2019-12-09 18:37:02 +00:00
Stanislav Shwartsman
eec720c62b
convert bochs.h macros to inline functions with strong types
2019-10-16 20:46:00 +00:00
Stanislav Shwartsman
fd15b61d94
keep def of YMM/ZMM register even if AVX or EVEX are not compiled in and let reading/writing them to MEM
2018-04-04 19:31:56 +00:00
Stanislav Shwartsman
a673612784
fixed permission checks performed by CLFLUSH/CLFLUSHOPT/MONITOR* instructions
2017-03-28 18:52:53 +00:00
Stanislav Shwartsman
bcb36e81fa
experimental implementation of protection keys paging extension published in SDM rev054. to enable configure with --enable-protection-keys
2016-03-02 20:44:42 +00:00
Stanislav Shwartsman
c44cb6ed81
more cases applicable for BX_TLB_ENTRY_OF
2015-09-22 20:10:22 +00:00
Stanislav Shwartsman
be4b73c6d2
extracted tlb specific code to tlb.h; extracted xsave cpuid leaf function to base cpuid class
2015-09-21 13:16:17 +00:00
Stanislav Shwartsman
5edd53186e
optimize for target with no x86-64 support
2015-05-04 19:58:01 +00:00
Stanislav Shwartsman
e72f66ce49
added BX_CPP_AttrRegparmN to xmm/ymmz/zmm read methods matching cpu.h
2015-04-19 20:47:55 +00:00
Stanislav Shwartsman
2bad0d0d12
fixed link error with debugger enabled, small speed optimization
2015-02-23 19:55:55 +00:00
Stanislav Shwartsman
2448c0cf74
fixed complation err
2015-02-23 17:55:09 +00:00
Stanislav Shwartsman
0917d12e8b
memory type report for physical accesses and RMW acccesses. todo: consider also pat
2015-02-22 21:26:26 +00:00
Stanislav Shwartsman
7a3e340e6d
implement memory type calculation by mtrr. todo: memory type from page tables
2015-02-20 21:50:59 +00:00
Stanislav Shwartsman
e16c6eb30c
preparations and interface definition for memory type support
2015-02-19 20:23:08 +00:00
Stanislav Shwartsman
e80e911166
fixed compilation on cpu level < 6
2015-01-29 18:41:28 +00:00
Stanislav Shwartsman
ee3841ef07
fixed more compilation problems and code cleanup
2015-01-26 20:01:25 +00:00
Stanislav Shwartsman
74da7a7092
fixed compilation err
2015-01-26 15:34:52 +00:00
Stanislav Shwartsman
ea390d58dc
added new files, removed old files, remove obsolete assert
2015-01-25 20:58:04 +00:00
