Stanislav Shwartsman
63a4130311
changed polarity of is_min bit in range operation to better match vrange* instructions immediate encoding
2014-08-04 21:08:00 +00:00
Stanislav Shwartsman
524a73f48c
prepare softfloat functions for vrange* instructions implementation
2014-08-04 19:44:25 +00:00
Stanislav Shwartsman
23a8601ab8
fixed code duplication in floating point compare functions
2014-08-03 19:53:02 +00:00
Stanislav Shwartsman
02e19de346
Added shape of implementation for last missing VSCALEF* AVX-512 instructons.
...
The softfloat implementation is still missing (only corner cases are supported).
Extend softfloat floatNN_class methods to distinguish between SNaN and QNaN.
2014-03-09 21:42:11 +00:00
Stanislav Shwartsman
695d245116
Implemented VRNDSCALE AVX-512 instructions.
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Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
2014-02-27 18:27:57 +00:00
Stanislav Shwartsman
b33f93b9f3
Implemented VGETMANT* AVX-512 instructions
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Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
2014-02-03 20:40:46 +00:00
Stanislav Shwartsman
15979a52b6
implemented avx-512 getexp instructions
2014-01-27 21:25:07 +00:00
Stanislav Shwartsman
cbcf30e911
implement EVEX SAE (suppress all exceptions) contol, implement AVX512 INSTERT/EXTRACTPS opcodes
2013-12-14 12:45:06 +00:00
Stanislav Shwartsman
374b8f615a
softloat: implemented some more unsigned integer vs float conversions
2013-12-12 21:00:59 +00:00
Stanislav Shwartsman
258a60f3fa
Implemented AVX512 EXPAND/COMPRESS instructions
...
Fixed memory access size for AVX shift instructions with shift count in memory
Do not allow to encode with EVEX.b instructions which do not support implicit broadcast
softfloat: prepare float32/64 to uint32 conversion functions
2013-12-10 21:09:46 +00:00
Stanislav Shwartsman
9b22ba7edf
softfloat: added float to uint64 conversion operations (based on QEMU patch by Tom Musta)
2013-11-10 19:08:12 +00:00
Stanislav Shwartsman
3803ac7fbe
fixed evex override mscsr controls
2013-09-19 21:38:25 +00:00
Volker Ruppert
c2560a8d44
- fpu directory is now a subdirectory in 'cpu'
2012-09-12 21:08:40 +00:00