Commit Graph

18 Commits

Author SHA1 Message Date
Volker Ruppert
1f5d311ca1 - fixed memory leaks found with valgrind when trying to start a second
simulation with wxBochs:
  * cpu: delete pageWriteStampTable array
  * devices: simplified setup of initial default i/o handlers
  * ne2k: delete ethernet module in destructor
2006-09-20 20:52:23 +00:00
Stanislav Shwartsman
73e1266cbe Add CR0 consistency checks and CS.L/CS.D consistency check
Optimize icache writestamps - 2x more space to decrement for page-write-stamp
2006-05-19 20:04:33 +00:00
Stanislav Shwartsman
274e17a1fc Remove unneeded function 2006-05-18 20:16:15 +00:00
Stanislav Shwartsman
8db1de7124 - Fixed several issues, each cause to NullTimer function never be called, the method is required for icache correct functionalit
- Speed-up icache by correct purging of Icache entries
- Several new assertions for timers, to prevent bugs in future
2006-05-16 20:55:55 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
e85a90a720 Remove cpu.h -> devices.cc dependancy, kill_bochs_request moved from CPU to bx_pc_system
Small Icache simplification and speedup
2006-03-14 18:11:22 +00:00
Stanislav Shwartsman
55ceecf79b Small optimization in icache page-write-stamp 2006-02-28 17:47:33 +00:00
Stanislav Shwartsman
7bf51e48db Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
Fixed fetch mode mask initialization (bug report 1400027  Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
2006-01-16 19:22:28 +00:00
Alexander Krisak
99fae60a0e Small icache optimization 2005-12-13 14:18:34 +00:00
Stanislav Shwartsman
64ba97210b INVD/WBINVD should flush caches and TLB 2005-10-18 18:07:52 +00:00
Stanislav Shwartsman
b192b2af9b Optimize pageWriteStamp checking 2005-08-10 18:18:57 +00:00
Stanislav Shwartsman
47442d437a Speedup ICAche decWriteStamp operation. The main idea for this speedup was given by h.johansson. 2005-06-16 20:28:27 +00:00
Stanislav Shwartsman
1755589376 Separate pageWriteStamp from ICACHE. The pageWriteStamp has totally independant structure and could be used in future with icache structure. Also it could be significantly speeded up using BX_SMF analog constructions. 2005-04-10 19:42:48 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files.
One more small change in APIC
2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
bf0fc24cd5 Fixed icache uncompetability with physical addresses > mem.len 2004-11-19 09:39:30 +00:00
Stanislav Shwartsman
645e04860e For now : disable fetching from physical address 0xFFFFFFF0 after #RESET
because ICACHE do not support physical address > mem.len.
This is the first part of the fix, the rest coming soon
2004-11-18 23:16:36 +00:00
Stanislav Shwartsman
71c1275b21 dos2unix 2004-11-14 19:39:01 +00:00
Stanislav Shwartsman
7b62a6e206 Fix reset registers in CPU for #RESET signal
Extract ICACHE from cpu.h to separate icache.h
2004-11-14 19:29:34 +00:00