- rombios.c: return maximum bus number #1 for i440BX.
- Now using different i/o and memory base address regions for PCI and AGP.
- Added some init code for the i440BX PCI/AGP bridge.
- Some code cleanups.
- Bochs BIOS: Improved calculating PCI slot number from device number to handle
the i440BX case correctly.
- Memory code: Detect and modify the PCI IRQ roouting table of the Bochs BIOS
for the i440BX chipset (TODO: this could be done by the BIOS itself after
copying to shadow RAM).
- Bochs BIOS: Improved calculating PCI slot number from device number to handle
the i440BX case correctly.
- Memory code: Detect and modify the PCI IRQ roouting table of the Bochs BIOS
for the i440BX chipset (TODO: this could be done by the BIOS itself after
copying to shadow RAM).
- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.
- Added symbols for the i440BX host bridge device ID.
- Probe and search for devices on PCI bus #1 (AGP).
- Set up memory and i/o regions only for header type 0.
- Set AGP aperture size to 64 MB.
- TODO: PCI IRQ routing, i440BX specific register setup.
- Function ata_cmd_data_io: using fixed block size 512 only for 'identify'
commands. For read/write commands the hard disk sector size must be used.
- Take account of sector size when calculating hard disk size in MBytes (TODO:
calculation is not correct for not yet existing very big disks).
- updated comment.
- Function ata_cmd_data_io: using fixed block size 512 only for 'identify'
commands. For read/write commands the hard disk sector size must be used.
- Take account of sector size when calculating hard disk size in MBytes (TODO:
calculation is not correct for not yet existing very big disks).
- updated comment.
- Created framework based on our I/O APIC code and ported HPET core from Qemu
with some required changes for the Bochs timer and IRQ handling.
- Enabled HPET-specific code in the ACPI and rombios32 sources and generated
new ACPI table with iasl.
- The HPET device plugin is now always loaded if the i440FX chipset is selected
(same as ACPI). We have to rethink this when we have implemented a more
modern chipset.
- TODO: Rewrite of the virtual timer code for nanosecond support to make the
realtime synchronization possible with HPET.
Prepared "biosdetect" option in the harddrv code.
TODO #1: Add support for a comma-separated list of BIOS options.
TODO #2: Implement support for at least "biosdetect=none" in the Bochs BIOS.
- renamed config parameter "i440fx_support" to "enabled"
- new config parameter "chipset" added (current choices "i430FX" and "i440FX")
- don't load ACPI support if the i430FX chipset is selected
- select register values for the core PCI devices depending on the chipset
- USB UHCI must be connected to a PCI slot if the i430FX chipset is used
- rombios changes to make the i430FX chipset work
- TODO #1: implement limitation to 1 cpu and 128 MB RAM for the i430FX chipset
- TODO #2: verify register behaviour of both chipsets
[Bochs-developers] [Patch #3539228] Part 3
> Added dummy EOI handler and all unused IRQ vectors set to this.QEMM 97 does not crash any more.
Looks good. Those "SET_INT_VECTOR comments" should be removed.
Sebastian
- Changed to frequently using segment base to DS based - Added set_DS function
(Set DS value,returns old DS value),(read/write)_(byte/word/dword)_DS macro
to refer DS segment based data.
- Almost BIOS interrupt handler wrapper changed to DS base to use DS-based
reference macro effectiently.
- Merged ata_cmd_data_in and ata_cmd_data_out function to ata_cmd_data_io
- Merged INT13 AH=02 and AH=03 I/O routine
- Modified cdrom_boot,int15_function,set_e820_range and pci/pnobios low level code to more optimal
- Deleted INT1C handler that duplicated with dummy_iret_handler
- Added dummy EOI handler and all unused IRQ vectors set to this.QEMM 97 does not crash any more.
- Changed INT15 AH=80,81,82,90,91 functions to return success.
- Added INT71(IRQ9 - Redirect to IRQ2) handler.
- Some IRQ handlers call INT15 with AH=91.
- INT16 handler calls INT15 with AX=9002.
- Fixed IRQ14 handler that overwrites 40:8F to 00
- scan for VGABIOS ROM after rombios32 init
- copy PCI ROM to shadow RAM at 0xc0000 and enable it
- NOTE: this feature does not work with BIOS-bochs-legacy, so we should recommend to use the
default BIOS for PCI display adapters
- TODO: load VGABIOS ROM from the vga code instead of main.cc if PCI is disabled
- scan for VGABIOS ROM after rombios32 init
- copy PCI ROM to shadow RAM at 0xc0000 and enable it
- NOTE: this feature does not work with BIOS-bochs-legacy, so we should recommend to use the
default BIOS for PCI display adapters
- TODO: load VGABIOS ROM from the vga code instead of main.cc if PCI is disabled
Volker Ruppert