- meaning of the memory type values changed (0 = ROM, 1 = Shadow RAM)
- the functions mapRead() and mapWrite() are no longer necessary
This commit is contained in:
Volker Ruppert
parent
38666a2cfb
commit
e1d8d30e4c
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: pci.cc,v 1.19 2002-08-31 12:24:39 vruppert Exp $
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// $Id: pci.cc,v 1.20 2002-08-31 15:35:51 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -328,73 +328,43 @@ bx_pci_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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}
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Bit32u
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bx_pci_c::mapRead (Bit32u val)
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{
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switch (val) {
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case 0x0:
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case 0x2:
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return (1); // (0) Goto ROM
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case 0x1:
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case 0x3:
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return (0); // (1) Goto Shadow
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}
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return (2);
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}
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Bit32u
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bx_pci_c::mapWrite (Bit32u val)
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{
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switch (val) {
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case 0x0:
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case 0x1:
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return (1); // (0) Goto ROM
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case 0x2:
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case 0x3:
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return (0); // (1) Goto Shadow
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}
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return (2);
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}
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Bit32u
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Bit8u
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bx_pci_c::rd_memType (Bit32u addr)
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{
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switch ((addr & 0xFC000) >> 12) {
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case 0xC0:
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return (mapRead ( BX_PCI_THIS s.i440fx.pci_conf[0x5A] & 0x3));
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5A] & 0x1);
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case 0xC4:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 4) & 0x1);
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case 0xC8:
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return (mapRead ( BX_PCI_THIS s.i440fx.pci_conf[0x5B] & 0x3));
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5B] & 0x1);
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case 0xCC:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 4) & 0x1);
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case 0xD0:
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return (mapRead ( BX_PCI_THIS s.i440fx.pci_conf[0x5C] & 0x3));
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5C] & 0x1);
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case 0xD4:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 4) & 0x1);
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case 0xD8:
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return (mapRead ( BX_PCI_THIS s.i440fx.pci_conf[0x5D] & 0x3));
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5D] & 0x1);
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case 0xDC:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 4) & 0x1);
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case 0xE0:
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return (mapRead ( BX_PCI_THIS s.i440fx.pci_conf[0x5E] & 0x3));
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5E] & 0x1);
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case 0xE4:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 4) & 0x1);
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case 0xE8:
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return (mapRead ( BX_PCI_THIS s.i440fx.pci_conf[0x5F] & 0x3));
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return (BX_PCI_THIS s.i440fx.pci_conf[0x5F] & 0x1);
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case 0xEC:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 4) & 0x1);
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case 0xF0:
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case 0xF4:
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case 0xF8:
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case 0xFC:
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return (mapRead ( (BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 4) & 0x1);
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default:
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BX_PANIC(("rd_memType () Error: Memory Type not known !"));
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@ -404,43 +374,43 @@ bx_pci_c::rd_memType (Bit32u addr)
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}
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Bit32u
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Bit8u
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bx_pci_c::wr_memType (Bit32u addr)
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{
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switch ((addr & 0xFC000) >> 12) {
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case 0xC0:
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return (mapWrite ( BX_PCI_THIS s.i440fx.pci_conf[0x5A] & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 1) & 0x1);
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case 0xC4:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5A] >> 5) & 0x1);
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case 0xC8:
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return (mapWrite ( BX_PCI_THIS s.i440fx.pci_conf[0x5B] & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 1) & 0x1);
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case 0xCC:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5B] >> 5) & 0x1);
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case 0xD0:
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return (mapWrite ( BX_PCI_THIS s.i440fx.pci_conf[0x5C] & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 1) & 0x1);
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case 0xD4:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5C] >> 5) & 0x1);
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case 0xD8:
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return (mapWrite ( BX_PCI_THIS s.i440fx.pci_conf[0x5D] & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 1) & 0x1);
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case 0xDC:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5D] >> 5) & 0x1);
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case 0xE0:
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return (mapWrite ( BX_PCI_THIS s.i440fx.pci_conf[0x5E] & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 1) & 0x1);
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case 0xE4:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5E] >> 5) & 0x1);
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case 0xE8:
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return (mapWrite ( BX_PCI_THIS s.i440fx.pci_conf[0x5F] & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 1) & 0x1);
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case 0xEC:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x5F] >> 5) & 0x1);
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case 0xF0:
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case 0xF4:
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case 0xF8:
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case 0xFC:
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return (mapWrite ( (BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 4) & 0x3));
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return ( (BX_PCI_THIS s.i440fx.pci_conf[0x59] >> 5) & 0x1);
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default:
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BX_PANIC(("wr_memType () Error: Memory Type not known !"));
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: pci.h,v 1.9 2002-08-31 12:24:41 vruppert Exp $
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// $Id: pci.h,v 1.10 2002-08-31 15:35:51 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -60,8 +60,8 @@ public:
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bx_pci_write_handler_t f2, Bit8u devfunc,
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const char *name);
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BX_PCI_SMF void print_i440fx_state( );
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BX_PCI_SMF Bit32u rd_memType (Bit32u addr);
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BX_PCI_SMF Bit32u wr_memType (Bit32u addr);
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BX_PCI_SMF Bit8u rd_memType (Bit32u addr);
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BX_PCI_SMF Bit8u wr_memType (Bit32u addr);
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private:
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bx_devices_c *devices;
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@ -88,8 +88,6 @@ private:
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Bit32u pci_read(Bit8u address, unsigned io_len);
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void pci_write(Bit8u address, Bit32u value, unsigned io_len);
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#endif
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BX_PCI_SMF Bit32u mapRead (Bit32u val);
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BX_PCI_SMF Bit32u mapWrite (Bit32u val);
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};
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#if BX_USE_PCI_SMF
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: memory.cc,v 1.17 2002-08-31 12:24:41 vruppert Exp $
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// $Id: memory.cc,v 1.18 2002-08-31 15:35:51 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -237,14 +237,14 @@ inc_one:
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if (bx_options.Oi440FXSupport->get () &&
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((a20addr >= 0xC0000) && (a20addr <= 0xFFFFF))) {
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switch (bx_devices.pci->wr_memType(a20addr & 0xFC000)) {
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case 0x0: // Writes to ShadowRAM
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case 0x1: // Writes to ShadowRAM
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// BX_INFO(("Writing to ShadowRAM %08x, len %u ! ", (unsigned) a20addr, (unsigned) len));
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shadow[a20addr - 0xc0000] = *data_ptr;
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BX_DBG_DIRTY_PAGE(a20addr >> 12);
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BX_DYN_DIRTY_PAGE(a20addr >> 12);
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goto inc_one;
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case 0x1: // Writes to ROM, Inhibit
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case 0x0: // Writes to ROM, Inhibit
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BX_DEBUG(("Write to ROM ignored: address %08x, data %02x", (unsigned) a20addr, *data_ptr));
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goto inc_one;
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default:
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@ -471,12 +471,12 @@ inc_one:
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}
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else {
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switch (bx_devices.pci->rd_memType(a20addr & 0xFC000)) {
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case 0x0: // Read from ShadowRAM
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case 0x1: // Read from ShadowRAM
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*data_ptr = shadow[a20addr - 0xc0000];
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BX_INFO(("Reading from ShadowRAM %08x, Data %02x ", (unsigned) a20addr, *data_ptr));
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goto inc_one;
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case 0x1: // Read from ROM
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case 0x0: // Read from ROM
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*data_ptr = vector[a20addr];
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//BX_INFO(("Reading from ROM %08x, Data %02x ", (unsigned) a20addr, *data_ptr));
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goto inc_one;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: misc_mem.cc,v 1.24 2002-08-31 12:24:41 vruppert Exp $
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// $Id: misc_mem.cc,v 1.25 2002-08-31 15:35:51 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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@ -90,7 +90,7 @@ BX_MEM_C::~BX_MEM_C(void)
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void
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BX_MEM_C::init_memory(int memsize)
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{
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BX_DEBUG(("Init $Id: misc_mem.cc,v 1.24 2002-08-31 12:24:41 vruppert Exp $"));
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BX_DEBUG(("Init $Id: misc_mem.cc,v 1.25 2002-08-31 15:35:51 vruppert Exp $"));
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// you can pass 0 if memory has been allocated already through
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// the constructor, or the desired size of memory if it hasn't
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@ -183,10 +183,10 @@ BX_MEM_C::pci_fetch_ptr(Bit32u addr)
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{
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if (bx_options.Oi440FXSupport->get ()) {
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switch (bx_devices.pci->rd_memType (addr)) {
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case 0x0: // Read from ShadowRAM
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case 0x1: // Read from ShadowRAM
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return (&BX_MEM_THIS shadow[addr - 0xc0000]);
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case 0x1: // Read from ROM
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case 0x0: // Read from ROM
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return (&BX_MEM_THIS vector[addr]);
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default:
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BX_PANIC(("pci_fetch_ptr(): default case"));
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@ -221,12 +221,12 @@ BX_MEM_C::dbg_fetch_mem(Bit32u addr, unsigned len, Bit8u *buf)
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if ( bx_options.Oi440FXSupport->get () &&
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((addr >= 0x000C0000) && (addr <= 0x000FFFFF)) ) {
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switch (bx_devices.pci->rd_memType (addr)) {
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case 0x0: // Fetch from ShadowRAM
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case 0x1: // Fetch from ShadowRAM
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*buf = shadow[addr - 0xc0000];
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// BX_INFO(("Fetching from ShadowRAM %06x, len %u !", (unsigned)addr, (unsigned)len));
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break;
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case 0x1: // Fetch from ROM
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case 0x0: // Fetch from ROM
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*buf = vector[addr];
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// BX_INFO(("Fetching from ROM %06x, Data %02x ", (unsigned)addr, *buf));
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break;
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