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remove test registers from disasm as well

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This commit is contained in:
Stanislav Shwartsman 2013-08-23 05:54:51 +00:00
parent 701d88388e
commit 25f99f76c3
5 changed files with 8 additions and 24 deletions
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9
bochs/disasm/dis_groups.cc
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@ -83,15 +83,6 @@ void disassembler::GS(const x86_insn *insn) { dis_sprintf("%s", segment_name[GS_
void disassembler::Sw(const x86_insn *insn) { dis_sprintf("%s", segment_name[insn->nnn]); } void disassembler::Sw(const x86_insn *insn) { dis_sprintf("%s", segment_name[insn->nnn]); }
// test registers
void disassembler::Td(const x86_insn *insn)
{
if (intel_mode)
dis_sprintf ("tr%d", insn->nnn);
else
dis_sprintf("%%tr%d", insn->nnn);
}
// control register // control register
void disassembler::Cd(const x86_insn *insn) void disassembler::Cd(const x86_insn *insn)
{ {

2
bochs/disasm/dis_tables.h
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@ -78,8 +78,6 @@
#define Sw &disassembler::Sw #define Sw &disassembler::Sw
#define Td &disassembler::Td
#define Cd &disassembler::Cd #define Cd &disassembler::Cd
#define Cq &disassembler::Cq #define Cq &disassembler::Cq

16
bochs/disasm/dis_tables.inc
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@ -981,10 +981,10 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes16[256*2] = {
/* 0F 21 */ { 0, &Ia_movl_Rd_Dd }, /* 0F 21 */ { 0, &Ia_movl_Rd_Dd },
/* 0F 22 */ { 0, &Ia_movl_Cd_Rd }, /* 0F 22 */ { 0, &Ia_movl_Cd_Rd },
/* 0F 23 */ { 0, &Ia_movl_Dd_Rd }, /* 0F 23 */ { 0, &Ia_movl_Dd_Rd },
/* 0F 24 */ { 0, &Ia_movl_Rd_Td }, /* 0F 24 */ { 0, &Ia_Invalid },
/* 0F 25 */ { 0, &Ia_Invalid }, /* 0F 25 */ { 0, &Ia_Invalid },
/* 0F 26 */ { 0, &Ia_movl_Td_Rd }, /* 0F 26 */ { 0, &Ia_Invalid },
/* 0F 27 */ { 0, &Ia_Invalid }, /* 0F 27 */ { 0, &Ia_Invalid },
/* 0F 28 */ { GRPSSE(0f28) }, /* 0F 28 */ { GRPSSE(0f28) },
/* 0F 29 */ { GRPSSE(0f29) }, /* 0F 29 */ { GRPSSE(0f29) },
/* 0F 2A */ { GRPSSE(0f2a) }, /* 0F 2A */ { GRPSSE(0f2a) },
@ -1502,10 +1502,10 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes32[256*2] = {
/* 0F 21 */ { 0, &Ia_movl_Rd_Dd }, /* 0F 21 */ { 0, &Ia_movl_Rd_Dd },
/* 0F 22 */ { 0, &Ia_movl_Cd_Rd }, /* 0F 22 */ { 0, &Ia_movl_Cd_Rd },
/* 0F 23 */ { 0, &Ia_movl_Dd_Rd }, /* 0F 23 */ { 0, &Ia_movl_Dd_Rd },
/* 0F 24 */ { 0, &Ia_movl_Rd_Td }, /* 0F 24 */ { 0, &Ia_Invalid },
/* 0F 25 */ { 0, &Ia_Invalid }, /* 0F 25 */ { 0, &Ia_Invalid },
/* 0F 26 */ { 0, &Ia_movl_Td_Rd }, /* 0F 26 */ { 0, &Ia_Invalid },
/* 0F 27 */ { 0, &Ia_Invalid }, /* 0F 27 */ { 0, &Ia_Invalid },
/* 0F 28 */ { GRPSSE(0f28) }, /* 0F 28 */ { GRPSSE(0f28) },
/* 0F 29 */ { GRPSSE(0f29) }, /* 0F 29 */ { GRPSSE(0f29) },
/* 0F 2A */ { GRPSSE(0f2a) }, /* 0F 2A */ { GRPSSE(0f2a) },

3
bochs/disasm/disasm.h
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@ -450,9 +450,6 @@ public:
// segment registers // segment registers
void Sw(const x86_insn *insn); void Sw(const x86_insn *insn);
// test registers
void Td(const x86_insn *insn);
// control register // control register
void Cd(const x86_insn *insn); void Cd(const x86_insn *insn);
void Cq(const x86_insn *insn); void Cq(const x86_insn *insn);

2
bochs/disasm/opcodes.inc
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@ -668,8 +668,6 @@ Ia_movl_Gd_Ed = { "mov", "movl", Gd, Ed, XX, XX, 0 },
Ia_movl_Od_EAX = { "mov", "movl", Od, EAX_Reg, XX, XX, 0 }, Ia_movl_Od_EAX = { "mov", "movl", Od, EAX_Reg, XX, XX, 0 },
Ia_movl_Rd_Cd = { "mov", "movl", Rd, Cd, XX, XX, 0 }, Ia_movl_Rd_Cd = { "mov", "movl", Rd, Cd, XX, XX, 0 },
Ia_movl_Rd_Dd = { "mov", "movl", Rd, Dd, XX, XX, 0 }, Ia_movl_Rd_Dd = { "mov", "movl", Rd, Dd, XX, XX, 0 },
Ia_movl_Rd_Td = { "mov", "movl", Rd, Td, XX, XX, 0 },
Ia_movl_Td_Rd = { "mov", "movl", Td, Rd, XX, XX, 0 },
Ia_movlhpd_Vpd_Udq = { "movlhpd", "movlhpd", Vpd, Udq, XX, XX, IA_SSE2 }, Ia_movlhpd_Vpd_Udq = { "movlhpd", "movlhpd", Vpd, Udq, XX, XX, IA_SSE2 },
Ia_movlhps_Vps_Udq = { "movlhps", "movlhps", Vps, Udq, XX, XX, IA_SSE }, Ia_movlhps_Vps_Udq = { "movlhps", "movlhps", Vps, Udq, XX, XX, IA_SSE },
Ia_movlpd_Mq_Vpd = { "movlpd", "movlpd", Mq, Vpd, XX, XX, IA_SSE2 }, Ia_movlpd_Mq_Vpd = { "movlpd", "movlpd", Mq, Vpd, XX, XX, IA_SSE2 },