From 25f99f76c3df5d5ed478c06f13b5d1b51ec6d76d Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Fri, 23 Aug 2013 05:54:51 +0000 Subject: [PATCH] remove test registers from disasm as well --- bochs/disasm/dis_groups.cc | 9 --------- bochs/disasm/dis_tables.h | 2 -- bochs/disasm/dis_tables.inc | 16 ++++++++-------- bochs/disasm/disasm.h | 3 --- bochs/disasm/opcodes.inc | 2 -- 5 files changed, 8 insertions(+), 24 deletions(-) diff --git a/bochs/disasm/dis_groups.cc b/bochs/disasm/dis_groups.cc index d6163126d..2dc7902e7 100644 --- a/bochs/disasm/dis_groups.cc +++ b/bochs/disasm/dis_groups.cc @@ -83,15 +83,6 @@ void disassembler::GS(const x86_insn *insn) { dis_sprintf("%s", segment_name[GS_ void disassembler::Sw(const x86_insn *insn) { dis_sprintf("%s", segment_name[insn->nnn]); } -// test registers -void disassembler::Td(const x86_insn *insn) -{ - if (intel_mode) - dis_sprintf ("tr%d", insn->nnn); - else - dis_sprintf("%%tr%d", insn->nnn); -} - // control register void disassembler::Cd(const x86_insn *insn) { diff --git a/bochs/disasm/dis_tables.h b/bochs/disasm/dis_tables.h index 05dc685c7..55d049606 100644 --- a/bochs/disasm/dis_tables.h +++ b/bochs/disasm/dis_tables.h @@ -78,8 +78,6 @@ #define Sw &disassembler::Sw -#define Td &disassembler::Td - #define Cd &disassembler::Cd #define Cq &disassembler::Cq diff --git a/bochs/disasm/dis_tables.inc b/bochs/disasm/dis_tables.inc index 4161cd347..718418b09 100644 --- a/bochs/disasm/dis_tables.inc +++ b/bochs/disasm/dis_tables.inc @@ -981,10 +981,10 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes16[256*2] = { /* 0F 21 */ { 0, &Ia_movl_Rd_Dd }, /* 0F 22 */ { 0, &Ia_movl_Cd_Rd }, /* 0F 23 */ { 0, &Ia_movl_Dd_Rd }, - /* 0F 24 */ { 0, &Ia_movl_Rd_Td }, - /* 0F 25 */ { 0, &Ia_Invalid }, - /* 0F 26 */ { 0, &Ia_movl_Td_Rd }, - /* 0F 27 */ { 0, &Ia_Invalid }, + /* 0F 24 */ { 0, &Ia_Invalid }, + /* 0F 25 */ { 0, &Ia_Invalid }, + /* 0F 26 */ { 0, &Ia_Invalid }, + /* 0F 27 */ { 0, &Ia_Invalid }, /* 0F 28 */ { GRPSSE(0f28) }, /* 0F 29 */ { GRPSSE(0f29) }, /* 0F 2A */ { GRPSSE(0f2a) }, @@ -1502,10 +1502,10 @@ static BxDisasmOpcodeTable_t BxDisasmOpcodes32[256*2] = { /* 0F 21 */ { 0, &Ia_movl_Rd_Dd }, /* 0F 22 */ { 0, &Ia_movl_Cd_Rd }, /* 0F 23 */ { 0, &Ia_movl_Dd_Rd }, - /* 0F 24 */ { 0, &Ia_movl_Rd_Td }, - /* 0F 25 */ { 0, &Ia_Invalid }, - /* 0F 26 */ { 0, &Ia_movl_Td_Rd }, - /* 0F 27 */ { 0, &Ia_Invalid }, + /* 0F 24 */ { 0, &Ia_Invalid }, + /* 0F 25 */ { 0, &Ia_Invalid }, + /* 0F 26 */ { 0, &Ia_Invalid }, + /* 0F 27 */ { 0, &Ia_Invalid }, /* 0F 28 */ { GRPSSE(0f28) }, /* 0F 29 */ { GRPSSE(0f29) }, /* 0F 2A */ { GRPSSE(0f2a) }, diff --git a/bochs/disasm/disasm.h b/bochs/disasm/disasm.h index d4238b23e..c49f16fce 100644 --- a/bochs/disasm/disasm.h +++ b/bochs/disasm/disasm.h @@ -450,9 +450,6 @@ public: // segment registers void Sw(const x86_insn *insn); - // test registers - void Td(const x86_insn *insn); - // control register void Cd(const x86_insn *insn); void Cq(const x86_insn *insn); diff --git a/bochs/disasm/opcodes.inc b/bochs/disasm/opcodes.inc index b0e619187..94835b059 100644 --- a/bochs/disasm/opcodes.inc +++ b/bochs/disasm/opcodes.inc @@ -668,8 +668,6 @@ Ia_movl_Gd_Ed = { "mov", "movl", Gd, Ed, XX, XX, 0 }, Ia_movl_Od_EAX = { "mov", "movl", Od, EAX_Reg, XX, XX, 0 }, Ia_movl_Rd_Cd = { "mov", "movl", Rd, Cd, XX, XX, 0 }, Ia_movl_Rd_Dd = { "mov", "movl", Rd, Dd, XX, XX, 0 }, -Ia_movl_Rd_Td = { "mov", "movl", Rd, Td, XX, XX, 0 }, -Ia_movl_Td_Rd = { "mov", "movl", Td, Rd, XX, XX, 0 }, Ia_movlhpd_Vpd_Udq = { "movlhpd", "movlhpd", Vpd, Udq, XX, XX, IA_SSE2 }, Ia_movlhps_Vps_Udq = { "movlhps", "movlhps", Vps, Udq, XX, XX, IA_SSE }, Ia_movlpd_Mq_Vpd = { "movlpd", "movlpd", Mq, Vpd, XX, XX, IA_SSE2 },