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Optimize lazy flags for MUL/IMUL

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This commit is contained in:
Stanislav Shwartsman 2007-11-29 21:45:10 +00:00
parent 8cfd17202a
commit 1a55835155
7 changed files with 69 additions and 103 deletions
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13
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.377 2007-11-27 22:12:44 sshwarts Exp $
// $Id: cpu.h,v 1.378 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -410,7 +410,6 @@ typedef struct {
*/
Bit32u val32; // Raw 32-bit value in x86 bit position. Used to store
// some eflags which are not cached in separate fields.
Bit32u VM_cached;
// accessors for all eflags in bx_flags_reg_t
// The macro is used once for each flag bit
@ -476,10 +475,10 @@ typedef struct {
#define IMPLEMENT_EFLAG_ACCESSOR_VM(bitnum) \
BX_CPP_INLINE Bit32u BX_CPU_C::get_VM() { \
return BX_CPU_THIS_PTR eflags.VM_cached; \
return BX_CPU_THIS_PTR eflags.val32 & (1 << bitnum); \
} \
BX_CPP_INLINE Bit32u BX_CPU_C::getB_VM() { \
return BX_CPU_THIS_PTR eflags.VM_cached > 0; \
return 1 & (BX_CPU_THIS_PTR eflags.val32 >> bitnum); \
} \
BX_CPP_INLINE void BX_CPU_C::assert_VM() { \
set_VM(1); \
@ -491,12 +490,10 @@ typedef struct {
if (long_mode()) return; \
if (val) { \
BX_CPU_THIS_PTR eflags.val32 |= (1<<bitnum); \
BX_CPU_THIS_PTR eflags.VM_cached = 1; \
if (BX_CPU_THIS_PTR cr0.get_PE()) \
BX_CPU_THIS_PTR cpu_mode = BX_MODE_IA32_V8086; \
} else { \
BX_CPU_THIS_PTR eflags.val32 &= ~(1<<bitnum); \
BX_CPU_THIS_PTR eflags.VM_cached = 0; \
if (BX_CPU_THIS_PTR cr0.get_PE()) \
BX_CPU_THIS_PTR cpu_mode = BX_MODE_IA32_PROTECTED; \
} \
@ -1299,13 +1296,13 @@ public: // for now...
return (BX_CPU_THIS_PTR eflags.val32 >> eflagsBitShift) & 1; \
else \
return get_##flag##Lazy(); \
} \
} \
BX_SMF bx_bool get_##flag(void) { \
if ( (BX_CPU_THIS_PTR lf_flags_status & (lfMask)) == 0) \
return BX_CPU_THIS_PTR eflags.val32 & (1<<eflagsBitShift); \
else \
return get_##flag##Lazy(); \
} \
} \
BX_SMF void set_##flag(bx_bool val) { \
BX_CPU_THIS_PTR lf_flags_status &= ~(lfMask); \
BX_CPU_THIS_PTR eflags.val32 &= ~(1<<eflagsBitShift); \

7
bochs/cpu/io_pro.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: io_pro.cc,v 1.24 2007-11-26 17:45:48 sshwarts Exp $
// $Id: io_pro.cc,v 1.25 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -135,7 +135,6 @@ BX_CPU_C::outp8(Bit16u addr, Bit8u value)
bx_bool BX_CPU_C::allow_io(Bit16u addr, unsigned len)
{
Bit16u io_base, permission16;
unsigned bit_index, i;
if (BX_CPU_THIS_PTR tr.cache.valid==0 ||
BX_CPU_THIS_PTR tr.cache.type != BX_SYS_SEGMENT_AVAIL_386_TSS)
@ -166,9 +165,9 @@ bx_bool BX_CPU_C::allow_io(Bit16u addr, unsigned len)
access_linear(BX_CPU_THIS_PTR tr.cache.u.system.base + io_base + addr/8,
2, 0, BX_READ, &permission16);
bit_index = addr & 0x07;
unsigned bit_index = addr & 0x07;
permission16 >>= bit_index;
for (i=0; i<len; i++) {
for (unsigned i=0; i<len; i++) {
if (permission16 & 0x01)
return(0);
permission16 >>= 1;

106
bochs/cpu/lazy_flags.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: lazy_flags.cc,v 1.36 2007-11-19 19:55:09 sshwarts Exp $
// $Id: lazy_flags.cc,v 1.37 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -239,28 +239,28 @@ bx_bool BX_CPU_C::get_CFLazy(void)
break;
#endif
case BX_INSTR_IMUL8:
cf = ! ((BX_CPU_THIS_PTR oszapc.op1_8 < 0x80 &&
cf = ! ((BX_CPU_THIS_PTR oszapc.result_8 < 0x80 &&
BX_CPU_THIS_PTR oszapc.op2_8 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_8 & 0x80) &&
((BX_CPU_THIS_PTR oszapc.result_8 & 0x80) &&
BX_CPU_THIS_PTR oszapc.op2_8 == 0xff));
break;
case BX_INSTR_IMUL16:
cf = ! ((BX_CPU_THIS_PTR oszapc.op1_16 < 0x8000 &&
cf = ! ((BX_CPU_THIS_PTR oszapc.result_16 < 0x8000 &&
BX_CPU_THIS_PTR oszapc.op2_16 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000) &&
((BX_CPU_THIS_PTR oszapc.result_16 & 0x8000) &&
BX_CPU_THIS_PTR oszapc.op2_16 == 0xffff));
break;
case BX_INSTR_IMUL32:
cf = ! ((BX_CPU_THIS_PTR oszapc.op1_32 < 0x80000000 &&
cf = ! ((BX_CPU_THIS_PTR oszapc.result_32 < 0x80000000 &&
BX_CPU_THIS_PTR oszapc.op2_32 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000) &&
((BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000) &&
BX_CPU_THIS_PTR oszapc.op2_32 == 0xffffffff));
break;
#if BX_SUPPORT_X86_64
case BX_INSTR_IMUL64:
cf = ! ((BX_CPU_THIS_PTR oszapc.op1_64 < BX_CONST64(0x8000000000000000) &&
cf = ! ((BX_CPU_THIS_PTR oszapc.result_64 < BX_CONST64(0x8000000000000000) &&
BX_CPU_THIS_PTR oszapc.op2_64 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000)) &&
((BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000)) &&
BX_CPU_THIS_PTR oszapc.op2_64 == BX_CONST64(0xffffffffffffffff)));
break;
#endif
@ -473,6 +473,8 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
case BX_INSTR_SHL8:
case BX_INSTR_IMUL8:
case BX_INSTR_MUL8:
zf = (BX_CPU_THIS_PTR oszapc.result_8 == 0);
break;
case BX_INSTR_LOGIC16:
@ -485,6 +487,8 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SHR16:
case BX_INSTR_SHRD16:
case BX_INSTR_SHL16:
case BX_INSTR_IMUL16:
case BX_INSTR_MUL16:
zf = (BX_CPU_THIS_PTR oszapc.result_16 == 0);
break;
case BX_INSTR_LOGIC32:
@ -497,6 +501,8 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SHR32:
case BX_INSTR_SHRD32:
case BX_INSTR_SHL32:
case BX_INSTR_IMUL32:
case BX_INSTR_MUL32:
zf = (BX_CPU_THIS_PTR oszapc.result_32 == 0);
break;
#if BX_SUPPORT_X86_64
@ -510,25 +516,9 @@ bx_bool BX_CPU_C::get_ZFLazy(void)
case BX_INSTR_SHR64:
case BX_INSTR_SHRD64:
case BX_INSTR_SHL64:
zf = (BX_CPU_THIS_PTR oszapc.result_64 == 0);
break;
#endif
case BX_INSTR_IMUL8:
case BX_INSTR_MUL8:
zf = (BX_CPU_THIS_PTR oszapc.op1_8 == 0);
break;
case BX_INSTR_IMUL16:
case BX_INSTR_MUL16:
zf = (BX_CPU_THIS_PTR oszapc.op1_16 == 0);
break;
case BX_INSTR_IMUL32:
case BX_INSTR_MUL32:
zf = (BX_CPU_THIS_PTR oszapc.op1_32 == 0);
break;
#if BX_SUPPORT_X86_64
case BX_INSTR_IMUL64:
case BX_INSTR_MUL64:
zf = (BX_CPU_THIS_PTR oszapc.op1_64 == 0);
zf = (BX_CPU_THIS_PTR oszapc.result_64 == 0);
break;
#endif
case BX_INSTR_BITSCAN16:
@ -602,6 +592,8 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
case BX_INSTR_SHL8:
case BX_INSTR_IMUL8:
case BX_INSTR_MUL8:
sf = (BX_CPU_THIS_PTR oszapc.result_8 >= 0x80);
break;
case BX_INSTR_LOGIC16:
@ -615,6 +607,8 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SHRD16:
case BX_INSTR_SHL16:
case BX_INSTR_BITSCAN16:
case BX_INSTR_IMUL16:
case BX_INSTR_MUL16:
sf = (BX_CPU_THIS_PTR oszapc.result_16 >= 0x8000);
break;
case BX_INSTR_LOGIC32:
@ -628,6 +622,8 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SHRD32:
case BX_INSTR_SHL32:
case BX_INSTR_BITSCAN32:
case BX_INSTR_IMUL32:
case BX_INSTR_MUL32:
sf = (BX_CPU_THIS_PTR oszapc.result_32 >= 0x80000000);
break;
#if BX_SUPPORT_X86_64
@ -642,25 +638,9 @@ bx_bool BX_CPU_C::get_SFLazy(void)
case BX_INSTR_SHRD64:
case BX_INSTR_SHL64:
case BX_INSTR_BITSCAN64:
sf = (BX_CPU_THIS_PTR oszapc.result_64 >= BX_CONST64(0x8000000000000000));
break;
#endif
case BX_INSTR_IMUL8:
case BX_INSTR_MUL8:
sf = (BX_CPU_THIS_PTR oszapc.op1_8 >= 0x80);
break;
case BX_INSTR_IMUL16:
case BX_INSTR_MUL16:
sf = (BX_CPU_THIS_PTR oszapc.op1_16 >= 0x8000);
break;
case BX_INSTR_IMUL32:
case BX_INSTR_MUL32:
sf = (BX_CPU_THIS_PTR oszapc.op1_32 >= 0x80000000);
break;
#if BX_SUPPORT_X86_64
case BX_INSTR_IMUL64:
case BX_INSTR_MUL64:
sf = (BX_CPU_THIS_PTR oszapc.op1_64 >= BX_CONST64(0x8000000000000000));
sf = (BX_CPU_THIS_PTR oszapc.result_64 >= BX_CONST64(0x8000000000000000));
break;
#endif
default:
@ -891,28 +871,28 @@ bx_bool BX_CPU_C::get_OFLazy(void)
break;
#endif
case BX_INSTR_IMUL8:
of = ! ((BX_CPU_THIS_PTR oszapc.op1_8 < 0x80 &&
of = ! ((BX_CPU_THIS_PTR oszapc.result_8 < 0x80 &&
BX_CPU_THIS_PTR oszapc.op2_8 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_8 & 0x80) &&
((BX_CPU_THIS_PTR oszapc.result_8 & 0x80) &&
BX_CPU_THIS_PTR oszapc.op2_8 == 0xff));
break;
case BX_INSTR_IMUL16:
of = ! ((BX_CPU_THIS_PTR oszapc.op1_16 < 0x8000 &&
of = ! ((BX_CPU_THIS_PTR oszapc.result_16 < 0x8000 &&
BX_CPU_THIS_PTR oszapc.op2_16 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_16 & 0x8000) &&
((BX_CPU_THIS_PTR oszapc.result_16 & 0x8000) &&
BX_CPU_THIS_PTR oszapc.op2_16 == 0xffff));
break;
case BX_INSTR_IMUL32:
of = ! ((BX_CPU_THIS_PTR oszapc.op1_32 < 0x80000000 &&
of = ! ((BX_CPU_THIS_PTR oszapc.result_32 < 0x80000000 &&
BX_CPU_THIS_PTR oszapc.op2_32 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_32 & 0x80000000) &&
((BX_CPU_THIS_PTR oszapc.result_32 & 0x80000000) &&
BX_CPU_THIS_PTR oszapc.op2_32 == 0xffffffff));
break;
#if BX_SUPPORT_X86_64
case BX_INSTR_IMUL64:
of = ! ((BX_CPU_THIS_PTR oszapc.op1_64 < BX_CONST64(0x8000000000000000) &&
of = ! ((BX_CPU_THIS_PTR oszapc.result_64 < BX_CONST64(0x8000000000000000) &&
BX_CPU_THIS_PTR oszapc.op2_64 == 0) ||
((BX_CPU_THIS_PTR oszapc.op1_64 & BX_CONST64(0x8000000000000000)) &&
((BX_CPU_THIS_PTR oszapc.result_64 & BX_CONST64(0x8000000000000000)) &&
BX_CPU_THIS_PTR oszapc.op2_64 == BX_CONST64(0xffffffffffffffff)));
break;
#endif
@ -1004,6 +984,8 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SAR8:
case BX_INSTR_SHR8:
case BX_INSTR_SHL8:
case BX_INSTR_IMUL8:
case BX_INSTR_MUL8:
pf = bx_parity_lookup[BX_CPU_THIS_PTR oszapc.result_8];
break;
case BX_INSTR_LOGIC16:
@ -1017,6 +999,8 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SHRD16:
case BX_INSTR_SHL16:
case BX_INSTR_BITSCAN16:
case BX_INSTR_IMUL16:
case BX_INSTR_MUL16:
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_16];
break;
case BX_INSTR_LOGIC32:
@ -1030,6 +1014,8 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SHRD32:
case BX_INSTR_SHL32:
case BX_INSTR_BITSCAN32:
case BX_INSTR_IMUL32:
case BX_INSTR_MUL32:
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_32];
break;
#if BX_SUPPORT_X86_64
@ -1044,25 +1030,9 @@ bx_bool BX_CPU_C::get_PFLazy(void)
case BX_INSTR_SHRD64:
case BX_INSTR_SHL64:
case BX_INSTR_BITSCAN64:
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_64];
break;
#endif
case BX_INSTR_IMUL8:
case BX_INSTR_MUL8:
pf = bx_parity_lookup[BX_CPU_THIS_PTR oszapc.op1_8];
break;
case BX_INSTR_IMUL16:
case BX_INSTR_MUL16:
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.op1_16];
break;
case BX_INSTR_IMUL32:
case BX_INSTR_MUL32:
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.op1_32];
break;
#if BX_SUPPORT_X86_64
case BX_INSTR_IMUL64:
case BX_INSTR_MUL64:
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.op1_64];
pf = bx_parity_lookup[(Bit8u) BX_CPU_THIS_PTR oszapc.result_64];
break;
#endif
default:

10
bochs/cpu/mult16.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mult16.cc,v 1.22 2007-11-17 23:28:31 sshwarts Exp $
// $Id: mult16.cc,v 1.23 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -52,7 +52,7 @@ void BX_CPU_C::MUL_AXEw(bxInstruction_c *i)
Bit16u product_16h = product_32 >> 16;
/* set EFLAGS */
SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, BX_INSTR_MUL16);
SET_FLAGS_OSZAPC_S2_16(product_16h, product_16l, BX_INSTR_MUL16);
/* now write product back to destination */
AX = product_16l;
@ -86,7 +86,7 @@ void BX_CPU_C::IMUL_AXEw(bxInstruction_c *i)
* IMUL r/m16: condition for clearing CF & OF:
* DX:AX = sign-extend of AX
*/
SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, BX_INSTR_IMUL16);
SET_FLAGS_OSZAPC_S2_16(product_16h, product_16l, BX_INSTR_IMUL16);
}
void BX_CPU_C::DIV_AXEw(bxInstruction_c *i)
@ -197,7 +197,7 @@ void BX_CPU_C::IMUL_GwEwIw(bxInstruction_c *i)
* IMUL r16,r/m16,imm16: condition for clearing CF & OF:
* result exactly fits within r16
*/
SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, BX_INSTR_IMUL16);
SET_FLAGS_OSZAPC_S2_16(product_16h, product_16l, BX_INSTR_IMUL16);
}
void BX_CPU_C::IMUL_GwEw(bxInstruction_c *i)
@ -226,5 +226,5 @@ void BX_CPU_C::IMUL_GwEw(bxInstruction_c *i)
* IMUL r16,r/m16,imm16: condition for clearing CF & OF:
* result exactly fits within r16
*/
SET_FLAGS_OSZAPC_S1S2_16(product_16l, product_16h, BX_INSTR_IMUL16);
SET_FLAGS_OSZAPC_S2_16(product_16h, product_16l, BX_INSTR_IMUL16);
}

10
bochs/cpu/mult32.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mult32.cc,v 1.21 2007-11-17 23:28:31 sshwarts Exp $
// $Id: mult32.cc,v 1.22 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -59,7 +59,7 @@ void BX_CPU_C::MUL_EAXEd(bxInstruction_c *i)
product_32h = (Bit32u) (product_64 >> 32);
/* set EFLAGS */
SET_FLAGS_OSZAPC_S1S2_32(product_32l, product_32h, BX_INSTR_MUL32);
SET_FLAGS_OSZAPC_S2_32(product_32h, product_32l, BX_INSTR_MUL32);
/* now write product back to destination */
RAX = product_32l;
@ -93,7 +93,7 @@ void BX_CPU_C::IMUL_EAXEd(bxInstruction_c *i)
* IMUL r/m32: condition for clearing CF & OF:
* EDX:EAX = sign-extend of EAX
*/
SET_FLAGS_OSZAPC_S1S2_32(product_32l, product_32h, BX_INSTR_IMUL32);
SET_FLAGS_OSZAPC_S2_32(product_32h, product_32l, BX_INSTR_IMUL32);
}
void BX_CPU_C::DIV_EAXEd(bxInstruction_c *i)
@ -201,7 +201,7 @@ void BX_CPU_C::IMUL_GdEdId(bxInstruction_c *i)
* IMUL r32,r/m32,imm32: condition for clearing CF & OF:
* result exactly fits within r32
*/
SET_FLAGS_OSZAPC_S1S2_32(product_32l, product_32h, BX_INSTR_IMUL32);
SET_FLAGS_OSZAPC_S2_32(product_32h, product_32l, BX_INSTR_IMUL32);
}
void BX_CPU_C::IMUL_GdEd(bxInstruction_c *i)
@ -230,5 +230,5 @@ void BX_CPU_C::IMUL_GdEd(bxInstruction_c *i)
* IMUL r32,r/m32,imm32: condition for clearing CF & OF:
* result exactly fits within r32
*/
SET_FLAGS_OSZAPC_S1S2_32(product_32l, product_32h, BX_INSTR_IMUL32);
SET_FLAGS_OSZAPC_S2_32(product_32h, product_32l, BX_INSTR_IMUL32);
}

14
bochs/cpu/mult64.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mult64.cc,v 1.19 2007-11-17 23:28:31 sshwarts Exp $
// $Id: mult64.cc,v 1.20 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -228,12 +228,12 @@ void BX_CPU_C::MUL_RAXEq(bxInstruction_c *i)
long_mul(&product_128,op1_64,op2_64);
/* set EFLAGS */
SET_FLAGS_OSZAPC_S1S2_64(product_128.lo, product_128.hi, BX_INSTR_MUL64);
/* now write product back to destination */
RAX = product_128.lo;
RDX = product_128.hi;
/* set EFLAGS */
SET_FLAGS_OSZAPC_S2_64(product_128.hi, product_128.lo, BX_INSTR_MUL64);
}
void BX_CPU_C::IMUL_RAXEq(bxInstruction_c *i)
@ -266,7 +266,7 @@ void BX_CPU_C::IMUL_RAXEq(bxInstruction_c *i)
* IMUL r/m64: condition for clearing CF & OF:
* RDX:RAX = sign-extend of RAX
*/
SET_FLAGS_OSZAPC_S1S2_64(product_128.lo, product_128.hi, BX_INSTR_IMUL64);
SET_FLAGS_OSZAPC_S2_64(product_128.hi, product_128.lo, BX_INSTR_IMUL64);
}
void BX_CPU_C::DIV_RAXEq(bxInstruction_c *i)
@ -384,7 +384,7 @@ void BX_CPU_C::IMUL_GqEqId(bxInstruction_c *i)
* IMUL r64,r/m64,imm64: condition for clearing CF & OF:
* result exactly fits within r64
*/
SET_FLAGS_OSZAPC_S1S2_64(product_128.lo, product_128.hi, BX_INSTR_IMUL64);
SET_FLAGS_OSZAPC_S2_64(product_128.hi, product_128.lo, BX_INSTR_IMUL64);
}
void BX_CPU_C::IMUL_GqEq(bxInstruction_c *i)
@ -412,7 +412,7 @@ void BX_CPU_C::IMUL_GqEq(bxInstruction_c *i)
* IMUL r64,r/m64,imm64: condition for clearing CF & OF:
* result exactly fits within r64
*/
SET_FLAGS_OSZAPC_S1S2_64(product_128.lo, product_128.hi, BX_INSTR_IMUL64);
SET_FLAGS_OSZAPC_S2_64(product_128.hi, product_128.lo, BX_INSTR_IMUL64);
}
#endif /* if BX_SUPPORT_X86_64 */

12
bochs/cpu/mult8.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: mult8.cc,v 1.22 2007-11-17 23:28:31 sshwarts Exp $
// $Id: mult8.cc,v 1.23 2007-11-29 21:45:10 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -53,7 +53,7 @@ void BX_CPU_C::MUL_ALEb(bxInstruction_c *i)
Bit8u product_8h = product_16 >> 8;
/* set EFLAGS */
SET_FLAGS_OSZAPC_S1S2_8(product_8l, product_8h, BX_INSTR_MUL8);
SET_FLAGS_OSZAPC_S2_8(product_8h, product_8l, BX_INSTR_MUL8);
/* now write product back to destination */
AX = product_16;
@ -79,14 +79,14 @@ void BX_CPU_C::IMUL_ALEb(bxInstruction_c *i)
Bit8u product_8l = (product_16 & 0xFF);
Bit8u product_8h = product_16 >> 8;
/* now write product back to destination */
AX = product_16;
/* set EFLAGS:
* IMUL r/m8: condition for clearing CF & OF:
* AX = sign-extend of AL to 16 bits
*/
SET_FLAGS_OSZAPC_S1S2_8(product_8l, product_8h, BX_INSTR_IMUL8);
/* now write product back to destination */
AX = product_16;
SET_FLAGS_OSZAPC_S2_8(product_8h, product_8l, BX_INSTR_IMUL8);
}
void BX_CPU_C::DIV_ALEb(bxInstruction_c *i)