2004-06-18 18:11:11 +04:00
|
|
|
/////////////////////////////////////////////////////////////////////////
|
2009-06-05 16:24:20 +04:00
|
|
|
// $Id: fpu_load_store.cc,v 1.37 2009-06-05 12:24:20 sshwarts Exp $
|
2005-03-21 00:19:38 +03:00
|
|
|
/////////////////////////////////////////////////////////////////////////
|
2004-06-18 18:11:11 +04:00
|
|
|
//
|
2005-05-12 22:07:48 +04:00
|
|
|
// Copyright (c) 2003 Stanislav Shwartsman
|
2007-03-24 00:27:13 +03:00
|
|
|
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
|
2004-06-18 18:11:11 +04:00
|
|
|
//
|
|
|
|
// This library is free software; you can redistribute it and/or
|
|
|
|
// modify it under the terms of the GNU Lesser General Public
|
|
|
|
// License as published by the Free Software Foundation; either
|
|
|
|
// version 2 of the License, or (at your option) any later version.
|
|
|
|
//
|
|
|
|
// This library is distributed in the hope that it will be useful,
|
|
|
|
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
// Lesser General Public License for more details.
|
|
|
|
//
|
|
|
|
// You should have received a copy of the GNU Lesser General Public
|
|
|
|
// License along with this library; if not, write to the Free Software
|
2009-02-08 20:29:34 +03:00
|
|
|
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
2005-05-12 22:07:48 +04:00
|
|
|
//
|
2004-06-18 18:11:11 +04:00
|
|
|
/////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
#define NEED_CPU_REG_SHORTCUTS 1
|
|
|
|
#include "bochs.h"
|
2006-03-07 01:03:16 +03:00
|
|
|
#include "cpu/cpu.h"
|
2004-06-18 18:11:11 +04:00
|
|
|
#define LOG_THIS BX_CPU_THIS_PTR
|
|
|
|
|
2008-04-05 01:05:37 +04:00
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
#define swap_values(a, b) ((a)^=(b)^=(a)^=(b))
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
extern float_status_t FPU_pre_exception_handling(Bit16u control_word);
|
|
|
|
|
|
|
|
#include "softfloatx80.h"
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_STi(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (! IS_TAG_EMPTY(-1))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2008-05-05 01:22:42 +04:00
|
|
|
return;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
2008-09-04 00:13:52 +04:00
|
|
|
floatx80 sti_reg = floatx80_default_nan;
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
if (IS_TAG_EMPTY(i->rm()))
|
|
|
|
{
|
2008-09-04 00:13:52 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-09-04 00:13:52 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
sti_reg = BX_READ_FPU_REG(i->rm());
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
2008-05-10 17:34:01 +04:00
|
|
|
BX_WRITE_FPU_REG(sti_reg, 0);
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FLD_STi: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_SINGLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-04-26 23:38:53 +04:00
|
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
if (! IS_TAG_EMPTY(-1)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2008-05-05 01:22:42 +04:00
|
|
|
return;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2009-03-11 00:43:11 +03:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
// convert to floatx80 format
|
|
|
|
floatx80 result = float32_to_floatx80(load_reg, status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
unsigned unmasked = FPU_exception(status.float_exception_flags);
|
2009-05-07 20:27:18 +04:00
|
|
|
if (! (unmasked & FPU_CW_Invalid)) {
|
2009-03-11 00:43:11 +03:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FLD_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-04-26 23:38:53 +04:00
|
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
if (! IS_TAG_EMPTY(-1)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2008-05-05 01:22:42 +04:00
|
|
|
return;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2009-03-11 00:43:11 +03:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
// convert to floatx80 format
|
|
|
|
floatx80 result = float64_to_floatx80(load_reg, status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
unsigned unmasked = FPU_exception(status.float_exception_flags);
|
2009-05-07 20:27:18 +04:00
|
|
|
if (! (unmasked & FPU_CW_Invalid)) {
|
2009-03-11 00:43:11 +03:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FLD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_EXTENDED_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
floatx80 result;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-06-12 23:14:40 +04:00
|
|
|
result.fraction = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
result.exp = read_virtual_word (i->seg(), RMAddr(i)+8);
|
2008-04-26 23:38:53 +04:00
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
if (! IS_TAG_EMPTY(-1)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
2009-03-11 00:43:11 +03:00
|
|
|
else {
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FLD_EXTENDED_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DF /0 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-04-26 23:38:53 +04:00
|
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
if (! IS_TAG_EMPTY(-1)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
2009-03-11 00:43:11 +03:00
|
|
|
else {
|
|
|
|
floatx80 result = int32_to_floatx80((Bit32s) load_reg);
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FILD_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DB /0 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-04-26 23:38:53 +04:00
|
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
if (! IS_TAG_EMPTY(-1)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
2009-03-11 00:43:11 +03:00
|
|
|
else {
|
|
|
|
floatx80 result = int32_to_floatx80(load_reg);
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FILD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DF /5 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_QWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-04-26 23:38:53 +04:00
|
|
|
Bit64s load_reg = (Bit64s) read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
if (! IS_TAG_EMPTY(-1)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
2009-03-11 00:43:11 +03:00
|
|
|
else {
|
|
|
|
floatx80 result = int64_to_floatx80(load_reg);
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FILD_QWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DF /4 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBLD_PACKED_BCD(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
2008-04-26 23:38:53 +04:00
|
|
|
Bit16u hi2 = read_virtual_word (i->seg(), RMAddr(i) + 8);
|
|
|
|
Bit64u lo8 = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (! IS_TAG_EMPTY(-1))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_overflow();
|
2008-05-05 01:22:42 +04:00
|
|
|
return;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
2008-04-26 23:38:53 +04:00
|
|
|
// convert packed BCD to 64-bit integer
|
2008-02-06 01:33:35 +03:00
|
|
|
Bit64s scale = 1;
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit64s val64 = 0;
|
|
|
|
|
2005-01-19 21:21:40 +03:00
|
|
|
for (int n = 0; n < 16; n++)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
2008-05-05 01:22:42 +04:00
|
|
|
val64 += (lo8 & 0x0f) * scale;
|
2004-06-18 18:11:11 +04:00
|
|
|
lo8 >>= 4;
|
|
|
|
scale *= 10;
|
|
|
|
}
|
|
|
|
|
2008-05-05 01:22:42 +04:00
|
|
|
val64 += (hi2 & 0x0f) * scale;
|
|
|
|
val64 += ((hi2>>4) & 0x0f) * scale * 10;
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
floatx80 result = int64_to_floatx80(val64);
|
2009-03-11 00:43:11 +03:00
|
|
|
if (hi2 & 0x8000) // set negative
|
2004-06-18 18:11:11 +04:00
|
|
|
floatx80_chs(result);
|
|
|
|
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_push();
|
|
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
#else
|
|
|
|
BX_INFO(("FBLD_PACKED_BCD: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_STi(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
int pop_stack = i->nnn() & 1;
|
2008-04-21 18:17:48 +04:00
|
|
|
// handle special case of FSTP opcode @ 0xDF 0xD0..D7
|
|
|
|
if (i->b1() == 0xdf)
|
|
|
|
pop_stack = 1;
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-05-10 13:17:24 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2008-05-10 17:34:01 +04:00
|
|
|
if (IS_TAG_EMPTY(0)) {
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_stack_underflow(i->rm(), pop_stack);
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
2009-03-11 00:43:11 +03:00
|
|
|
else {
|
|
|
|
floatx80 st0_reg = BX_READ_FPU_REG(0);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-03-11 00:43:11 +03:00
|
|
|
BX_WRITE_FPU_REG(st0_reg, i->rm());
|
|
|
|
if (pop_stack)
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
}
|
2004-06-18 18:11:11 +04:00
|
|
|
#else
|
|
|
|
BX_INFO(("FST(P)_STi: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_SINGLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2008-05-10 13:17:24 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
float32 save_reg = float32_default_nan; /* The masked response */
|
|
|
|
|
|
|
|
int pop_stack = i->nnn() & 1;
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
save_reg = floatx80_to_float32(BX_READ_FPU_REG(0), status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_dword(i->seg(), RMAddr(i), save_reg);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
2004-06-18 18:11:11 +04:00
|
|
|
if (pop_stack)
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FST(P)_SINGLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_DOUBLE_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2008-05-10 13:17:24 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
float64 save_reg = float64_default_nan; /* The masked response */
|
|
|
|
|
|
|
|
int pop_stack = i->nnn() & 1;
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
save_reg = floatx80_to_float64(BX_READ_FPU_REG(0), status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_qword(i->seg(), RMAddr(i), save_reg);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
2004-06-18 18:11:11 +04:00
|
|
|
if (pop_stack)
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FST(P)_DOUBLE_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DB /7 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSTP_EXTENDED_REAL(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2008-05-10 13:17:24 +04:00
|
|
|
clear_C1();
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
floatx80 save_reg = floatx80_default_nan; /* The masked response */
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
save_reg = BX_READ_FPU_REG(0);
|
|
|
|
}
|
|
|
|
|
2008-06-12 23:14:40 +04:00
|
|
|
write_virtual_qword(i->seg(), RMAddr(i), save_reg.fraction);
|
|
|
|
write_virtual_word (i->seg(), RMAddr(i) + 8, save_reg.exp);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FSTP_EXTENDED_REAL: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_WORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit16s save_reg = int16_indefinite;
|
|
|
|
|
|
|
|
int pop_stack = i->nnn() & 1;
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-05-05 01:22:42 +04:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-05-05 01:22:42 +04:00
|
|
|
save_reg = floatx80_to_int16(BX_READ_FPU_REG(0), status);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
2004-06-18 18:11:11 +04:00
|
|
|
if (pop_stack)
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIST(P)_WORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_DWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit32s save_reg = int32_indefinite; /* The masked response */
|
|
|
|
|
|
|
|
int pop_stack = i->nnn() & 1;
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
save_reg = floatx80_to_int32(BX_READ_FPU_REG(0), status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
2004-06-18 18:11:11 +04:00
|
|
|
if (pop_stack)
|
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FIST(P)_DWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTP_QWORD_INTEGER(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit64s save_reg = int64_indefinite; /* The masked response */
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
save_reg = floatx80_to_int64(BX_READ_FPU_REG(0), status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
|
2009-06-05 16:24:20 +04:00
|
|
|
|
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FISTP_QWORD_INTEGER: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBSTP_PACKED_BCD(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
|
|
|
#if BX_SUPPORT_FPU
|
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2008-02-06 01:33:35 +03:00
|
|
|
/*
|
|
|
|
* The packed BCD integer indefinite encoding (FFFFC000000000000000H)
|
|
|
|
* is stored in response to a masked floating-point invalid-operation
|
2004-06-18 18:11:11 +04:00
|
|
|
* exception.
|
|
|
|
*/
|
|
|
|
Bit16u save_reg_hi = 0xFFFF;
|
|
|
|
Bit64u save_reg_lo = BX_CONST64(0xC000000000000000);
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-05-05 01:22:42 +04:00
|
|
|
floatx80 reg = BX_READ_FPU_REG(0);
|
|
|
|
|
|
|
|
Bit64s save_val = floatx80_to_int64(reg, status);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-05-05 01:22:42 +04:00
|
|
|
int sign = (reg.exp & 0x8000) != 0;
|
2008-02-06 01:33:35 +03:00
|
|
|
if (sign)
|
2004-06-18 18:11:11 +04:00
|
|
|
save_val = -save_val;
|
2008-02-06 01:33:35 +03:00
|
|
|
|
2009-05-21 18:33:06 +04:00
|
|
|
if (save_val > BX_CONST64(999999999999999999)) {
|
|
|
|
status.float_exception_flags = float_flag_invalid; // throw away other flags
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
2008-02-06 01:33:35 +03:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
if (! (status.float_exception_flags & float_flag_invalid))
|
|
|
|
{
|
|
|
|
save_reg_hi = (sign) ? 0x8000 : 0;
|
|
|
|
save_reg_lo = 0;
|
|
|
|
|
2009-05-21 18:33:06 +04:00
|
|
|
for (int i=0; i<16; i++) {
|
2004-06-18 18:11:11 +04:00
|
|
|
save_reg_lo += ((Bit64u)(save_val % 10)) << (4*i);
|
|
|
|
save_val /= 10;
|
|
|
|
}
|
|
|
|
|
2005-01-19 21:21:40 +03:00
|
|
|
save_reg_hi += (Bit16u)(save_val % 10);
|
2004-06-18 18:11:11 +04:00
|
|
|
save_val /= 10;
|
2005-01-19 21:21:40 +03:00
|
|
|
save_reg_hi += (Bit16u)(save_val % 10) << 4;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* check for fpu arithmetic exceptions */
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
// write packed bcd to memory
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_qword(i->seg(), RMAddr(i), save_reg_lo);
|
|
|
|
write_virtual_word (i->seg(), RMAddr(i) + 8, save_reg_hi);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
|
|
|
BX_INFO(("FBSTP_PACKED_BCD: required FPU, configure --enable-fpu"));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DF /1 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP16(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
2006-02-20 22:28:57 +03:00
|
|
|
#if BX_SUPPORT_SSE >= 3
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit16s save_reg = int16_indefinite; /* The masked response */
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-05-05 01:22:42 +04:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
2008-05-05 01:22:42 +04:00
|
|
|
save_reg = floatx80_to_int16_round_to_zero(BX_READ_FPU_REG(0), status);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
|
2009-06-05 16:24:20 +04:00
|
|
|
|
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
2006-04-05 21:31:35 +04:00
|
|
|
BX_INFO(("FISTTP16: required SSE3, use --enable-sse option"));
|
2008-07-13 19:35:10 +04:00
|
|
|
exception(BX_UD_EXCEPTION, 0, 0);
|
2004-06-18 18:11:11 +04:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DB /1 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP32(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
2006-02-20 22:28:57 +03:00
|
|
|
#if BX_SUPPORT_SSE >= 3
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit32s save_reg = int32_indefinite; /* The masked response */
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
save_reg = floatx80_to_int32_round_to_zero(BX_READ_FPU_REG(0), status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2009-03-11 00:43:11 +03:00
|
|
|
return;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
|
2009-06-05 16:24:20 +04:00
|
|
|
|
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
2006-04-05 21:31:35 +04:00
|
|
|
BX_INFO(("FISTTP32: required SSE3, use --enable-sse option"));
|
2008-07-13 19:35:10 +04:00
|
|
|
exception(BX_UD_EXCEPTION, 0, 0);
|
2004-06-18 18:11:11 +04:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* DD /1 */
|
2008-03-23 00:29:41 +03:00
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP64(bxInstruction_c *i)
|
2004-06-18 18:11:11 +04:00
|
|
|
{
|
2006-02-20 22:28:57 +03:00
|
|
|
#if BX_SUPPORT_SSE >= 3
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
|
2009-04-27 18:00:55 +04:00
|
|
|
RMAddr(i) = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
FPU_update_last_instruction(i);
|
|
|
|
|
|
|
|
Bit16u x87_sw = FPU_PARTIAL_STATUS;
|
2009-04-27 18:00:55 +04:00
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
Bit64s save_reg = int64_indefinite; /* The masked response */
|
|
|
|
|
|
|
|
clear_C1();
|
|
|
|
|
|
|
|
if (IS_TAG_EMPTY(0))
|
|
|
|
{
|
2009-05-28 23:25:33 +04:00
|
|
|
FPU_exception(FPU_EX_Stack_Underflow);
|
2004-06-18 18:11:11 +04:00
|
|
|
|
2008-07-13 15:22:55 +04:00
|
|
|
if (! BX_CPU_THIS_PTR the_i387.is_IA_masked())
|
2004-06-18 18:11:11 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2008-02-06 01:33:35 +03:00
|
|
|
float_status_t status =
|
2004-06-18 18:11:11 +04:00
|
|
|
FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
|
|
save_reg = floatx80_to_int64_round_to_zero(BX_READ_FPU_REG(0), status);
|
|
|
|
|
2009-05-28 23:25:33 +04:00
|
|
|
if (FPU_exception(status.float_exception_flags, 1))
|
2009-03-11 00:43:11 +03:00
|
|
|
return;
|
2004-06-18 18:11:11 +04:00
|
|
|
}
|
|
|
|
|
2009-06-05 16:24:20 +04:00
|
|
|
// store to the memory might generate an exception, in this case origial FPU_SW must be kept
|
|
|
|
swap_values(x87_sw, FPU_PARTIAL_STATUS);
|
|
|
|
|
2007-12-20 21:29:42 +03:00
|
|
|
write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
|
2009-06-05 16:24:20 +04:00
|
|
|
|
|
|
|
FPU_PARTIAL_STATUS = x87_sw;
|
|
|
|
|
2004-06-18 18:11:11 +04:00
|
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
|
|
#else
|
2006-04-05 21:31:35 +04:00
|
|
|
BX_INFO(("FISTTP64: required SSE3, use --enable-sse option"));
|
2008-07-13 19:35:10 +04:00
|
|
|
exception(BX_UD_EXCEPTION, 0, 0);
|
2004-06-18 18:11:11 +04:00
|
|
|
#endif
|
|
|
|
}
|
2008-04-05 01:05:37 +04:00
|
|
|
|
|
|
|
#endif
|